DATASHEET

White LED Driver with Wide PWM Dimming Range
ISL97634
Features
The ISL97634 represents an efficient and highly integrated
PWM boost LED driver that is suitable for LED backlighting in
small size LCD panels. With integrated Schottky diode, OVP,
and wide range of PWM dimming capability, the ISL97634
provides a simple, reliable, and flexible solution to the
backlight designers.
•Drives Up to 26V Output
The ISL97634 features a wide range of PWM dimming control
capability. It allows dimming frequency as low as DC to 32kHz
beyond audible spectrum. The ISL97634 also features a
feedback disconnect switch to prevent the output from being
modulated by the PWM dimming signal that minimizes system
disturbance.
• Integrated Schottky Diode
The ISL97634 is available in the 8 Ld TDFN (2mmx3mm)
package. There are 14V, 18V, and 26V OVP options that are
suitable for various number of LEDs in series. The ISL97634 is
specified for operation over the -40°C to +85°C ambient
temperature at input voltage from 2.4V to 5.5V.
• Internally Compensated
•Integrated over-voltage protection (OVP) of 14V, 18V, and
26V for various number of LEDs in series
• PWM Dimming Control From DC to 32kHz
• Output Disconnect Switch
• 2.4V to 5.5V Input
• 85% Efficiency
• 1.4MHz Switching Frequency Allows Small LC
• 1µA Shutdown Current
• 8 Ld TDFN (2mmx3mm)
• Pb-Free (RoHS Compliant)
Applications
Related Literature
• LED Backlighting for:
- Cell phones
- Smartphones
- MP3
- PMP
- Automotive Navigation Panel
- Portable GPS
• See TB470, “Using the ISL97634 White LED Driver Demo
Board”
10µH or 22µH
VIN
VIN
PWM/EN
LX
VOUT
NC
FBSW
GND
FB
FIGURE 1. TYPICAL APPLICATION CIRCUIT
August 27, 2013
FN6264.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
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ISL97634
Block Diagram
VIN (2.4V TO 5.5V)
L
CIN
VIN
PWM/EN
1.4MHZ OSCILLATOR AND RAMP
GENERATOR
LX
ISL97634
VOUT
COUT
PWM
COMPARATOR
PWM LOGIC
CONTROLLER
FET
DRIVER
2 LEDs to 7 LEDS
CURRENT
SENSE
GND
FBSW
PWM/EN
GM AMP
COMPENSATION
2
GM
AMPLIFIER
FB
95mV
BANDGAP
REFERENCE
GENERATOR
RSET
FN6264.4
August 27, 2013
ISL97634
Pin Configuration
ISL97634
(8 LD TDFN)
TOP VIEW
GND 1
8 LX
VIN 2
7 VOUT
THERMAL
PAD
PWM/EN 3
NC 4
6 FBSW
5 FB
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1
GND
Ground Pin. Connect to local ground.
2
VIN
Input Supply Pin. Connect to the input supply voltage, the inductor and the input supply decoupling capacitor.
3
PWM/EN
4
NC
No Connect
5
FB
Feedback Pin. Connect the sense resistor between FB and ground. The cathode of bottom LED can also be
connected at this pin if the output current is not to be PWMed.
6
FBSW
FB Disconnect Switch. Connect to the cathode of the bottom LED if the output current to be PWMed.
7
VOUT
Output Pin. Connect to the anode of the top LED and the output filter capacitor.
8
LX
PWM or Enable Pin. Connect external PWM signal allows pulse width modulation current operation. Enable
signal allows peak current operation or disable signal shuts down the device.
Switching Pin. Connect to inductor.
PAD
Connect to ground plane on the PCB to maximize thermal performance.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
OVP OPTIONS
(V)
TEMP RANGE
(°C)
PACKAGE
Tape and Reel
(Pb-free)
PKG.
DWG. #
ISL97634IRT14Z-T
ELE
14
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
ISL97634IRT14Z-TK
ELE
14
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
ISL97634IRT18Z-T
ELF
18
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
ISL97634IRT18Z-TK
ELF
18
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
ISL97634IRT26Z-T
ELG
26
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
ISL97634IRT26Z-TK
ELG
26
-40 to +85
8 Ld 2x3 TDFN
L8.2x3A
NOTES:
1. Please refer to TB347 for details on reel specifications
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97634. For more information on MSL please see tech brief TB363.
3
FN6264.4
August 27, 2013
ISL97634
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
LX Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
FBSW Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance
θJA (°C/W) θJC (°C/W)
8 Ld TDFN Package (Notes 4, 5). . . . . . . . .
77
12
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed over temperature of -40°C to +85°C unless otherwise stated. Typ values are
for information purposes only at TJ = TC = TA = +25°C.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VIN = VPWM/EN = 3V. Boldface limits apply over the operating temperature range, -40°C to +85°C.
DESCRIPTION
VIN
Supply Voltage
IIN
Supply Current
CONDITION
MIN
(Note 6)
TYP
2.4
PWM/EN = 3V, enabled, not switching
0.8
PWM/EN = 0V, disabled
fSW
DMAX
ILIM
RSW(LX)
ILEAK
Switching Frequency
1.5
mA
1
µA
1,600
kHz
Maximum Switching Duty Cycle
90
95
%
LX Current
400
470
mA
mΩ
LX Switch ON-Resistance
ILX = 100mA
900
LX Switch Leakage Current
VLX = 28V
0.01
1
µA
95
100
mV
1
µA
IFB
FB Pin Bias Current
OVP
V
1,450
Feedback Voltage
VDIODE
5.5
1,300
VFB
RSW(FBSW)
MAX
(Note 6) UNIT
90
VFB = 95mV
FBSW Switch ON-Resistance
10
Ω
Schottky Diode Forward Voltage
IDIODE = 100mA, TA = +25°C
600
Overvoltage Protection
ISL97634IRT14Z
14
V
ISL97634IRT18Z
18
V
ISL97634IRT26Z
26
VIL
Logic Low Voltage of PWM/EN
VIH
Logic High Voltage of PWM/EN
850
1.5
mV
28
V
0.6
V
V
PWM_on
Minimum PWM On-Time
1.5
µs
EN_delay
EN to Vout Delay
200
µs
NOTE:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
4
FN6264.4
August 27, 2013
ISL97634
Typical Performance Curves
1.0
90
85
0.8
0.6
4 LEDs, 10µH
75
3 LEDs, 10µH
70
3 LEDs, 22µH
65
7 LEDs, 10µH
7 LEDs, 22µH
ILED_peak = 25mA
VIN = 4V
55
RSET = 4Ω
fPWM = 1kHz
0
20
0.4
0.2
60
50
I q (mA)
EFFICIENCY (%)
80
40
60
80
PWM DUTY CYCLE (%)
0.0
-0.2
100
FIGURE 2. EFFICIENCY vs PWM DUTY CYCLE
0
2
1
3
VIN (V)
4
5
6
FIGURE 3. QUIESCENT CURRENT vs VIN (PWM/EN = HI)
20.08
19.76
19.74
20.04
IO (mA)
IO (mA)
19.72
20.00
19.70
19.68
19.66
19.96
19.64
19.92
0
5
10
15
VOUT (V)
20
25
30
19.62
2.5
3.0
FIGURE 4. LOAD REGULATION (VIN = 4V)
3.5
4.0
VIN (V)
4.5
5.0
5.5
FIGURE 5. LINE REGULATION
100
7 LEDs
VIN = 4V
RSET = 4Ω
L = 10µH
90
FB VOLTAGE (mV)
80
70
VOUT
1kHz
VIN = 4V
R1 = 4Ω
L1 = 22µH
LX
60
50
40
PWM/EN
30
20kHz
20
10
32kHz
ILED
0
0
20
40
60
80
100
120
DUTY CYCLE (%)
FIGURE 6. DIMMNG LINEARITY (FB VOLTAGE) vs DUTY CYCLE
5
FIGURE 7. PWM DIMMING AT 1kHz, D = 1%
FN6264.4
August 27, 2013
ISL97634
Typical Performance Curves (Continued)
VOUT
VOUT
LX
LX
PWM/EN
PWM/EN
VIN = 4V
ILED
R1 = 4Ω
L1 = 22µH
ILED
VIN = 4V
R1 = 4Ω
L1 = 22µH
FIGURE 8. PWM DIMMING AT 1kHz, D = 1% ZOOM IN
FIGURE 9. PWM DIMMING AT 1kHz, D = 99%
VOUT
LX
R1 = 4Ω
VIN = 4V
L1 = 22µH
PWM/EN
ILED
FIGURE 10. PWM DIMMING AT 20kHz, D = 50%
Detailed Description
The ISL97634 uses a constant frequency, current mode
control scheme to provide excellent line and load
regulation. There are three OVP thresholds set at 14V, 18V
and 26V respectively. The ISL97634 operates from an input
voltage of 2.4V to 5.5V and ambient temperature from -40°C
to +85°C. The switching frequency is around 1.45MHz and
allows the driver circuit to employ small LC components. The
peak forward current of the LED is set using the RSET resistor.
In the steady state mode, the LED peak current is given by
Equation 1:
V FB
I LED = --------------R SET
(EQ. 1)
PWM Dimming
The ISL97634’s PWM/EN pin can be tied permanently to high
for a fixed current operation. On the other hand, the ISL97634
6
can be applied with an external PWM signal to pulse width
modulated output current. It is well understood that the LED
brightness is a linear function of the LED current. In addition,
the average LED current corresponds to the duty cycle “D” of
the PWM signal as shown in Equation 2:
V FB
I LED-AVG = --------------- ⋅ D
R SET
(EQ. 2)
As a result, PWM signal provides a means to dim the LED
brightness. PWM dimming offers the best LEDs matching over
DC dimming. It is because the LED peak current operating
point is far away from the knee of the diode I-V curve where
part to part variations are high. The PWM dimming test results
are shown in Figure 7 with two PWM frequencies, 1kHz and
20kHz. The vertical scale parameter FB is proportional to the
current and therefore the brightness.
For the ISL97634, PWM dimming provides linear dimming
adjustment with low frequency signal, such as 1kHz and
below. The applied PWM dimming signal can be up to 32kHz;
FN6264.4
August 27, 2013
ISL97634
however, the dimming linearity is compromised at low duty
cycles as their durations are too short for the ISL97634’s control
loop to respond properly. This non-ideality behavior does not
cause any functional problem. The PWM dimming linear
responses in Figure 6 are expanded in Figure 11. At 1kHz PWM
dimming, the duty cycle can virtually vary from below 1% to DC.
On the other hand, at 20kHz PWM dimming, the linearity range is
from 5% to DC only.
10
9
8
VOUT
LX
PWM/EN
7 LEDs
VIN = 4V
RSET = 4Ω
L = 10µH
1kHz
VIN = 4V
ILED
7
FB VOLTAGE (mV)
.
R1 = 4Ω
L1 = 22µH
6
5
FIGURE 13. PWM DIMMING AT 1kHz WITHOUT USING FBSW
4
The FBSW should be used for PWM dimming as illustrated in the
“Typical Application Circuit” on page 1. During the PWM off time,
the FBSW is opened. The LEDs are floating and therefore the
output capacitor has no path to discharge. The LED current
responds accurately with the PWM signal (see Figure 14). The
output switches very quickly to the target current with minimal
settling ringing and without being modulated by the PWM signal,
and therefore minimizes any system disturbance.
3
20kHz
2
1
32kHz
0
0
2
4
6
8
DUTY CYCLE (%)
10
12
FIGURE 11. DIMMING LINEARITY vs DUTY CYCLES ZOOM IN
The low level non-linearity effects at high frequency PWM
dimming is also reflected in the efficiency measurements in
Figure 12.
VOUT
90
LX
85
EFFICIENCY (%)
80
75
PWM/EN
70
65
3 LEDs
VIN = 4V
RSET = 4Ω
L = 22µH
60
55
50
VIN = 4V
R1 = 4Ω
L1 = 22µH
0
5
10
15
ILED (mA)
20
25
ILED
30
FIGURE 12. EFFICIENCY vs PWM DIMMING FREQUENCIES
Feedback Disconnect Switch
The ISL97634 functions properly without using the FBSW.
However, the output capacitor will discharge during the PWM off
time resulting in poor dimming linearity at low duty cycles. The
output discharge effect can be seen in Figure 13. Moreover, the
output is modulated by the PWM signal that may create
interference to other systems.
7
FIGURE 14. PWM DIMMING AT 1kHz USING FBSW
Overvoltage Protection
The ISL97634 comes with overvoltage protection. The OVP trip
points are at 14V, 18V and 26V for ISL97634IRT14Z,
ISL97634IRT18Z and ISL97634IRT26Z respectively. The
maximum LED current and OVP threshold are shown in Table 1.
When the device reaches the OVP, the LX stops switching,
disabling the boost circuit until VOUT falls about 7% below the OVP
threshold. At this point, LX will be allowed to switch again. The OVP
event will not cause the device to shutdown.
An output capacitor that is only rated for the required voltage
range can therefore be used, which will optimize the component
costs in some cases.
FN6264.4
August 27, 2013
ISL97634
Applications
TABLE 1.
PART NO.
OVP
MAX ILED
ISL97634IRT14Z
14V
70mA
ISL97634IRT18Z
18V
50mA
ISL97634IRT26Z
26V
30mA
Shutdown
When PWM/EN is taken low the ISL97634 enters into the
power-down mode where the supply current is reduced to less
than 1µA. The device resumes normal when the PWM/EN goes
high.
Components Selection
The input capacitance is typically 0.22µF. The output capacitor
should be in the range of 0.22µF to 1µF. X5R or X7R type of
ceramic capacitors of the appropriate voltage rating are
recommended.
When choosing an inductor, make sure the average and peak
current ratings are adequate by using Equations 3, 4 and 5 (80%
efficiency assumed):
I LED ⋅ V OUT
I LAVG = --------------------------------0.8 ⋅ V IN
(EQ. 3)
1
I LPK = I LAVG + --- ⋅ ΔI L
2
(EQ. 4)
Analog Dimming
Analog dimming is usually not recommended because of the
brightness non-linearity at low levels dimming. However, some
systems are EMI or noise sensitive that analog dimming may be
more suitable than PWM dimming under those situations. The
ISL97632 is part of the same family as the ISL97634 and has
been designed with a serial interface to give access to 32
separate dimming levels. Alternatively analog dimming can be
achieved by applying a variable DC voltage (VDim) at the FB pin
(see Figure 15) to adjust the LED current. As the DC dimming
signal voltage increases above VFB, the voltage drop on R1 and
R2 increases and the voltage drop on RSET decreases. Thus, the
LED current decreases as shown in Equation 6:
V FB ⋅ ( R 1 + R 2 ) – V Dim ⋅ R 1
I LED = -------------------------------------------------------------------------R2 ⋅ R
(EQ. 6)
SET
If VDIM is taken below FB, the inverse will happen and the
brightness will increase.
The DC dimming signal voltage can be a variable DC voltage from
a POT, a DCP (Digitally Controlled Potentiometer), or a DC voltage
generated by filtering a high frequency PWM control signal.
L1
22µH
VIN
LEDs
VIN
3.3V
V IN ⋅ ( V OUT – V IN )
ΔI L = --------------------------------------------------L ⋅ V OUT ⋅ f OSC
VOUT
C1
(EQ. 5)
LX
1µF
R1
PWM
Where:
C2
0.22µF
ISL97634
FB
3.3k
• ΔIL is the peak-to-peak inductor current ripple in Amps
GND
• L is the inductance in H
R2
RSET
4.75Ω
VDim
• fOSC is the switching frequency, typically 1.45MHz
The ISL97634 supports a wide range of inductance values (10µH
to ~82µH). For lower inductor values or lighter loads, the boost
inductor current may become discontinuous. For high boost
inductor values, the boost inductor current will be in continuous
mode.
In addition to the inductor value and switching frequency, the
input voltage, number of LEDs and the LED current also affects
whether the converter operates in continuous conduction or
discontinuous conduction mode. Both operating modes are
allowed and normal. The discontinuous conduction mode yields
lower efficiency due to higher peak current.
Compensation
The product of the output capacitor and the load create a pole
while the inductor creates a right half plane zero. Both of these
attributes degrade the phase margin but the ISL97634 has
internal compensation network that ensures the device operates
reliably under the specified conditions. The internal
compensation and the highly integrated functions of the
ISL97634 make it a design friendly device to be used in high
volume, high reliability applications.
8
FIGURE 15. ANALOG DIMMING CONTROL APPLICATION CIRCUIT
As brightness is directly proportional to LED currents, VDim may
be calculated for any desired “relative brightness” (F) using
Equation 7:
R1
R2
⎛
⎞
V Dim = ------- ⋅ V FB ⋅ ⎜ 1 + ------- – F⎟
R1
R
⎝
⎠
2
(EQ. 7)
Where F = ILED (dimmed)/ILED (undimmed).
These equations are valid for values of R1 and R2 such that both
R1>>RSET and R2>>RSET.
The analog dimming circuit can be tailored to a desired relative
brightness for different VDim ranges using Equation 8.
[ ( V Dim_max – V FB ) • R 1 ]
R 2 = ------------------------------------------------------------------[ V FB • ( 1 – F min ) ]
(EQ. 8)
Where VDim_max is the maximum VDim voltage and Fmin is the
minimum relative brightness (i.e., the brightness with VDim_max
applied).
i.e., VDim_max = 5V, Fmin = 10% (i.e., 0.1), R2 = 189k
i.e., VDim_max = 1V, Fmin = 10% (i.e., 0.1), R2 = 35k
FN6264.4
August 27, 2013
ISL97634
Efficiency Improvement
Figure 2 shows the efficiency measurements during PWM
operation. The choice of the inductor has a significant impact on
the power efficiency. Equation 4 shows the higher the inductance,
the lower the peak current, therefore, the lower the conduction
and switching losses. On the other hand, it has also a higher series
resistance. Nevertheless, the efficiency improvement effect by
lowering the peak current is greater than the resistance increases
with larger value of inductor. Efficiency can also be improved for
systems that have high supply voltages. Since the ISL97634 can
only supply from 2.4V to 5.5V, VIN must be separated from the
high supply voltage for the boost circuit as shown in Figure 16 and
the efficiency improvement is shown in Figure 17.
C3 0.22µF
D1
L1
Vs = 12V
C1
1
C2
22µH
1µF
VIN = 2.7V TO 5.5V
0.1µF
D2
2
D3
D4
VIN
LX
VOUT
ISL97634
FBSW
D5
follower action of M1, limiting the maximum voltage on the
ISL97634 LX pin to below VIN, but allowing the output voltage to go
much higher than the breakdown limit on the LX pin. The switch
current limit and maximum duty cycle will not be changed by this
setup, so input voltage will need to be carefully considered to make
sure that the required output voltage and current levels are
achievable. Because the source of M1 is effectively floating when
the internal LX switch is off, the drain-to-source capacitance of M1
may be sufficient to capacitively pull the node high enough to break
down the gate oxide of M1. To prevent this, VOUT should be
connected to VIN, allowing the internal Schottky diode to limit the
peak voltage. This will also hold the VOUT pin at a known low
voltage, preventing the built in OVP function from causing problems.
This OVP function is effectively useless in this mode as the real
output voltage is outside its intended range. If the user wants to
implement their own OVP protection (to prevent damage to the
output capacitor), they should insert a zener diode from VOUT to the
FB pin. In this setup, it would be wise not to use the FBSW to FB
switch, as otherwise, the zener diode will have to be a high power
one capable of dissipating the entire LED load power. Then the LED
stack can then be connected directly to the sense resistor via a
10kΩ resistor to FB. A zener can be placed from VOUT to the FB pin
allowing an overvoltage event to pull-up on FB with a low
breakdown current (and thus low power zener diode) as a result
of the 10kΩ resistor.
D6
FB
VIN = 2.7V TO 5.5V
PWM/EN
GND
R1
C1
1µF
4Ω
C2
0.1µF
.
EFFICIENCY (%)
M1
VOUT
LX
ISL97634
FBSW
FB
PWM/EN
GND
VS = 12V
10BQ100
C3 4.7µF
FQT13N06L
SK011C226KAR
VIN
FIGURE 16. SEPARATE HIGH INPUT VOLTAGE FOR HIGHER
EFFICIENCY OPERATION
90
D0
L1
1
2
10µH or 22µH
R1
6.3Ω
VS = 9V
85
80
VIN = 4V
7 LEDs
L1 = 22µH
R1 = 4Ω
fPWM
75
70
0
5
10
15
20
25
FIGURE 18. HIGH VOLTAGE LED DRIVER USING A CASCODE
30
ILED (mA)
FIGURE 17. EFFICIENCY IMPROVEMENT WITH 9 AND 12V INPUTS
Operation with VOUT above 26V
For LED backlighting applications that need an output voltage above
26V, the voltage range of the ISL97634 is not sufficient. However,
the ISL97634 can be used as an LED controller with an external
protection MOSFET connected in cascode fashion to achieve higher
output voltage as shown in Figure 18. A 60V logic level N-Channel
MOSFET is configured such that its drain ties between the inductor
and the anode of Schottky diode, its gate ties to the input, and its
source ties to the ISL97634 LX node connecting to the drain of the
internal switch. When the internal switch turns on, it pulls the source
of M1 down to ground and LX conducts as normal. When the
internal switch turns off, the source of M1 will be pulled up by the
9
SEPIC Operation
For applications where the output voltage is not always above the
input voltage, a buck or boost regulation is needed. A SEPIC
(Single-Ended Primary Inductance Converter) topology, shown in
Figure 19, can be considered for such an application. A single
cell Li-ion battery operating a cellular phone backlight or
flashlight is one example. The battery voltage is between 2.5V
and 4.2V, depending on the state of charge. On the other hand,
the output may require only one 3V to 4V medium power LED for
illumination because the light guard of the backlight assembly is
optimized for cost efficiency trade-off reason.
In fact, a SEPIC configured LED driver is flexible enough to allow
the output to be well above or below the input voltage, unlike the
previous example. Another example is when the number of LEDs
and input requirements are different from platform to platform, a
common circuit and PCB that fit all the platforms in some cases
FN6264.4
August 27, 2013
ISL97634
may be beneficial enough that it outweighs the disadvantage of
adding additional component cost. L1 and L2 can be a coupled
inductor in one package.
VIN = 2.7V TO 5.5V 1 L1 2
22µH
C1
1µF
VA
C3
VB D0
1µF
C4
L2
22µH
0.22µF
D1
LX
VOUT
ISL97634
FBSW
VIN
C2
0.1µF
diode if the output voltage is low. The L2 series resistance also
contributes additional loss. Figure 20 shows the efficiency
measurement of a single LED application as the input varies
between 2.7V and 4.2V.
Note VB is considered the level-shifted LX node of a standard boost
regulator. The higher the input voltage, the lower the VB voltage
will be during PWM on period. The result is that the efficiency will
be lower at higher input voltages because the SEPIC has to work
harder to boost up to the required level. This behavior is the
opposite to the standard boost regulator’s and the comparison is
shown in Figure 20.
FB
GND
R1
76
1Ω
VIN = 2.7V
FIGURE 19. SEPIC LED DRIVER
The simplest way to understand SEPIC topology is to think about it
as a boost regulator where the input voltage is level shifted
downward at the same magnitude and the lowest reference level
starts at -VIN rather than 0V.
The SEPIC works as follows; assume the circuit in Figure 19
operates normally when the ISL97634 internal switch opens and it
is in the PWM off state. After a short duration where few LC time
constants elapsed, the circuit is considered in the steady-state
within the PWM off period that L1 and L2 are shorted. VB is
therefore shorted to the ground and C3 is charged to VIN with
VA = VIN. When the ISL97634 internal switch closes and the circuit
is in the PWM on-state, VA is now pulled to ground. Since the
voltage in C3 cannot be changed instantaneously, VB is shifted
downward and becomes -VIN. The next cycle when the ISL97634
switch opens, VB boosts up to the targeted output like the
standard boost regulator operation, except the lowest reference
point is at -VIN. The output is approximated in Equation 9:
D
V OUT = V IN -----------------(1 – D)
(EQ. 9)
where D is the on-time of the PWM duty cycle.
The convenience of SEPIC comes with some trade-off in addition
to the additional L and C costs. The efficiency is usually lowered
because of the relatively large efficiency loss through the Schottky
EFFICIENCY (%)
SDIN
72
VIN = 4.2V
68
1 LED
L1 = L2 = 22µH
64
C3 = 1µF
R1 = 4.7Ω
60
0
5
10
ILED (mA)
15
20
FIGURE 20. EFFICIENCY MEASUREMENT OF A SINGLE LED SEPIC
DRIVER
PCB Layout Considerations
The layout is very important for the converter to function properly.
RSET must be located as close as possible to the FB and GND pins.
Longer traces to the LEDs are acceptable. Similarly, the supply
decoupling cap and the output filter cap should be as close as
possible to the VIN and VOUT pins.
The heat of the IC is mainly dissipated through the thermal pad of
the package. Maximizing the copper area connected to this pad if
possible and connect to ground plane on the PCB. Connect all vias to
the correct voltage potential (power plane) indicated in the
datasheet. In addition, a solid ground plane is always helpful for the
EMI performance.
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
FN6264.4
August 27, 2013
ISL97634
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE
August 27,
2013
REVISION
CHANGE
FN6264.4 Changed the information of "max 7 LED in series" to "up to 26V" for more accuracy.
Page 1:
In first paragraph, changed "PWM boost LED driver that is suitable for 1.8" to 3.5" LCDs that employ 2 to 7 white LEDs for
backlighting." to " PWM boost LED driver that is suitable for LED backlighting in small size LCD panels."
Added “Related Literature”
In “Features”, changed "OVP (14V, 18V, and 26V for 3, 4 and 7 LEDs Applications)" to "Integrated over-voltage protection (OVP)
of 14V, 18V, and 26V for various number of LEDs in series". Changed "Drives Up to 7 LEDs in Series (3.5V/20mA type)" to
"Drives Up to 26V Output"
Ordering Information on page 3
Added OVP Options column.
Updated Pb-free note to new verbiage based on lead finish.
Added note to Min Max column of spec table "Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless
otherwise specified. Temperature limits established by characterization and are not production tested."
Added "Boldface limits apply" verbiage to common conditions of spec table. Bolded applicable specs.
“Overvoltage Protection” on page 7, changed "The maximum numbers of LEDs.." to "The maximum LED current.."
Page 8, Table 1, deleted "MAX NO.OF LEDS" column
Page 9:
Changed section title from "8 LEDs Operation" to “Operation with VOUT above 26V”
In same section, changed first sentence from "For medium size LCDs that need more than 7 low power LEDs for backlighting,
such as a portable media player or automotive navigation panel displays, the voltage range.." to "For LED backlighting
applications that need an output voltage above 26V, the voltage range.."
Figure 17, changed inductance value from "2.2µH" to "10µH or 22µH"
Figure 17, changed figure title from "conceptual 8 LEDs high voltage driver" to "high voltage LED driver using a cascode".
Added “Revision History” and “About Intersil” on page 11.
Page 12:
Updated POD L8.2x3A to most recent rev. Updated format and added recommended land pattern
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting
www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at
http://www.intersil.com/en/support/qualandreliability.html#reliability
11
FN6264.4
August 27, 2013
ISL97634
Package Outline Drawing
L8.2x3A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE WITH E-PAD
Rev 1, 06/09
6
PIN #1 INDEX AREA
A
0.25
B
1.80 +0.1/ -0.15
3.00
6
PIN 1
INDEX AREA
(4X)
0.50
2.20
2.00
0.15
(8x0.40)
1.65 +0.1/ -0.15
TOP VIEW
BOTTOM VIEW
(8x0.25)
PACKAGE
OUTLINE
(6x0.50)
0.75
SEE DETAIL "X"
SIDE VIEW
1.80
3.00
0.05
(8x0.40)
1.65
C
0.20 REF
C
BASE PLANE
SEATING PLANE
0.08 C
5
(8x0.20)
0.05
2.00
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension b applies to the metallized terminal and is measured
between 0.20mm and 0.32mm from the terminal tip.
5.
Tiebar shown (if present) is a non-functional feature.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
12
FN6264.4
August 27, 2013
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