DATASHEET

960MegaQ™: An Automatic 960H and Composite Video
Equalizer, Fully-Adaptive to 4000 Feet
ISL59960
Features
The ISL59960 is a single-channel adaptive equalizer for 960H
(WD1) or 720H (D1) composite video designed to
automatically compensate for long runs of CAT 5/CAT 6 or
RG-59 cable, producing high quality video output with no user
interaction. The ISL59960 equalizes up to 4000 feet (1200
meters) of CAT 5/CAT 6 cable.
• Equalizes both 960H and 720H video
• Equalizes up to 4000 feet of Cat 5/Cat 6 and up to 5000
feet (1500m) of RG-59
• Fully automatic, stand-alone operation - no user adjustment
required
• 13MHz -3dB bandwidth
960MegaQ™ compensates for high frequency cable losses of
up to 70dB at 9MHz, as well as source amplitude variations up
to ±3dB.
• ±8kV ESD protection on all inputs
• Automatic cable type compensation
The ISL59960 operates from a single +5V supply. Inputs are
AC-coupled and internally DC-restored. The output can drive
2VP-P into two source-terminated 75Ω loads (AC-coupled or
DC-coupled).
• Compatible with color or monochrome, 960H, NTSC or PAL
signals
• Automatic polarity detection and inversion
• Compensates for ±3dB source variation (in addition to cable
losses)
Related Literature
• Optional serial interface adds additional functionality
• AN1780 “ISL59605-Catx-EVZ/ISL59960-Catx-EVZ
Evaluation Board” (Stand-Alone Evaluation Board)
• Works with single-ended or differential inputs
• Output drives up to two 150Ω video loads
• AN1776 “ISL59603-Coax-EVZ/ISL59960-Coax-EVZ
Evaluation Board” (Stand-Alone Evaluation Board)
Applications
• AN1775 “ISL59605-SPI-EVALZ/ISL59960-SPI-EVALZ
Evaluation Board (with Serial Interface) Operation (Rev 5.0)”
(Evaluation Board with USB Serial Interface)
• Surveillance video
• Video distribution
Typical Application
APPLICATION CIRCUIT FOR CAT X CABLE
960H, NTSC, PAL,
MONOCHROME CAMERA/
VIDEO SOURCE
1.0µF
IN+
50 Ω
50 Ω
PASSIVE
BALUN
1k Ω
GND
75 Ω
OUT
ISL59960
CFB
1.0µF
300 Ω
0.047µF
1500pF
IN-
UP TO 4000 FEET OF
CAT 5/CAT 6 CABLE
TV/DVR
V CC
0.1µF
960H, NTSC, PAL,
M O NO CHRO M E CAM ERA /
VIDEO SO URCE
APPLICATIO N CIRCUIT FO R CO AXIAL CABLE
10k Ω
1.0µF
IN+
37.5 Ω
0 TO 5000 FEET O VER RG -59
CO PPER-CO RE CO AXIAL CABLE
37.5 Ω
0.1µF
December 18, 2012
FN8358.0
1
1k Ω
1.0µF
G ND
IN-
75.0Ω
O UT
ISL59960
CFB
300 Ω
0.047µF
1500pF
TV/DVR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) and MegaQ are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL59960
Pin Configuration
SD
SCK
SEN
GND
FREEZE
ISL59960
(20 LD QFN)
TOP VIEW
20
19
18
17
16
GND
1
15 VREF
VDD1
2
IN+
3
GND
4
12 CFB
IN-
5
11 VDD2
14 GND
THERMAL
PAD
(SOLDER TO GND)
6
7
8
9
10
GND
EQ_DISABLE
COLOR
INVERT
LOCKED
13 VIDEO OUT
Block Diagram
EQUALIZER
AMP
LPF
VIDEO OUT
CFB
VREF
2
SD
SCK
SEN
FREEZE
INVERT
COLOR
LOCKED
DIGITAL INTERFACE
GEN
EQ_DISABLE
IN-
CLAMP AND
DIFFERENTIAL TO
SINGLE-ENDED
CONVERTER
VREF
IN+
FN8358.0
December 18, 2012
ISL59960
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
3
IN+
High impedance analog input. This is the positive differential video input. Input signals are externally AC-coupled with
an external 1.0µF capacitor. See “Application Information” on page 10 for information regarding input network for
Cat x and coax cables.
5
IN-
High impedance analog input. This is the negative differential video input. Input signals are externally AC-coupled
with an external 1.0µF capacitor. See “Application Information” on page 10 for information regarding input network
for Cat x and coax cables.
12
CFB
Analog input. Bypass to ground with a 1500pF capacitor and connect to VIDEO OUT via a 0.047µF capacitor in series
with a 300Ω resistor.
INPUTS
OUTPUTS
13
VIDEO OUT
Single-ended video output. The internal AGC sets this level to 2VP-P for a nominal 1VP-P (pre-cable) video source.
DIGITAL I/O
7
EQ_DISABLE
Digital Input. Equalizer Disable.
0: Normal Operation
1: Disables the equalizer to allow for insertion of upstream data onto the signal path, e.g., RS-485.
This pin must be asserted high or low. Do not float this pin.
8
COLOR
Digital I/O. Color Indicator/Override.
0: Monochrome
1: Color
When used as an output, this pin indicates whether the incoming signal does or does not have a colorburst. When
used as an input, this pin forces the state machine to into monochrome or color mode. See Figure 13 and associated
text for more information on functionality.
When COLOR is not externally driven, it is an output pin with a 13kΩ (typical) output impedance. It is capable of
driving 5V, high-impedance CMOS logic.
Note: The COLOR indicator may be invalid for monochrome signals over greater than ~3500 feet. The device will still
equalize properly if this occurs.
9
INVERT
Digital I/O. Polarity Indicator/Override.
0: Nominal Polarity.
1: Inverted Polarity.
When used as an output, this pin indicates the polarity of the incoming signal. When used as an input, this pin
controls whether or not the input signal is inverted in the signal chain. See Figure 12 and associated text for more
information on functionality.
When INVERT is not externally driven, it is an output pin with a 13kΩ (typical) output impedance. It is capable of
driving 5V, high-impedance CMOS logic.
In stand-alone mode, toggling this pin high-low-high or low-high-low will make the equalizer reacquire the signal.
10
LOCKED
Digital Output.
0: Signal is not equalized (or not present).
1: Signal is equalized and settled.
Note: The LOCKED indicator may be invalid for monochrome signals over greater than ~3500 feet. The device will
still equalize properly if this occurs.
16
FREEZE
Digital Input. Freezes equalizer in its current EQ state.
0: Continuous Update
1: Freeze EQ in current state.
For stand-alone operations, connect FREEZE to the LOCKED pin to enter the recommended Lock Until Reset mode.
Tie this pin low if unused.
SERIAL INTERFACE
18
SEN
Digital Input. Serial Interface Enable. This pin should be tied to ground when not in use.
19
SCK
Digital Input. Serial Interface Clock Signal. This pin should be tied to ground when not in use.
20
SD
Digital I/O. Serial Interface Data Signal. This pin should be tied to ground when not in use.
3
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December 18, 2012
ISL59960
Pin Descriptions (Continued)
PIN NUMBER
PIN NAME
DESCRIPTION
2
VDD1
+5V power supply for analog equalizer. Isolate from +5V source with a ferrite bead and bypass to ground with a 0.1µF
capacitor in parallel with a 4.7µF capacitor.
11
VDD2
+5V power supply for output amplifier. Bypass to ground with a 0.1µF capacitor.
15
VREF
Internally generated 2.5V reference. Bypass to ground with a low-ESR 0.47µF capacitor. Do not attach anything else
to this pin.
1, 4, 6, 14, 17
GND
Ground
PAD
Solder the exposed thermal PAD to ground for best thermal and electrical performance.
POWER
THERMAL PAD
EP
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
MAX EQ LENGTH
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL59960IRZ
599 60IRZ
4000 feet
-40 to +85
20 Ld QFN (4x4mm)
L20.4x4C
ISL59960IRZ-T7 (Note 1)
599 60IRZ
4000 feet
-40 to +85
20 Ld QFN (4x4mm)
L20.4x4C
ISL59960IRZ-T7A (Note 1)
599 60IRZ
4000 feet
-40 to +85
20 Ld QFN (4x4mm)
L20.4x4C
ISL59960-Catx-EVZ
Stand-alone (no USB I/O) evaluation board
ISL59960-Coax-EVZ
Stand-alone (no USB I/O) evaluation board
ISL59960-SPI-EVZ
Evaluation board with serial interface
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL59960. For more information on MSL please see techbrief TB363.
4
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December 18, 2012
ISL59960
Absolute Maximum Ratings
Thermal Information
(TA = +25°C)
Supply Voltage between VDD and GND . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Maximum Voltage on any Pin . . . . . . . . . . . . . . . . GND - 0.3V to VDD + 0.3V
ESD Rating
Human Body Model (tested per JESD22-A114) . . . . . . . . . . . . . . 8,000V
Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . . 600V
CDM Model (Tested per JESD22-C101) . . . . . . . . . . . . . . . . . . . . . 2,000V
Latch Up (Tested per JESD78; Class II, Level A) . . . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
20 Ld QFN Package (Notes 4, 5) . . . . . . . .
40
3.7
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications VDD = VDD1 = VDD2 = +5V, source video amplitude before any cable loss = 1VP-P, cable type = Cat 5,
cable length = 0 feet, RL = 150Ω (75Ω series + 75Ω load to ground), TA = +25°C, exposed die plate = 0V, unless otherwise specified. Max Cat 5 cable
length = 4000 feet.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
4.5
UNIT
SUPPLY
VDD
VDD Operating Range
5.0
5.5
V
IS1
VDD1 Supply Current
No input, no load
45
60
mA
IS2
VDD2 Supply Current
No input, no load
25
45
mA
PSRRDC
Power Supply Rejection Ratio
60
dB
AC PERFORMANCE
BW
-3dB Bandwidth
Cable length = 0 feet
13
MHz
DG
Differential Gain
Cable length = 3200 feet,
20IRE Sub Carrier on 100% ramp
.75
%
DP
Differential Phase
Cable length = 3200 feet,
20IRE Sub Carrier on 100% ramp
.5
°
Output Blanking/Backporch Level
Measured at VIDEO OUT pin
DC PERFORMANCE
VBL
0.82
0.95
1.07
V
INPUT CHARACTERISTICS
VINDIFF_MIN
Minimum Correctable Peak-to-Peak
Signal Swing
Measured at the source-end of
cable, before cable losses
0.7
VP-P
VINDIFF_MAX
Maximum Correctable Peak-to-Peak
Signal Swing
Measured at the source-end of
cable, before cable losses
1.4
VP-P
VCM-MIN
Min Common Mode Input Voltage
1
V
VCM-MAX
Max Common Mode Input Voltage
SNR
Signal-to-Noise Ratio,
NTC-7 Weighted Filter
CMRR
Common-mode Rejection Ratio at
fIN = 100kHz
IClamp
Input Clamp Current
5
EQ = 0 feet
4
V
-68
dB rms
EQ = 1,000 feet
-67
dB rms
EQ = 2,000 feet
-66
dB rms
EQ = 3,000 feet
-65
dB rms
EQ = 4,000 feet
-61
dB rms
0 feet cable
-50
dB
1600 feet cable
-41
dB
25
µA
FN8358.0
December 18, 2012
ISL59960
Electrical Specifications VDD = VDD1 = VDD2 = +5V, source video amplitude before any cable loss = 1VP-P, cable type = Cat 5,
cable length = 0 feet, RL = 150Ω (75Ω series + 75Ω load to ground), TA = +25°C, exposed die plate = 0V, unless otherwise specified. Max Cat 5 cable
length = 4000 feet. (Continued)
PARAMETER
DESCRIPTION
MIN
(Note 6)
CONDITIONS
TYP
MAX
(Note 6)
UNIT
OUTPUT CHARACTERISTICS
AGC-ACC
AGC Accuracy
IOUT
Accuracy of sync tip amplitude
relative to 600mV
±0.5
dB
Output Drive Current
40
mA
tEN-EQ
Enable-to-Equalization On Time
500
ns
tDIS-EQ
Disable-to-Equalization Off Time
500
ns
LOGIC CONTROL PINS
VIH
Logic High Level
VIL
Logic Low Level
2.0
ILOGIC
Logic Input Current
V
0.8
EQ_DISABLE, FREEZE, SD, SCK,
SEN
INVERT, COLOR
V
±10
µA
±500
µA
Serial Timing
PARAMETER
DESCRIPTION
tCS
Serial Enable Deselect Time
MIN
(Note 6)
CONDITIONS
MAX
(Note 6)
TYP
UNIT
10
ns
tLEAD
Lead Time
10
ns
tSU
SD, SCK Setup Time
10
ns
tH
SD, SEN, SCK Hold Time
10
ns
tWH
SCK High Time
100
ns
tWL
SCK Low Time
100
ns
tRI
SD, SEN, SCK Rise Time
10
ns
tFI
SD, SEN, SCK Fall Time
10
ns
tLAG
Lag Time
tV
SCK Rising Edge to SD Data Valid
fSCK
SCK Frequency
10
ns
Read Operation
10
ns
5
MHz
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Serial Timing Diagram
t CS
SEN
t LEAD
SCK
SD
1
t SU
1
tH
f SCK
t WH
2
3
4
A6
A5
A4
5
tWL
A3
tRI
6
7
A2
A1
8
tV
9
10
D7
A0
11
D6
t LAG
t FI
12
D5
13
D4
14
D3
15
D2
16
D1
D0
READ OPERATION
t CS
SEN
t LEAD
SCK
SD
1
t SU
0
tH
fSCK
t WH
2
3
4
A6
A5
A4
5
t WL
A3
tRI
6
7
8
9
A2
A1
A0
D7
10
D6
11
D5
t LAG
t FI
12
D4
13
D3
14
D2
15
D1
16
D0
WRITE OPERATION
A6:A0 = REGISTER ADDRESS, D7:D0 = DATA TO BE READ/WRITTEN
6
FN8358.0
December 18, 2012
ISL59960
Typical Performance Over 2000 Feet of Cat 5 with 960H (WD1) Video
200mV/DIV
200mV/DIV
500kHz
2MHz
500kHz
3.58MHz
3.58MHz
2MHz
1MHz
3MHz
9MHz
3MHz
1MHz
FIGURE 1. MULTIBURST WAVEFORM AFTER 2000 FEET OF
UNCOMPENSATED CAT 5
10µs/DIV
9MHz
10µs/DIV
FIGURE 2. MULTIBURST WAVEFORM AFTER 2000 FEET OF CAT 5
Typical Performance Over 4000 Feet of Cat 5 with 960H (WD1) Video
200mV/DIV
200mV/DIV
500kHz
500kHz
2MHz
3.58MHz
3.58MHz
2MHz
1MHz
3MHz
1MHz
9MHz
10µs/DIV
FIGURE 3. MULTIBURST WAVEFORM AFTER 4000 FEET OF
UNCOMPENSATED CAT 5
7
3MHz
9MHz
10µs/DIV
FIGURE 4. MULTIBURST WAVEFORM AFTER 4000 FEET OF CAT 5
WITH ISL59960
FN8358.0
December 18, 2012
ISL59960
Typical Performance Over 2500 Feet of Bare Copper RG-59 with 960H
(WD1) Video
200mV/DIV
200mV/DIV
500kHz
3.58MHz
2MHz
500kHz
3.58MHz
2MHz
1MHz
9MHz
3MHz
1MHz
3MHz
9MHz
10µs/DIV
10µs/DIV
FIGURE 5. MULTIBURST WAVEFORM AFTER 2500 FEET OF
UNCOMPENSATED RG-59 COAX
FIGURE 6. MULTIBURST WAVEFORM AFTER 2500 FEET OF RG-59
COAX WITH ISL59960
Typical Performance Over 5000 Feet of Bare Copper RG-59 with 960H
(WD1) Video
200mV/DIV
200mV/DIV
2MHz
500kHz
3.58MHz
500kHz
2MHz
1MHz
3MHz
3.58MHz
9MHz
1MHz
10µs/DIV
FIGURE 7. MULTIBURST WAVEFORM AFTER 5000 FEET OF
UNCOMPENSATED RG-59 COAX
8
3MHz
9MHz
10µs/DIV
FIGURE 8. MULTIBURST WAVEFORM AFTER 5000 FEET OF RG-59
COAX WITH ISL59960
FN8358.0
December 18, 2012
ISL59960
Functional Description
Equalization for Various Cable Types
960MegaQ™ Overview
TABLE 1. CABLE TYPES AND LENGTHS
960MegaQ™ is a fully automated, stand-alone equalizer for both
960H (WD1) and 720H (D1) composite video resolutions
transmitted over UTP (Unshielded Twisted Pair, i.e., Cat 5, Cat 6,
etc.) or coaxial (RG-59) cables.
Differential video signals sent over long distances of twisted pair
wire exhibit large high frequency attenuation, resulting in loss of
high frequency detail/blurring. The exact loss characteristic is a
complex function of wire gauge, length, composition, and
coupling to adjacent conductors.
The video signal can be restored by applying a filter with the
exact inverse transfer function to the far end signal. 960MegaQ™
is designed to compensate for the losses due to long cables, and
incorporates the functionality and flexibility to match a wide
variety of cable types and loss characteristics.
While 960MegaQ™ was designed and optimized for stand-alone
operation, with no need for any external control of any kind, it has
an optional SPI serial interface with some additional features.
See “Additional Equalization Modes Available With the Serial
Interface” on page 11 for more information on the features and
operation of the serial interface.
MAXIMUM
LENGTH SUPPORTED
CABLE TYPE
Copper-Core
Cat 5/Cat 5e
4000 feet
Cat 6
4000 feet
Coaxial - RG-59
5000 feet
Non-Copper-Core (Note)
Cat 5/Cat 5e CCA
(Copper-Coated Aluminum Core)
2000 feet
Coaxial - RG-59 CCS
(Copper-Coated Steel Core)
1500 feet
NOTE: Image quality will be significantly improved over unequalized
cable, but there will still be some image smearing due to the high
resistance of the core material.
Ferrite Bead –
DC resistance = 1Ω,
600Ω at 100MHz,
100mA DC current rating +5V
C8
C7
C1
1.0µF
DIFFERENTIAL
VIDEO INPUT+
5V
TVS
Z1
DIFFERENTIAL
VIDEO INPUT5V
TVS
R1
49.9Ω
1kΩ R2
49.9Ω
R3
V DD1
VDD2
IN+
OUT
GND
1.0µF
C2
CFB
IN-
Z2
ISL59960
TVS = Transient Voltage Suppressor
a.k.a. Transorb
SERIAL
INTERFACE
(OPTIONAL)
C9
0.1µF 4.7µF
0.1µF
SEN
SCK
SD
VREF
EQ_DISABLE
COLOR
INVERT
LOCKED
300Ω
C4 R5
1500pF
R6 75.0Ω VIDEO
OUT
C5
0.047µF
Internally
Generated
C6
0.47µF
Freezes EQ once
lock is achieved.
Tie FREEZE low if
not used.
FREEZE
GND
FIGURE 9. APPLICATION CIRCUIT FOR UTP CABLE
9
FN8358.0
December 18, 2012
ISL59960
Application Information
Unshielded Twisted Pair (UTP) Application
Circuit
Figure 9 shows the complete schematic for a 960MegaQ™
equalizer configured for unshielded twisted pair (UTP) cable. The
input signal is terminated into the network formed by R1, R2,
and R3. C1 and C2 AC-couple the signal into 960MegaQ™. To
protect the front-end circuitry, 5V transorbs (Z1 and Z2) should be
used instead of diodes because the signals on either differential
input may swing far enough below ground to turn on a diode and
distort the video.
On the output side, C5, R5, and C4 form a compensation
network, while R6 provides 75Ω source-termination for the video
output. 960MegaQ™ has an native gain of 6dB, so when VIDEO
OUT is terminated into 75Ω (the input to a DVR, TV, etc.), R6 and
the 75Ω terminator form a 2:1 divider, producing standard video
amplitude across the 75Ω terminator.
Coax Input Circuit
VCC
C4
0.1µF
10kΩ
D1
R4
1.0µF
Z2
5V
TVS
VCC
C4
0.1µF
10kΩ
UTP IN+
COAX
5.6pF
Cx*
Z2
5V
TVS
*optional
R4
1.0µF
Z1
5V
TVS
UTP IN-
D1
300Ω
R5
49.9Ω
SW1A
49.9Ω
SW1B
C3
0.1µF
R1
R2
C1
IN+
R3
1kΩ
C2
GND
960MegaQTM
IN-
1.0µF
Close all switches for
Coax
TVS = Transient Voltage Suppressor
a.k.a. Transorb
Figure 10 shows the input termination recommended for coaxial
cables. The differential termination resistance is now 75Ω to
match the characteristic impedance of the RG-59 coax cable. C3
bypasses high-frequency noise on the coax ground line to system
ground. This allows the coax ground to be independent of the
system at low frequencies (DC to 50/60Hz) to accommodate
differences in the ground potential of the remote video source(s).
The coax startup network (D1, R4, C4) prevents a rare start-up
condition that can occur when a high average-picture-level (e.g.,
white screen) video signal is present on the inputs before the
power has been applied.
Z1
5V
TVS
Cx may be used to balance the capacitance of the differential
inputs. The value of Cx should be determined by calculating how
much trace capacitance is added by the coax startup circuit. A
typical value for a good layout is ~5pF. Note that only coax or UTP
should be connected at any one time - this circuit does not
multiplex between them.
37.5Ω
C1
R1
1kΩ
37.5Ω
R3
R2
C2
IN+
GND
960MegaQTM
IN-
1.0µF
C3
0.1µF
TVS = Transient Voltage Suppressor
a.k.a. Transorb
FIGURE 10. APPLICATION CIRCUIT FOR COAX CABLE
Dual UTP/Coax Input Circuit
If desired, it is also possible to support both UTP and coax cables
with the same PCB layout using two SPST switches that are
closed when in coax mode (Figure 11). Since UTP requires a
100Ω termination network while coax requires 75Ω, a switch to
introduce a shunt 300Ω resistor when in coax mode will change
the termination from 100Ω to 75Ω. A second switch is required
to engage C3. The addition of the coax startup circuit (D1, R4,
C4) can unbalance the capacitance of the differential pair and
degrade the CMRR in UTP applications. This in turn could cause
excess noise at long lengths of UTP. In UTP applications, if the
output signal is too noisy at long distances, an optional capacitor
10
FIGURE 11. APPLICATION CIRCUIT FOR UTP/COAX CABLE
Using the ISL59960 with Steel Core Coax
Although the ISL59960 was designed for copper based cables, it
is capable of equalizing signals for coaxial applications that use
steel core cabling. Due to the higher DC and low-band resistance
of this cable type, the ISL59960 will not equalize to the same
distance as copper based cables. See Table 1 on page 9 for
maximum equalization distances.
Input Multiplexing
Placing a semiconductor multiplexer in front of this part may
increase high frequency attenuation and noise. However, a
low-capacitance mechanical relay may be acceptable. Note that
changing from one channel to another in Lock Until Reset mode
will require a reset (INVERT toggle) to trigger equalization of the
new channel (see “Lock Until RESET” on page 10).
For best performance, do not multiplex the inputs to the
equalizer - this can further degrade the signal. Instead, multiplex
at the output after equalization has been performed.
Stand-Alone Operation and Configuration
In its default stand-alone configuration, 960MegaQ™ features
two modes of automatic cable equalization: Lock Until Reset and
Continuous Update. Lock Until Reset is the recommended mode
for most applications.
LOCK UNTIL RESET
In the Lock Until Reset mode, once 960MegaQ™ finds the
optimum equalization and the LOCKED signal goes high, the
equalization is frozen and will not change until either the power
is cycled or the INVERT signal is toggled, which initiates a
re-equalization of the input signal. Re-equalization is usually only
necessary during device/system evaluation - in normal operation
960MegaQ™ powers-up, acquires and equalizes the signal, and
continues to equalize until/unless it is powered-down. If the
signal is lost in Lock Until Reset mode, the LOCKED pin will not
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ISL59960
go low until/unless the device is reset by toggling the INVERT pin.
A reset should only be necessary if the length or type of cable
was changed without cycling power.
To enable the Lock Until Reset mode, tie the LOCKED output pin
to the FREEZE input pin as shown in Figure 9 on page 9.
To generate a reset (and trigger a re-equalization), toggle the
external INVERT pin. Depending on the initial state of INVERT,
this would be a high-low-high or low-high-low sequence.
The COLOR Pin
The color pin has 2 modes of operation. It is typically used to
indicate whether or not the incoming signal has a colorburst or
not. The state of the color signal is then used to tell the signal
processing logic whether or not it can rely on the presence of a
colorburst signal. A logic high indicates a color signal; a logic low
indicates monochrome.
COLOR
PIN
CONTINUOUS UPDATE
In the Continuous Update mode, 960MegaQ™ will continuously
try to find the optimum equalization solution. When the
equalization has settled for 100 sequential video lines with no
changes, the LOCKED pin will go high. However, once lock is
achieved, noise and average-picture-level changes may cause the
device to unlock, causing some image perturbation while
960MegaQ™ re-equalizes.
The Continuous Update mode is enabled whenever the FREEZE
pin is set to a logic low (grounded).
Polarity Detection and Correction
960MegaQ™ features polarity detection and correction,
automatically detecting incorrectly-wired input signals and
inverting the signal inside the IC as necessary. The detected
polarity is indicated by the state of the INVERT pin.
The INVERT pin has 2 modes of operation. It is typically used to
indicate whether or not the incoming signal is inverted (the “+”
signal on the “-” input and vice-versa). The state of the invert
signal is then used to tell the signal processing logic whether or
not to invert the signal in the signal path.
A logic high on INVERT indicates that the positive differential
input signal is on IN- (pin 5) and the negative differential input
signal is on IN+ (pin 3). A logic low indicates nominal polarity.
However, the unique design of the INVERT I/O pin (Figure 12)
also allows 960MegaQ™’s internal inversion detector to be
overdriven externally, forcing 960MegaQ™ to invert or not invert
the signal regardless of the state of the inversion detection
function. This is not necessary in normal operation, but it may
improve performance in particularly noisy environments when
the polarity of the signal is guaranteed to be correct.
13kΩ
SIGNAL
PROCESSING
ISL59960
FIGURE 13. COLOR PIN STRUCTURE
However, the unique design of the COLOR I/O pin (Figure 13) also
allows 960MegaQ™’s internal color detector to be overdriven
externally. This is not necessary in normal operation, but it may
improve performance in particularly noisy environments when
the signal type is predetermined.
Monochrome Video Signals
960MegaQ™ will equalize monochrome signals to the same
distance as color signals. However, due to the high level of noise
past ~3500 feet, the COLOR and LOCKED indicators may
become invalid for monochrome signals. The device will still
equalize properly if this occurs.
Security Cameras
960MegaQ™ is ideal for security camera installations.
The automatic adaptive equalizer doesn't need any active silicon
on the transmit side of the cable, enabling upgrading of older
installations without having to touch the installed camera base,
including older monochrome cameras.
960MegaQ™ automatically adjusts for wiring polarity errors as
well as for optimum image quality. These features eliminate the
need for the installer to make any adjustments.
With an extended equalization range of 4000ft, the ISL59960
enables cameras to be placed in even more remote locations,
enabling coverage of up to three square miles from a single
monitoring station.
INVERT
PIN
13kΩ
INVERSION
DETECTION
LOGIC
COLOR
DETECTION
LOGIC
SIGNAL
PROCESSING
ISL59960
FIGURE 12. INVERT PIN STRUCTURE
Additional Equalization Modes Available
With the Serial Interface
In addition to the Lock Until Reset and Continuous Update
modes, software control of 960MegaQ™ through the SPI
interface adds a Lock Until Signal Loss mode and a Manual
Equalization mode.
Note: When controlling 960MegaQ™ through the SPI interface,
the external FREEZE pin must be tied to ground (logic low).
Failure to keep FREEZE at a logic low will prevent the software
controls from working properly.
11
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ISL59960
All of the equalization modes are selected via the two “Locking
Mode/Manual Length Enable” register bits, 0x05[1:0].
CONTINUOUS UPDATE
Continuous Update mode is entered by setting address
0x05[1:0] = 00b. Continuous Update behavior is the same as
described in the stand-alone mode.
LOCK UNTIL RESET
Lock Until Reset mode is entered by setting address
0x05[1:0] = 10b. Lock Until Reset behavior is the same as
described in the stand-alone mode, with the exception of how to
generate a reset.
To generate a reset via software, select Continuous Update mode
and then return to Lock Until Reset mode (register 0x05[1:0] = 00b
then 10b). Toggling INVERT (either the hardware pin or the
software bit) will not cause a reset/re-equalization event.
LOCK UNTIL SIGNAL LOSS
Lock Until Signal Loss mode is entered by setting address
0x05[1:0] = 01b. Lock Until Signal Loss can only be enabled via
the SPI interface.
In the Lock Until Signal Loss mode, 960MegaQ™ will freeze the
equalization once the LOCKED pin goes high (in the same way as
Lock Until Reset). Unlike the “Settled” state in the Continuous
Update mode, only a signal loss lasting more than 1ms (typical) will
cause 960MegaQ™ to re-equalize the signal when it returns. In this
sense, the Lock Until Signal Loss mode can be considered as
halfway between the Continuous Update mode and the Lock Until
Reset mode. The Lock Until Signal Loss mode is useful, for example,
when testing or demonstrating a system by plugging in multiple
different length cables - it eliminates the need to also generate a
reset. To prevent potentially undesired re-equalization, signal losses
lasting less than 1ms (typical) do not trigger a re-equalization.
MANUAL LENGTH
Manual Length mode is entered by setting address
0x05[1:0] = 11b. Manual Length mode allows the forcing of
specific cable lengths, cable type, DC gains, etc. (see the
“Register Listing” table on page 13). The “Cable Type” bit
(0x05 [4]) allows selection between the two most common cable
types for security video: Cat 5/Cat 6 or steel core RG-59 coaxial.
However, since many of 960MegaQ™’s automatic functions and
adjustments are disabled in Manual Length mode, performance
is almost always worse than what is achieved in any of the
automatic modes. For example, automatic polarity correction is
disabled so the polarity must be manually set using the INVERT
bit. There is no practical reason to ever use Manual Length mode
in normal operation.
12
Serial Interface Protocol
While 960MegaQ™ is designed to work as a stand-alone
equalizer, it does have a serial interface that can be used to
control it and monitor its state.
The serial interface is used to read and write the configuration
registers. It uses three signals (SCK, SD, and SEN) for
programming. The serial clock can operate up to 5MHz
(5Mbits/s). The “Serial Timing Diagram” on page 8 shows the
timing of serial I/O.
A transaction begins when the host microcontroller takes SEN
(serial enable) high. The first 8 bits on the SD (serial data) pin are
latched by 960MegaQ™ on the rising edge of SCK (serial clock) to
form the address byte. The MSB of the address byte indicates
whether the operation is a read (1) or a write (0), and the next
seven bits indicate which register is to be read from or written to.
Each read and write operation consists of 16 bits: 8 bits for an
address byte followed by 8 bits of data. See the “Serial Timing
Diagram” on page 6 for more details on using the SPI interface.
TABLE 2. ADDRESS BYTE FORMAT
0 = Write
1 = Read
A6
A5
A4
A3
A2
A1
(MSB)
A0
(LSB)
WRITE OPERATION
After the address byte is clocked in, the next 8 bits should
contain the data to be sent to the register identified in the
address byte.
READ OPERATION
After the rising edge of the 8th clock after the address byte is
clocked in, the microcontroller should tristate the SD line so
960MegaQ™ can begin to output data on the SD pin (from the
register identified in the address byte), beginning on the 9th
rising edge of SCK. The data should be latched on the falling
edge of SCK to allow enough time for the data to settle. See
“Serial Timing Diagram” on page 6 for more details on how to
read from the registers.
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ISL59960
Register Listing
ADDRESS
0x00
0x01
REGISTER
(DEFAULT VALUE)
Device ID (0x30)
Signal Status (N/A)
BIT(S)
FUNCTION NAME
DESCRIPTION
3:0
Device Revision
0 = initial silicon, 1 = first revision, etc.
7:4
Device ID
0x3
0
Signal Present
0: A signal is not present at the input
1: A signal is present at the input
1
DLL Locked
0: DLL is not locked
1: DLL is locked
2
Signal Polarity
0: Inverted Polarity
1: Nominal Polarity
This bit is only valid if the INVERT pin is connected as an
output. If INVERT is overdriven, this value may not reflect the
polarity of the input signal.
3
Color Detected
0: Signal is monochrome
1: Signal has a colorburst
4
Signal Overloaded
0: Signal (if present) is within normal range
1: Signal appears to be overloaded
5
Settled
0: EQ is not settled, though DLL may be locked.
1: EQ has stabilized and equalization achieved.
0x02
Manual Length (0x00)
5:0
Manual Length
Manual Length Control; 0x0 through 0x3F,
64 feet per bit.
0x0: 0 feet.
0x3F: 4000 feet (Cat 5 mode)
This register sets the EQ setting when 960MegaQ™ is in
manual length mode (reg 0x05[1:0] = 11).
Note that the length in this register is for Cat 5 cable when
“Cable Type” (reg 0x05[4]) equals 0. When “Cable Type” is set
to 1 (coax mode), then the length is for steel core coax. In coax
mode, the maximum length is 0x0F (~1200 feet) and setting
the register higher than this value does not provide any
increase in equalization.
0x03
Manual DC Gain (0x20)
5:0
Manual DC Gain
0x00: Maximum DC Gain (+3dB)
0x20: Mid-Scale 0dB
0x3F: Minimum DC Gain (-3dB)
This register sets the DC Gain when the device is in manual
length mode (reg 0x05[1:0] = 11).
13
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ISL59960
Register Listing
ADDRESS
0x04
0x05
(Continued)
REGISTER
(DEFAULT VALUE)
Pin Overrides (0x00)
Equalization Control (0x00)
14
BIT(S)
FUNCTION NAME
DESCRIPTION
0
Freeze Select
0: Use value of FREEZE pin.
1: Use value in “Freeze Value” bit
1
Freeze Value
If Freeze Select = 1, then:
0: Equalization is not frozen
1: Equalization is frozen at current setting.
If Freeze Select = 0, then this bit is ignored.
2
Eq-Disable Select
0: Use value of EQ_DISABLE pin.
1: Use value in “Eq-Disable Value” bit
3
Eq-Disable Value
If Eq-Disable Select = 1, then:
0: Equalizer is enabled
1: Equalizer is disabled (allows data to be sent upstream over
cable pair connected to inputs)
If Eq-Disable Select = 0, then this bit is ignored.
4
Color Select
0: Use value of COLOR pin
1: Use value in “Color Value” bit
5
Color Value
If Color Select = 1, then
0: Monochrome Mode
1: Color Mode
If Color Select = 0, then this bit is ignored.
6
Invert Select
0: Use value of INVERT pin.
1: Use value in “Invert Value” bit
7
Invert Value
If Invert Select = 1, then
0: Incoming signal is not inverted
1: Incoming signal is inverted
If Invert Select = 0, then this bit is ignored.
1:0
Locking Mode/Manual
Length Enable
00 = Continuous Monitoring
01 = Lock Until Signal Loss*
10 = Lock Until Reset
11 = Manual Length**
*Signal must be missing for at least 1ms in order to trigger a
re-equalization.
**In Manual Length mode, the polarity corrector is disabled
and the polarity must be set using the INVERT bit or pin.
Note: The FREEZE pin must be tied to ground/a logic low for
this function to work correctly.
3:2
Noise Filter
00: No Noise Filtering
01: Min Noise Filtering
10 or 11: Max Noise Filtering
4
Cable Type
0: Cat 5/Cat 6 Mode
1: Steel Core Coax Mode
This bit is ignored in all modes except Manual Length (reg
0x05[1:0] = 11).
Set to 1 if using copper-coated steel-core coaxial cable and
you are in Manual Length.
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Bypassing and Layout
Considerations
960MegaQ™ requires a dedicated ground plane in order to
function properly. For 2-layer boards, pour a quarter-inch ground
plane extending around the device on both the top and bottom
layers. Ensure that the ground plane on the bottom layer is a solid
plane with no traces cutting through it. Bypass capacitors must
be placed as close as possible to the device in order to ensure
good performance at longer lengths of equalization. Ensure that
the ground connections for the bypass capacitors connect directly
to the same uniform ground plane described previously.
General PowerPAD Design Considerations
The thermal pad must be connected to the ground plane for heat
dissipation. Figure 14 is an example of how to use vias to remove
heat from the IC.
Power Dissipation
The maximum power dissipation allowed in a package is
determined according to Equation 1:
T JMAX – T AMAX
PD MAX = -------------------------------------------Θ JA
(EQ. 1)
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or:
for sourcing use Equation 2:
V OUT
PD MAX = V S × I SMAX + ( V S – V OUT ) × ---------------R
(EQ. 2)
L
for sinking use Equation 3:
(EQ. 3)
PD MAX = V S × I SMAX + ( V OUT – V S ) × I LOAD
FIGURE 14. PCB VIA PATTERN
The thermal pad is electrically connected to GND through the high
resistance IC substrate. We recommend you fill the thermal pad
area with vias. The via array should be centered in the thermal
pad and placed such that the center on center spacing is 3x the
via radius. Vias should be small, but large enough to allow solder
wicking during reflow. Connect all vias to ground. It is important
the vias have a low thermal resistance for efficient heat transfer.
Do not use “thermal relief” patterns. It is important to have a solid
connection of the plated-through hole to each plane.
15
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
FN8358.0
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ISL59960
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
December 18, 2012
FN8358.0
CHANGE
Initial Release
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the fastest growing markets within the industrial and infrastructure,
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our winning team, visit our website and career page at www.intersil.com.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective product information page.
Also, please check the product information page to ensure that you have the most updated datasheet: ISL59960
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
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For additional products, see www.intersil.com/en/products.html
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
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ISL59960
Package Outline Drawing
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
4X
4.00
2.0
16X 0.50
A
B
16
6
PIN #1 INDEX AREA
20
6
PIN 1
INDEX AREA
1
4.00
15
2 .70 ± 0 . 15
11
(4X)
5
0.15
6
10
0.10 M C A B
4 20X 0.25 +0.05 / -0.07
20X 0.4 ± 0.10
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
SEATING PLANE
0.08 C
2. 70 )
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
C
0 . 2 REF
5
( 20X 0 . 6)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
17
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