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ntact ou SIL or www.inte
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Sheet
June 1, 2006
TER
1-888-IN
350MHz, 4x1 Video Crosspoint Switch
with Synchronous Controls
The HA4344B is a very wide bandwidth 4x1 crosspoint switch
ideal for professional video switching, HDTV, computer
display routing, and other high performance applications. This
circuit features very low power dissipation, excellent
differential gain and phase, high off isolation, symmetric slew
rates, fast switching, and latched control signals. When
disabled, the output is switched to a high impedance state,
making the HA4344B ideal for matrix routers.
The latched control signals allow for synchronized channel
switching. When CK1 is low, the master control latch loads
the next switching address (A0, A1, CS), while the closed
(assuming CK2 is the inverse of CK1) slave control latch
maintains the crosspoint in its current state. CK2 switching
low closes the master latch (with previous assumption),
loads the now open slave latch, and switches the crosspoint
to the newly selected channel. Channel selection is
asynchronous (changes with any control signal change) if
both CK1 and CK2 are low.
Ordering Information
PART
NUMBER
HA4344BCB
HA4344BCB
0 to 70
16 Ld SOIC M16.15
HA4344BCBZ
(Note)
4344BCBZ
0 to 70
16 Ld SOIC M16.15
(Pb-free)
HA4344BCBZ96 4344BCBZ
(Note)
0 to 70
16 Ld SOIC M16.15
Tape & Reel
(Pb-free)
Features
• Low Power Dissipation . . . . . . . . . . . . . . . . . . . . . .105mW
• Symmetrical Slew Rates . . . . . . . . . . . . . . . . . . 1400V/s
• 0.1dB Gain Flatness. . . . . . . . . . . . . . . . . . . . . . . 100MHz
• -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 350MHz
• Off Isolation (100MHz) . . . . . . . . . . . . . . . . . . . . . . . .70dB
• Crosstalk Rejection (30MHz) . . . . . . . . . . . . . . . . . . .80dB
• Differential Gain and Phase . . . . . . . . . . . . . . 0.01%/0.01°
• High ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . .>2000V
• TTL Compatible Control Signals
• Latched Control Lines for Synchronous Switching
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Professional Video Switching and Routing
• RGB Video Distribution Systems
• RF Switching and Routing
Pinout
HA4344B (SOIC)
TOP VIEW
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Functional Diagram
DECODE
A1
DL Q
C
DL Q
DL Q
C
C
EN2
DL Q
C
DL Q
C
EN3
DL Q
C
DL Q
C
CS
CK1
CK2
IN0
1
16 V+
GND
2
15 A0
IN1
3
14 A1
GND
4
13 CS
IN2
5
12 OUT
GND
6
11 CK2
IN3
7
10 CK1
GND
8
9 V-
Timing Diagram
DL Q
C
EN1
A0
FN3956.4
• Computer Graphics
PART
TEMP. RANGE
PKG.
MARKING
(°C)
PACKAGE DWG. #
EN0
HA4344B
CK1
IN0
IN1
IN2
IN3
CK2
OUT
A0, A1, CS
OUT
CHX
CHX
CHY
CHZ
CHY
CHX
CHX
CHZ
CHZ
100k
100k
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HA4344B
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY
Digital Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Analog Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2000V
Thermal Resistance (Typical, Note 1)
JA (°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . . 175°C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
2. If an input signal is applied before the supplies are powered up, the input current must be limited to these maximum values.
Electrical Specifications
VSUPPLY = 5V, RL = 10k, VCS = 0.8V, Unless Otherwise Specified
(NOTE 4)
TEMP. (°C)
MIN
TYP
MAX
UNITS
Full
4.5
5.0
5.5
V
VCS = 0.8V
25, 70
-
10.5
13
mA
VCS = 0.8V
0
-
-
15.5
mA
VCS = 2.0V
25, 70
-
400
450
A
VCS = 2.0V
0
-
400
580
A
25, 70
2.7
2.8
-
V
0
2.4
2.5
-
V
Output Current
Full
15
20
-
mA
Input Bias Current
Full
-
30
50
A
Output Offset Voltage
Full
-10
-
10
mV
Output Offset Voltage Drift (Note 3)
Full
-
25
50
V/C
Turn-On Time
25
-
160
-
ns
Turn-Off Time
25
-
320
-
ns
Output Glitch During Switching
25
-
10
-
mV
Input Logic High Voltage
Full
2
-
-
V
Input Logic Low Voltage
Full
-
-
0.8
V
PARAMETER
TEST CONDITIONS
DC SUPPLY CHARACTERISTICS
Supply Voltage
Supply Current (VOUT = 0V)
ANALOG DC CHARACTERISTICS
Output Voltage Swing Without Clipping VOUT = VINVIO20mV
SWITCHING CHARACTERISTICS
DIGITAL DC CHARACTERISTICS
CLK1, CLK2 Input Current
0 to 4V
Full
-
40
50
A
CS, A0, A1 Input Current
0 to 4V
Full
-2
-
2
A
1VP-P
25
-
0.055
0.063
dB
Full
-
0.07
0.08
dB
Full
-
0.004
0.006
dB
AC CHARACTERISTICS
Insertion Loss
Channel-to-Channel Insertion Loss
Match
2
FN3956.4
June 1, 2006
HA4344B
Electrical Specifications
VSUPPLY = 5V, RL = 10k, VCS = 0.8V, Unless Otherwise Specified (Continued)
(NOTE 4)
TEMP. (°C)
MIN
TYP
MAX
UNITS
RS = 47, CL = 10pF
25
-
350
-
MHz
RS = 29, CL = 20pF
25
-
300
-
MHz
RS = 16, CL = 33pF
25
-
220
-
MHz
RS = 9, CL = 52pF
25
-
160
-
MHz
RS = 47, CL = 10pF
25
-
150
-
MHz
RS = 29, CL = 20pF
25
-
110
-
MHz
RS = 16, CL = 33pF
25
-
100
-
MHz
RS = 9, CL = 52pF
25
-
70
-
MHz
Input Resistance
Full
200
400
-
k
Input Capacitance
Full
-
1.5
-
pF
Enabled Output Resistance
Full
-
15
-

PARAMETER
TEST CONDITIONS
-3dB Bandwidth
0.1dB Flat Bandwidth
Disabled Output Capacitance
VCS = 2.0V
Full
-
2.5
-
pF
Differential Gain
4.43MHz (Note 3)
25
-
0.01
0.02
%
Differential Phase
4.43MHz (Note 3)
25
-
0.01
0.02
°
Off Isolation
1VP-P , 100MHz, VCS = 2.0V
Full
-
70
-
dB
Crosstalk Rejection
1VP-P, 30MHz
Full
-
80
-
dB
Slew Rate (1.5VP-P, +SR/-SR)
RS = 47, CL = 10pF
25
-
1400/1490
-
V/s
RS = 29, CL = 20pF
25
-
1200/1260
-
V/s
RS = 16, CL = 33pF
25
-
870/940
-
V/s
RS = 9, CL = 52pF
25
-
750/710
-
V/s
Full
-
0.01
0.1
%
Full
-
12
-
M
Total Harmonic Distortion (Note 3)
Disabled Output Resistance
VCS = 2.0V
NOTES:
3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
4. Units are 100% tested at 25°C; guaranteed, but not tested at 0°C and 70°C.
AC Test Circuit
500
HA4344B
VIN
75
400
RS
510
75
+
VOUT
HFA1100
CX
10k
NOTE: CL = CX + Test Fixture Capacitance.
3
FN3956.4
June 1, 2006
HA4344B
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
N
INDEX
AREA
H
0.25(0.010) M
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
B M
INCHES
E
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
C
0.10(0.004)
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3859
0.3937
9.80
10.00
3
E
0.1497
0.1574
3.80
4.00
4
e

B S
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N

NOTES:
MILLIMETERS
16
0°
16
8°
0°
7
8°
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
4
FN3956.4
June 1, 2006
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