SEMTECH UR6HCPS2-SP40

PS2AdaptTM UR6HCPS2-SP40
Converts PS/2 Data to Serial or SPI
HID & SYSTEM MANAGEMENT PRODUCTS, PROTOCOL INTERPRETER FAMILY
FEATURES
TM
The IC was designed specifically
for RISC-based portable devices
that are limited to ASI and SPI
interfaces. The PS2AdaptTM allows
designers to easily connect PS/2
devices to their system.
The UR6HCPS2-SP40 emulates all
the functions of the 8042 keyboard
controller which typically resides on
the AT/PS/2 motherboard. The
Zero-PowerTM PS2AdaptTM will power
down even between
key presses and bewteen mouse
reports. Typical power
consumption is only 1 µA operating
between 3-5 Volts.
• Typically consumes less than 1 µA
• Interfaces the host system via
either Asynchronous Serial
Interface or Serial Peripheral
Interface (SPI)
• Jumper selectable interface and
Baud rate
• Offers four PS/2 ports for the hotplug connection of external
keyboards or mice including
MouseWheel, 5 button mice and
absolute mode touch screens
• Easy to use, one way
communication protocol
• Operating voltage between 3
and 5 Volts
• Custom versions available in
small or large quantities
• Small 7x7 mm package to
accommodate slim designs
APPLICATIONS
• PDAs
• System Legacy Support
• H/PCs
• Web Phones
PIN ASSIGNMENTS
E1DATA
E1CLK
E0DATA
E0CLK
_RTS/_SS
The PS2Adapt is a Zero-Power
protocol interpreter that can link an
AT/PS/2-compatible Human Input
Device (HID), such as a keyboard,
mouse, bar-code reader, etc. to any
host system equipped with either
Asynchronous Serial Interface (ASI)
or the Serial Peripheral Interface
(SPI).
TM
E3CLK
E2DATA
E2CLK
DESCRIPTION
24
17
25
The UR6HCPS2-SP40 boasts 4
external PS/2 ports that support the
hot-plug connection of an external
PS/2 keyboard or mouse,
including MouseWheel, 5-button
mice and touch screens in absolute
mode.
16
RES0
LED0
LED1
E3DATA
RxD
TxD
SCLK
SDATA
_PWR_OFF
_CTS/_ATN
CONF0
Each of four external PS/2 ports
also support more than 140 key
scan codes including international
language keys, internet keys, and
power keys. The PS2AdaptTM also
offers 4 reserved pins for LED
functions, their functions can be
customized by Semtech.
LED2
LED3
VSS
_OSCOUT
OSCIN
UR6HCPS2-SP40-FG
LQFP
32
9
1
8
VDD
VSS2
_RESET
CONF1
VREF
X_PWR
ASI/_SPI_SEL
CONF2
PS2Adapt is a trademark of Semtech Corp. All
other trademarks belong to their respective
companies.
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
1
www.semtech.com
ORDERING CODE
Package options
32-pin Plastic LQFP
Pitch In mm’s
0.8 mm
TA = -40°C to +85°C
UR6HCPS2-SP40-FG
Other materials
PS2AdaptTM Evaluation Kit
Part number
EVK6-PS2-SP40-100
ASI/_SPI_SEL
FUNCTIONAL DIAGRAM
SDATA
SCLK
RxD
TxD
External
PS/2 Port 0
Dual Mode
Serial
Communications
Port
External
PS/2 Port 1
ATN/CTS
PWR_OFF
Power
Management
Unit
HID Manager
SS/RTS
External
PS/2 Port 2
External
PS/2 Port 3
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
2
E0CLK
E0DATA
E1CLK
E1DATA
E2CLK
E2DATA
E3CLK
E3DATA
www.semtech.com
FUNCTIONAL DESCRIPTION
The PS2AdaptTM consists
functionally of three major sections.
These are the Dual Mode Serial
Communications Interface, the
Power Management Unit, and the
HID Manager. All sections
communicate with each other and
operate concurrently.
HID MANAGER
The UR6HCPS2-SP40 Human Input
Device (HID) Manager is
responsible for the configuration
and handling of HID devices that
are attached to the controller
through the four external PS/2 ports.
The HID Manager has the following
responsibilities:
1. Initialize PS/2 keyboards and
mice
2. Mix the information from external
PS/2 devices
3. Formatting and relaying reports of
the HID devices to the Host.
OPERATIONS BELOW 5 V
The standard PS/2 devices are
specified for supply voltage of 5V.
Operations of the UR6PS2-SP40 at
a lower voltage (3V) are only
possible if the HID devices
connected to ALL external PS/2
ports are capable of 3V operations.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
PIN DEFINITIONS
Pin Numbers
Mnemonic
Power Supply
VDD
VREF
VSS
VSS2
_RESET
8
5
11
7
6
PWR
AI
PWR
PWR
I
Positive Supply Voltage: +3V-+5V
Positive Analog Ref Voltage
Ground: analog signal
Ground: negative supply voltage
Hardware Reset Pin:
at Low-level, this pin holds the
UR6HCPS2-SP40 in a reset state.
Oscillator Pins
OSCIN
9
I
_OSCOUT
10
O
Oscillator input: connect ceramic
resonator with built-in load capacitors
or CMOS clock from external oscillator
4 MHz operating frequency
Oscillator Output: connect ceramic
resonator with built-in load capacitors
or keep open if external oscillator
is used
18
19
20
21
22
23
24
25
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
30
I±Int
X_PWR
4
AI
Power Off Signal: capable of
Interrupt on both Positive and Negative
edges
External PS/2 Device Power
Detector
Communication
Interface
_SS/_RTS
17
I_Int
_ATN/_CTS
31
O
TXD
27
O
RXD
26
I
SDATA
29
SCLK
28
PS/2 Ports
E0CLK
E0DATA
E1CLK
E1DATA
E2CLK
E2DATA
E3CLK
E3DATA
System Status
Monitoring
_PWR_OFF
3
LQFP
Type
I
Name and Function
Clock: for External Device 0
Data: for External Device 0
Clock: for External Device 1
Data: for External Device 1
Clock: for External Device 2
Data: for External Device 2
Clock: for External Device 3
Data: for External Device 3
Ready_To_Send: Active-Low
signal Input.Low-level indicates that
the Host System is ready to send
data from UR6HCPS2-SP40.
Attention (SPI Mode) or
Clear_To_Send (Asynchronous
Serial Mode ): Active-Low signal
Output. Low-level indicates that the
UR6HCPS2-SP40 has data to send to
the Host System
Transmit Data (Asynchronous
Serial Mode): Idle = "High" = 1
Receive Data (Asynchronous
Serial Mode): Reserved future use
Master-In-Slave-Out (SPI Mode):
keep open for ASI mode or tie to Gnd
Serial Clock (SPI Mode): in SPI
Mode, use the following Clock
sequence:Idle-high/ Negative-Edge
(Shift Data) \ Positive-Edge (Latch
Data), Idle-High. Keep open or tie to
Gnd for ASI mode
www.semtech.com
PIN DEFINITIONS, (CON’T)
Pin Numbers
Mnemonic
Configuration Pins
CONF0
CONF1
CONF2
ASI/_SPI_SEL
32
1
2
3
I
I
I
I
Configuration pin 0; see Note 2
Configuration pin 1; see Note 2
Configuration pin 2; see Note 2
SPI/Serial Selector pin. High:Serial;
Reserved for
LED0
LED1
LED2
LED3
RES0
12
13
14
15
16
I/O
I/O
I/O
I/O
I/O
Reserved
Reserved
Reserved
Reserved
Reserved
LQFP
Type
Name and Function
LED Driver
LED Driver
LED Driver
LED Driver
GPIO
/
/
/
/
GPIO
GPIO
GPIO
GPIO
Note 1: An underscore in front of the pin mnemonic denotes an active low signal.
Note 2: When Asynchronous Serial Interface (ASI) mode is selected, ASI/_SPI_SEL pin is
high and pins CONF2:CONF1:CONF0 select the following Baud Rates:
111: 19200 bps; 110: 9600 bps; 101: 1200 bps; 100: 600 bps; 011: 300 bps
010: 31250 bps; 001: 62500 bps.
When SPI mode is selected, ASI/_SPI_SEL pin is low. If CONF0 is high, the trasnfer sequence
is MSB to LSB, otherwise, LSB to MSB.
Note 3: For ASI/_SPI_SEL pin use the following setting:
1: Asynchronous Serial Mode; 0: Serial Peripheral Interface (SPI) mode
Note 4: In ASI mode, SDATA and SCLK are driven to low after reset. In SPI mode, TXD, RXD,
CONF1 and CONF2 are driven to low after reset. In both ASI and SPI mode, LED0, LED1,
LED2, LED3 and RES0 are configured as inputs with pull-up resistors.
Pin Types Legend: AI=Analog Input; I=Input; O=Output; I/O=Input or Output;
I/nD=Input or Output with N-channel Open Drain driver;
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
4
www.semtech.com
COMMUNICATIONS INTERFACE FOR THE UR6HCPS2-SP40
The diagrams below illustrate the SPI and ASI communications interfaces,
respectively.
SPI Communications Interface
The IC determines the mode of
communication with the Host during
power-up by reading the value of
the ASI/_SPI_SEL pin. If the pin is
tied high, the ASI mode is enabled.
If it is low, the SPI interface is
enabled.
The PS2AdaptTM implements the SPI
mode by single direction
communication that supports bit
rates up to 250 Kb/s. Several Hosts
and companion chips implement
the SPI protocol in order to
communicate with a wide range of
peripherals such as EEPROMs, A/D
converters, MCUs and other system
components.
MOSI
MISO
SCLK
Host
(master)
_SS1
_ATN
_SS2
SDATA
The UR6HCPS2-SP40 offers two
modes of serial communications:
"Synchronous Peripheral Interface"
(SPI) mode and the "Asynchronous
Serial Interface" (ASI) mode.
PS2AdaptTM
(slave)
Slave 2
ASI Communications Interface
The UR6HCPS2-SP40 deploys the
_ATN as an additional hand-shake
signal in order to support low power
operation of the bus.
The PS2AdaptTM implements the ASI
mode at fixed preselected baud
rates: 300bps, 600bps, 1200bps,
9600bps, 19200bps, 31250bps and
62500bps, depending on the
Configuration pins’ state on power
up.
HOST
In ASI mode, the UR6HCPS2-SP40
deploys the _RTS & _CTS as
additional hand-shake signals in
order to support low power
operation of the bus.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
5
_CTS
_CTS
_RTS
_RTS
RxD
RxD
TxD
TxD
UR6HCPS2-SP40
www.semtech.com
REPORTS
Overview
The PS2AdaptTM UR6HCPS2-SP40
will report three types of package
formats for relative mouse, absolute
mouse and keyboard report
respectively.
Each mouse packet contains 4
bytes; keyboard packet contains 2
bytes. The 7th bit of each byte is
used for synchronization. The 7th
bit for the first byte is 1 and for the
other bytes is 0.
Keyboard Data Report
8-bit key number (K0-K7) is an
identification of a keyboard key,
which is defined in the USAR key
table (see Page 7).
PS/2 Mouse Data Report
There are two different kinds of
mouse data packages for the
external PS/2 devices. One is
absolute mode that is for
touchscreens and the other is
relative mode for standard PS/2
devices, including MouseWheel.
The resolution for the absolute
mouse is 10 bits (1000 points) in X
and Y direction.
Keyboard Package Format
Byte # 7
1
1
6
1
KBD
2
K6
0
Bit Number
5
4
3
Not
Caps
Num
Assigned Lock
Lock
1:On
1:On
/0:Off
/0:Off
K5
K4
K3
2
Scroll
Lock
1:On
/0:Off
K2
K1
K0
Absolute Mode PS/2 Mouse Package Format
Byte # 7
1
1
2
3
4
0
0
0
6
0
Mouse
Y9
X6
Y6
5
0
Absolute
Y8
X5
Y5
Bit Number
4
3
0
0
1 penup 1 penup
Y7
X*
X4
X3
Y4
Y3
2
0
1 penup
X9
X2
Y2
1
0
0
0
1 penup 1 penup
X8
X7
X1
X0
Y1
Y0
Note 4: The bits that are marked with X* are reserved for future use. Now the value given is
zero.
Relative Mode PS/2 Mouse Package Format
Byte # 7
1
1
2
3
4
0
0
0
6
0
Mouse
X6
Y6
X*
5
1
Relative
X5
Y5
B5
Bit Number
4
3
Ysign
Xsign
2
M
1
R
0
L
X4
Y4
B4
X2
Y2
Z2
X1
Y1
Z1
X0
Y0
Z0
X3
Y3
Z3
Note 5: The bits that are marked with X* are reserved for future use. Now the value given is
zero.
The relative mouse data format
takes into consideration the 5button and MouseWheel devices.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
1
0
1:Make K7
/0:Break
6
www.semtech.com
PS/2 SCAN CODE SETS ACCORDING TO THE KEY NUMBER
Key Name
Key
Number
No Event
0
Overrun Error
1
POST Fail
2
ErrorUndefined
3
aA
4
bB
5
cC
6
dD
7
eE
8
fF
9
gG
10
hH
11
iI
12
jJ
13
kK
14
lL
15
mM
16
nN
17
oO
18
pP
19
qQ
20
rR
21
sS
22
tT
23
uU
24
vV
25
wW
26
xX
27
yY
28
zZ
29
1!
30
[email protected]
31
3#
32
4$
33
5%
34
6^
35
7&
36
8*
37
9(
38
0)
39
Return
40
Escape
41
Backspace
42
Tab
43
Space
44
-_
45
=+
46
[{
47
]}
48
\|
49
Europe 1 (Note 2) 50
;:
51
‘“
52
`~
53
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
PS/2 Set
1 Make
PS/2 Set
1 Break
PS/2 Set
2 Make
PS/2 Set
2 Break
None
FF
FC
UNASSIGNED
1E
30
2E
20
12
21
22
23
17
24
25
26
32
31
18
19
10
13
1F
14
16
2F
11
2D
15
2C
2
3
4
5
6
7
8
9
0A
0B
1C
1
0E
0F
39
0C
0D
1A
1B
2B
2B
27
28
29
None
None
None
UNASSIGNED
9E
B0
AE
A0
92
A1
A2
A3
97
A4
A5
A6
B2
B1
98
99
90
93
9F
94
96
AF
91
AD
95
AC
82
83
84
85
86
87
88
89
8A
8B
9C
81
8E
8F
B9
8C
8D
9A
9B
AB
AB
A7
A8
A9
None
0
FC
UNASSIGNED
1C
32
21
23
24
2B
34
33
43
3B
42
4B
3A
31
44
4D
15
2D
1B
2C
3C
2A
1D
22
35
1A
16
1E
26
25
2E
36
3D
3E
46
45
5A
76
66
0D
29
4E
55
54
5B
5D
5D
4C
52
0E
None
None
None
UNASSIGNED
F0 1C
F0 32
F0 21
F0 23
F0 24
F0 2B
F0 34
F0 33
F0 43
F0 3B
F0 42
F0 4B
F0 3A
F0 31
F0 44
F0 4D
F0 15
F0 2D
F0 1B
F0 2C
F0 3C
F0 2A
F0 1D
F0 22
F0 35
F0 1A
F0 16
F0 1E
F0 26
F0 25
F0 2E
F0 36
F0 3D
F0 3E
F0 46
F0 45
F0 5A
F0 76
F0 66
F0 0D
F0 29
F0 4E
F0 55
F0 54
F0 5B
F0 5D
F0 5D
F0 4C
F0 52
F0 0E
7
www.semtech.com
PS/2 SCAN CODE SETS ACCORDING TO THE KEY NUMBER
Key Name
USAR Key
Number
,<
54
.>
55
/?
56
Caps Lock
57
F1
58
F2
59
F3
60
F4
61
F5
62
F6
63
F7
64
F8
65
F9
66
F10
67
F11
68
F12
69
Print Screen(Note 1)70
Scroll Lock
71
Pause
72
Insert (Note 1)
73
Home (Note 1)
74
Page Up (Note 1) 75
Delete (Note 1)
76
End (Note 1)
77
Page Down(Note 1) 78
Right Arrow (Note 1)79
Left Arrow (Note 1) 80
Down Arrow(1)
81
Up Arrow (Note 1) 82
Num Lock
83
Keypad/(Note 1)
84
Keypad *
85
Keypad 86
Keypad +
87
Keypad Enter
88
Keypad 1 End
89
Keypad 2 Down
90
Keypad 3 PageDn 91
Keypad 4 Left
92
Keypad 5
93
Keypad 6 Right
94
Keypad 7 Home
95
Keypad 8 Up
96
Keypad 9 PageUp 97
Keypad 0 Insert
98
Keypad . Delete
99
Europe 2 (Note 2) 100
App
101
Keyboard Power
102
Keypad =
103
F13
104
F14
105
F15
106
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
PS/2 Set
1 Make
PS/2 Set
1 Break
PS/2 Set
2 Make
PS/2 Set
2 Break
33
34
35
3A
3B
3C
3D
3E
3F
40
41
42
43
44
57
58
E0 37
46
E1 1D 45
E1 9D C5
E0 52
E0 47
E0 49
E0 53
E0 4F
E0 51
E0 4D
E0 4B
E0 50
E0 48
45
E0 35
37
4A
4E
E0 1C
4F
50
51
4B
4C
4D
47
48
49
52
53
56
E0 5D
UNASSIGNED
59
5D
5E
5F
B3
B4
B5
BA
BB
BC
BD
BE
BF
C0
C1
C2
C3
C4
D7
D8
E0 B7
C6
None
41
49
4A
58
5
6
4
0C
3
0B
83
0A
1
9
78
7
E0 7C
7E
E1 14 77 E1
F0 14 F0 77
E0 70
E0 6C
E0 7D
E0 71
E0 69
E0 7A
E0 74
E0 6B
E0 72
E0 75
77
E0 4A
7C
7B
79
E0 5A
69
72
7A
6B
73
74
6C
75
7D
70
71
61
E0 2F
UNASSIGNED
0F
2F
37
3F
F0 41
F0 49
F0 4A
F0 58
F0 05
F0 06
F0 04
F0 0C
F0 03
F0 0B
F0 83
F0 0A
F0 01
F0 09
F0 78
F0 07
E0 F0 7C
F0 7E
None
8
E0 D2
E0 C7
E0 C9
E0 D3
E0 CF
E0 D1
E0 CD
E0 CB
E0 D0
E0 C8
C5
E0 B5
B7
CA
CE
E0 9C
CF
D0
D1
CB
CC
CD
C7
C8
C9
D2
D3
D6
E0 DD
UNASSIGNED
D9
DD
DE
DF
E0 F0 70
E0 F0 6C
E0 F0 7D
E0 F0 71
E0 F0 69
E0 F0 7A
E0 F0 74
E0 F0 6B
E0 F0 72
E0 F0 75
F0 77
E0 F0 4A
F0 7C
F0 7B
F0 79
E0 F0 5A
F0 69
F0 72
F0 7A
F0 6B
F0 73
F0 74
F0 6C
F0 75
F0 7D
F0 70
F0 71
F0 61
E0 F0 2F
UNASSIGNED
F0 0F
F0 2F
F0 37
F0 3F
www.semtech.com
PS/2 SCAN CODE SETS ACCORDING TO THE KEY NUMBER
Key Name
USAR Key
Number
F16
107
F17
108
F18
109
F19
110
F20
111
F21
112
F22
113
F23
114
F24
115
Keyboard Execute 116
Keyboard Help
117
Keyboard Menu
118
Keyboard Select
119
Keyboard Stop
120
Keyboard Again
121
Keyboard Undo
122
Keyboard Cut
123
Keyboard Copy
124
Keyboard Paste
125
Keyboard Find
126
Keyboard Mute
127
Keyboard Vol up
128
Keyboard Vol Dn 129
Keyboard Locking/ 130
Caps Lock
Keyboard Locking 131
Num Lock
Keyboard Locking 132
Scroll Lock
Keyboard ,
133
(Brazilian Keypad .)
Keyboard Equal
134
sign
Keyboard
135
Int'l 1 (Ro)
Keyboard Int’l 2
136
(Katakana/Hiragana)
Keyboard
137
Int'l 3 ¥ (Yen)
Keyboard
138
Int'l 4 (Henkan)
Keyboard
139
Int'l 5 (Muhenkan)
Keyboard Int'l 6
140
(PC9800 Keypad , )
Keyboard Int'l 7
141
Keyboard Int'l 8
142
Keyboard Int'l 9
143
Keyboard Lang 1 144
(Hanguel/English)
Keyboard Lang 2 145
(Hanja)
Keyboard Lang 3 146
(Katakana)
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
PS/2 Set
1 Make
PS/2 Set
1 Break
PS/2 Set
2 Make
PS/2 Set
2 Break
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
7E
FE
6D
F0 6D
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
73
F3
51
F0 51
70
F0
13
F0 13
7D
FD
6A
F0 6A
79
F9
64
F0 64
7B
FB
67
F0 67
5C
DC
27
F0 27
UNASSIGNED
UNASSIGNED
UNASSIGNED
F2
UNASSIGNED
UNASSIGNED
UNASSIGNED
None
UNASSIGNED
UNASSIGNED
UNASSIGNED
F2
UNASSIGNED
UNASSIGNED
UNASSIGNED
None
F1
None
F1
None
78
F8
63
F0 63
9
www.semtech.com
PS/2 SCAN CODE SETS ACCORDING TO THE KEY NUMBER
Key Name
USAR Key
Number
Keyboard Lang 4 147
(Hiragana)
Keyboard Lang 5 148
(Zenkaku/Hankaku)
Keyboard Lang 6 149
Keyboard Lang 7 150
Keyboard Lang 8 151
Keyboard Lang 9 152
Keyboard Alternate 153
Erase
Keyboard SysReq/ 154
Attention
Keyboard Cancel 155
Keyboard Clear
156
Keyboard Prior
157
Keyboard Return 158
Keyboard Separator159
Keyboard Out
160
Keyboard Oper
161
Keyboard Clear
162
/Again
Keyboard
163
CrSel/Props
Keyboard ExSel
164
Left Control
165
Left Shift
166
Left Alt
167
Left GUI
168
Right Control
169
Right Shift
170
Right Alt
171
Right GUI
172
System Power
173
System Sleep
174
System Wake
175
Scan Next Track
176
Scan Previous Track177
Stop
178
Play/ Pause
179
Mute
180
Bass Boost
181
Loudness
182
Volume Up
183
Volume Down
184
Bass Up
185
Bass Down
186
Treble Up
187
Treble Down
188
Media Select
189
Mail
190
Calculator
191
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
PS/2 Set
1 Make
PS/2 Set
1 Break
PS/2 Set
2 Make
PS/2 Set
2 Break
77
F7
62
F0 62
76
F6
5F
F0 5F
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
1D
2A
38
E0 5B
E0 1D
36
E0 38
E0 5C
E0 5E
E0 5F
E0 63
E0 19
E0 10
E0 24
E0 22
E0 20
UNASSIGNED
UNASSIGNED
E0 30
E0 2E
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
6D
E0 6C
E0 21
UNASSIGNED
9D
AA
B8
E0 DB
E0 9D
B6
E0 B8
E0 DC
E0 DE
E0 DF
E0 E3
E0 99
E0 90
E0 A4
E0 A2
E0 A0
UNASSIGNED
UNASSIGNED
E0 B0
E0 AE
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
E0 ED
E0 EC
E0 A1
UNASSIGNED
14
12
11
E0 1F
E0 14
59
E0 11
E0 27
E0 37
E0 3F
E0 5E
E0 4D
E0 15
E0 3B
E0 34
E0 23
UNASSIGNED
UNASSIGNED
E0 32
E0 21
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
E0 50
E0 48
E0 2B
UNASSIGNED
F0 14
F0 12
F0 11
E0 F0 1F
E0 F0 14
F0 59
E0 F0 11
E0 F0 27
E0 F0 37
E0 F0 3F
E0 F0 5E
E0 F0 4D
E0 F0 15
E0 F0 3B
E0 F0 34
E0 F0 23
UNASSIGNED
UNASSIGNED
E0 F0 32
E0 F0 21
UNASSIGNED
UNASSIGNED
UNASSIGNED
UNASSIGNED
E0 F0 50
E0 F0 48
E0 F0 2B
10
www.semtech.com
PS/2 SCAN CODE SETS ACCORDING TO THE KEY NUMBER
Key Name
Key
Number
PS/2 Set
1 Make
PS/2 Set
1 Break
PS/2 Set
2 Make
PS/2 Set
2 Break
My Computer
WWW Search
WWW Home
WWW Back
WWW Forward
WWW Stop
WWW Refresh
WWW Favorites
192
193
194
195
196
197
198
199
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
E0
6B
65
32
6A
69
68
67
66
EB
E5
B2
EA
E9
E8
E7
E6
40
10
3A
38
30
28
20
18
F0
F0
F0
F0
F0
F0
F0
F0
40
10
3A
38
30
28
20
18
Note 1: In PS/2 mode, Scan Set 1 & 2, each keycode is preceded or followed by additional bytes of data. These
codes are documented in WHQLKEYS.DOC, available from Microsoft.
Note 2: These keys have various legends depending upon the locale for which the keyboard is manufactured.
Europe 1 is typically in AT-101 Key Position 42 next to the Enter key. Europe 2 is typically in AT-101 Key Position 45,
between the Left Shift and Z keys.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
11
www.semtech.com
ASYNCHRONOUS SERIAL INTERFACE (ASI) MODE
Baud rate:
The PS2AdaptTM implements the ASI mode at fixed preselected Baud rates: 300bps, 600bps, 1200bps, 9600bps,
19200bps, 31250bps and 62500bps, depending on the Configuration pins’ state on power up. The IC can achieve
these standard Baud rates by using a 4MHz oscillator.
Protocol:
In Serial mode, the PS2AdaptTM supports transmission in one direction only (IC to Host). The IC starts the
transmission to the system when it has mouse/keyboard package pending. The data format is one start bit, 8 data
bits, no parity and one stop bit.
1. The UR6HCPS2-SP40 asserts _CTS low to indicate that a packet transfer will start.
2. The Host asserts _RTS low to indicate that it is ready to receive data.
_RTS low means that system can receive data (e.g. UART is operational).
3. The UR6HCPS2-SP40 places data on TXD line when it detects the _RTS low.
4. When one package is successfully transmitted, the IC raises _CTS.
Notes on the Protocol:
To assure fast transmission, the system must assert _RTS low as soon as possible. If the system is ready to receive
the data, it doesn't have to raise _RTS between packages.
The UR6HCPS2-SP40 checks _RTS after every byte transmission. If _RTS returns to high, it means that the
transmission was unsuccessful. The IC will raise _CTS to abort the transmission and the entire package will be retransmitted.
The maximum time of T1 is 10ms. If the system cannot assert _RTS low after 10ms of _CTS low, the IC will raise
_CTS to abort the transmission request. After that, the PS2AdaptTM will try to start the transmission again.
_CTS
_RTS
1st
Byte
TXD
Last
Byte
t1
Figure 1: Serial Transmission Timing
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
12
www.semtech.com
SERIAL PERIPHERAL INTERFACE (SPI) MODE
The Serial Peripheral Interface (SPI) is a synchronous bi-directional multi-slave protocol. In SPI mode, the
PS2AdaptTM acts as a slave device. The IC only supports transmission and doesn't support receiving. SPI data
transfer can be performed at a maximum clock rate of 500 KHz. If CONF0 pin is high, the data transfer sequence is
MSB to LSB; if CONF0 pin is low the sequence is LSB to MSB. The SDATA pin outputs data every time the transfer
clock changes from high to low level.
Protocol:
1. The UR6HCPS2-SP40 asserts _ATN low to indicate that a mouse packet is waiting for transfer.
2. The Host asserts _SS low to indicate that it is ready to receive data. _SS low means the system selected SPI
PS2AdaptTM as its communication device.
3. On detecting _SS low, the IC enables the SPI interface and places data in the SPI data TX buffer. After a short
delay, the system supplies eight clocks to get the data from the IC. The minimum time t2 from _SS low to first SPI
clock is 50us.
4. When a byte is transferred successfully, the system has to wait a minimum of 50us to begin the clocks for next
byte transmission.
5. When the four-byte mouse package / 2-byte keyboard package is transmitted, the system stops the SPI clock. If
it needs to communicate with other SPI devices, it has to wait for _ATN return to high. _ATN high means the SPI port
of UR6HCPS2-SP40 is now in high Impedance State.
_ATN
_SS
SCLK
2nd
Byte
1st
Byte
SDATA
t1
t2
t3
Last
Byte
t4
Figure 2: SPI Transmission Timing: (_SS toggles for every package).
Notes on the Protocol:
To assure the fast transmission, system must assert _SS low as soon as possible, see Figure 2. If the system is
ready to get data, it doesn't have to raise _SS between packages, see Figure 3.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
13
www.semtech.com
PROTOCOLS FOR THE UR6HCPS2-SP 40 IN SPI MODE (CON’T)
SPI Communication Timing Parameters
Symbol
t1
t2
Description
_ATN low to _SS low
_SS low to first clock
(_SS toggles for every package)
_ATN low to first clock
(_SS low)
Last clock of transmitted
byte to next byte’s first clock
Last byte TX finish to
_ATN to high
t2’
t3
t4
Min
50
Max
10
5000
Units
ms
us
50
5000
us
50
5000
us
30
us
t2
_ATN
_SS
SCLK
SDATA
2nd
Byte
1st
Byte
Last
Byte
t4
t3
Figure 3: SPI Packet Transmission Timing: (_SS low always).
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
14
www.semtech.com
POWER MANAGEMENT
Modes of Operation
The UR6HCPS2-SP40 has two
modes of operation relating to its
power consumption.
The "Stop" mode is the lowest
power consumption mode. In this
mode, the oscillator is stopped and
the IC consumes only 1 µA of
leakage current. This is the default
mode to which the IC will revert to
when it is idle.
The "Run" mode is entered briefly,
only to process an event or while an
interrupt-generating signal condition
persists. The IC will remain in this
mode until there are no tasks to
handle, such as PS/2 reports or
inititalization of PS/2 devices.
The PS2AdaptTM implements two power management methods: systemcoordinated power management and Self Power ManagementTM (SPM).
System-coordinated power management is implemented by the _PWR_OFF
pin (Power Off). If the _PWR_OFF pin is low, the PS2Adapt™ will disable all
external PS/2 device reports to save power and to turn off keyboard Leds.
Self-Power ManagementTM is a method implemented by the PS2AdaptTM IC
that, independently of any system intervention, results in the lowest power
consumption possible within the given parameters of its operation. Through
Self Power ManagementTM, the PS2AdaptTM IC is capable of typically
operating at only 1 µA, independent of the state of the system. Self Power
ManagementTM primarily determines the actual power consumption of the
IC.
Even when the Host is in the active state, the IC can still operate most of
the time at only 1 µA, even with active external PS/2 devices attached to it.
PWR_OFF Pin Low
OR
No Task
The PS/2 devices connected to the
four external PS/2 ports are
initialized at different sampling
rates, depending on the port: PS/2
port 0 and PS/2 port 1 to 100
packages per second and 40
packages per second for PS/2 port
3 and PS/2 port 4. When mice
plugged into PS/2 port 0 and 1 are
moved, the PS2AdaptTM will typically
stay in stop mode for 25% of the
working time. When mice plugged
into PS/2 port 3 and 4 are moved
with a slower sampling rate, the
PS2AdaptTM will typically stay in stop
mode for 72% of working time.
Therefore, we recommend that PS/2
port 3 and 4 are used for mice, if
there is no specific requirement of
mice sampling rate.
Run
Stop
PWR_OFF Pin High
AND
External PS/2 Report
Note 1: When there is no mouse motion, all
ports have same power consumption, less
than 1µA.
Note 2: When a keyboard is plugged into
these ports, the rate of the power saving are
same, less than 1µA.
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
15
www.semtech.com
CON_1X10
JP8
P1
CON_DB9
www.semtech.com
VCC
1
2
3
4
GND
GND
VCC
GND
GND
SW_DIP_4
S1
VCC
GND
RXD
RTS
TXD
CTS
1
2
3 RXD
4 RTS
5 TXD
6 CTS
7 SCLK
8 SDATA
9
10
GND
1
6
2
7
3
8
4
9
5
8
7
6
5
GND
+
1uF
C11
8
13
7
14
6
R2IN
MAX232
R1IN
T2OUT
T1OUT
V-
VCC
9
12
10
11
5
4
3
GND
1
2
1
RN2
10K
C15
1uF
GND
1
2
3
VCC
CON_SIP3
JP6
RN3
10K
VCC
C14
1uF
+
+
16
VCC
GND
GND
R2OUT
R1OUT
T2IN
T1IN
C2-
C2+
C1-
6
5
C1+
8
7
JP9
5
6
7
8
5
6
7
8
1
2
3
4
V+
30
29
28
27
26
CONF0
CONF1
CONF2
SCISPI_SEL
24
CONF0
CTS / ATN
PWR_OFF
SDATA
SCLK
TXD
RXD
E3DATA
VCC
32
_CTS / _AT N 31
PWR_OFF
SDATA
SCLK
TX D
RXD
25
32-PIN LQFP
4
2
D1
6
8
330
RN1
X_PWR
D2
D3
D4
U1
UR6HCPS2-SP40-FG
2
U3
23
E2DATA
CONF2
2
3
VCC
22
E2CLK
ASI/_SPI_SEL
C13
10uF
4
CON2
JP7
21
E1DATA
X_PWR
1
3
5
7
GND
GND
GND
+
9
10
11
12
13
14
15
16
1
U2
C2
10uF
VCC
Y1
4.00MHz
LED3
LED2
LED1
LED0
RES0
TC54VC2702ECB
C1
.1uF
OSCIN
OSCOUT
VSS
LED3
LED2
LED1
LED0
RES0
GND
VCC
GND
RES0
GND
GND
GND
GND
GND
C4
47pF
GND
C6
47pF
GND
C8
47pF
GND
C10
47pF
GND
JP4
MDIN6_SH
2
JP2
MDIN6_SH
JP1
MDIN6_SH
6
4
3
5
2
6
4
2
6
4
1
5
3
1
5
3
1
6
4
3
5
2
JP3
MDIN6_SH
CON_SIP3
JP5
1
(C)2000 USAR, A Semtech Company
UR6HCPS2-SP40-FG Rev 1.0
C3
47pF
C5
47pF
C7
47pF
C9
47pF
VCC
8
8
15
2
1
17
RTS / SS
1
2
3
7
+
5
2
4
3
1
6
5
20
E1CLK
VREF
4
3
8
7
6
_RESET
1
2
3
4
19
E0DATA
RESET
E3CLK
1
18
E0CLK
VSS2
16
7
E3DATA
8
E3CLK
CONF1
E2DATA
VDD
E1CLK
2
E1DATA
3
E1CLK
8
E0CLK
8
+
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
7
E0DATA
7
_RTS / _SS
7
C12
1uF
12uH
L1
12uH
L2
12uH
L3
12uH
L4
X_PWR
EVALUATION BOARD SCHEMATIC FOR THE UR6HCPS2-SP40-FG
18
19
17
RTS / SS
E1CLK
E0DATA
20
21
E1DATA
22
E2CLK
23
E3CLK
E0CLK
LED3
_PWR_OFF
VSS
CTS / ATN
CONF0
OSCOUT
OSCIN
16
15
14
13
12
11
10
9
VDD
X_PWR
SDATA
VSS2
CONF0
32
LED2
32-PIN LQFP
RESET
31
SCLK
VREF
_CTS / _ATN
E2DATA
24
30
LED1
UR6HCPS2-SP40-FG
X_PWR
_ATN
PWR_OFF
RES0
LED0
TXD
ASI/_SPI_SEL
PWR_OFF
29
RXD
CONF2
MISO
SDATA
28
U1
CONF1
SCLK
SCLK
E0CLK
_SS
_RTS / _SS
27
E1CLK
VCC
E3DATA
E0DATA
26
E1DATA
17
25
GND
E1CLK
VCC
E2DATA
E3CLK
E3DATA
GND
Y1
4.00MHz
8
7
6
5
4
3
2
1
GND
VCC
GND
+
_RESET
R1
10K
NOTES:
CONF0 High: MSB first; Low: LSB first
PWR_OFF High: Power On; Low: Power Off
GND
C2
10uF
GND
U2
2
VCC
GND
(C)2000 USAR, A Semtech Company
PS/2 to Serial Adapter UR6HCPS2-SP40-FG ( SPI Interface)
UR6HCPS2-SP40-FG-SPI.SCH Revision 1.0
1
TC54VC2702ECB
3
www.semtech.com
C1
.1uF
GND
SUGGESTED SCHEMATIC FOR THE UR6HCPS2-SP40-FG IN SPI MODE
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
E3DATA
E3CLK
E2DATA
E2CLK
E1DATA
E1CLK
E0DATA
E0CLK
NOTES:
PWR_OFF High: Power On;Low: Power Off
17
18
RTS / SS
E0CLK
19
E1CLK
E0DATA
20
21
E1DATA
23
22
E2CLK
E3CLK
32-PIN LQFP
_PWR_OFF
VSS
CTS / ATN
CONF0
OSCOUT
OSCIN
16
15
14
13
12
11
10
9
VDD
CONF1
LED3
VSS2
32
CONF0
LED2
UR6HCPS2-SP40-FG
SDATA
RESET
31
SCLK
VREF
_CTS / _ATN
LED1
X_PWR
30
RES0
LED0
TXD
ASI/_SPI_SEL
_CTS
PWR_OFF
RXD
CONF2
PWR_OFF
E2DATA
24
29
TXD
U1
CONF1
28
RXD
E0CLK
_RTS
_RTS / _SS
27
E1CLK
VCC
E3DATA
E0DATA
26
E1DATA
18
25
GND
E1CLK
VCC
E2DATA
E3CLK
GND
E3DATA
CONF2 CONF1 CONF0
111: 19200 bps
110: 9600 bps
101: 1200 bps
100: 600 bps
011: 300 bps
010: 31250 bps
001: 62500 bps
Y1
4.00MHz
CONF2
8
7
6
5
4
3
2
1
GND
VCC
GND
+
X_PWR
_RESET
GND
C2
10uF
GND
U2
(C)2000 USAR SYSTEMS, A Semtech Company
PS/2 to Serial Adapter UR6HCPS2-SP40-FG ( Serial Interface)
UR6HCPS2-SP40-FG-SCI.SCH
Revision 1.0
2
VCC
1
TC54VC2702ECB
3
www.semtech.com
VCC
C1
.1uF
GND
SUGGESTED SCHEMATIC FOR THE UR6HCPS2-SP40-FG IN SERIAL MODE
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
E3DATA
E3CLK
E2DATA
E2CLK
E1DATA
E1CLK
E0DATA
E0CLK
MECHANICAL INFORMATION FOR FG (32-PIN LQFP) PACKAGE
HD
D
32
e
25
F
24
8
17
E
HE
1
y
b
L1
A2
9
A1
c
Symbol
L
Detail F
A
b2
ME
e
MD
I2
A
A1
A2
b
c
D
E
e
HD
HE
L
L1
y
b2
I2
MD
ME
16
Dimension in Millimeters
Min
Nom
Max
–
–
1.7
0.1
0.2
0
1.4
–
–
0.3
0.35
0.45
0.105
0.125
0.175
6.9
7.0
7.1
6.9
7.0
7.1
0.8
–
–
8.8
9.0
9.2
8.8
9.0
9.2
0.3
0.5
0.7
1.0
–
–
0.1
–
–
0ϒ
10ϒ
–
0.5
–
–
–
–
1.0
–
–
7.4
–
–
7.4
Recommended PCB Footprint
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
19
www.semtech.com
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Ratings
Supply Voltage
Input Voltage
Current Drain per Pin
(not including Vss or Vdd)
Operating Temperature
UR6HCSP2-SP40
Storage Temperature Range
Symbol
Vdd
Vin
I
Value
-0.3 to 7.0
Vss -0.3 to Vdd +0.3
20
Unit
V
V
mA
Ta
T low to T high
-20 to +85
-40 to +125
°C
°C
Tstg
DC Electrical Characteristics, Temperature range=T low to T high unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Supply Voltage
3.0
5.0
5.5
Output Voltage (10 µA load)
Voh
Vdd–0.1
Vol
0.1
Input High Voltage
Vih
0.8 x Vdd
Vdd
Input Low Voltage
Vil
Vss
0.2xVdd
Input Current
Iin
+/- 1
Supply Current
(Vdd=5.0 Vdc+/-10%, Vss=0)
Idd
3.0
TBD
Unit
V
V
V
V
µA
mA
Control Timing (Vdd=5.0 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of Operation
fosc
MHz
Resonator Option
4.0
External Clock Option
4.0
Copyright Semtech, 2000-2001
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For sales information
and product literature,
contact:
HID & System Mgmt Division
Semtech Corporation
568 Broadway
New York, NY 10012
[email protected]
http://www.semtech.com
212 226 2042 Telephone
212 226 3215 Telefax
Semtech Western Regional Sales
805-498-2111 Telephone
805-498-3804 Telefax
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972-437-0380 Telephone
972-437-0381 Telefax
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+886-2-2748-3380 Telephone
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+81-45-948-5925 Telephone
+81-45-948-5930 Telefax
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+82-2-527-4377 Telephone
+82-2-527-4376 Telefax
Northern European Sales Office
+44 (0)2380-769008 Telephone
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+33 (0)1 69-28-22-00 Telephone
+33 (0)1 69-28-12-98 Telefax
Central European Sales Office
+49 (0)8161 140 123 Telephone
+49 (0)8161 140 124 Telefax
Copyright 2000-2001 Semtech Corporation. All rights reserved.
PS2Adapt and Zero-Power are trademarks of Semtech Corporation.
Semtech is a registered trademark of Semtech Company. All other
trademarks belong to their respective companies.
INTELLECTUAL PROPERTY DISCLAIMER
This specification is provided "as is" with no warranties whatsoever
including any warranty of merchantability, fitness for any particular
purpose, or any warranty otherwise arising out of any proposal,
specification or sample. A license is hereby granted to reproduce
and distribute this specification for internal use only. No other
license, expressed or implied to any other intellectual property
rights is granted or intended hereby. Authors of this specification
disclaim any liability, including liability for infringement of proprietary
rights, relating to the implementation of information in this
specification. Authors of this specification also do not warrant or
represent that such implementation(s) will not infringe such rights.
Copyright Semtech
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