DATASHEET

®
F
IO
MA T
FO R
N
I
TED 503A
Sheet
PDA ELData
1
U
R
O
EL1503
E
N SE
July 17, 2001
High Power Differential Line Driver
Features
The EL1503 ADSL Line Driver contains two wideband highvoltage drivers which are ideally suited for both ADSL and
HDSL2 applications. They can supply a 39.2VP-P signal into
a 22Ω load while exhibiting very low distortion. The EL1503
also has a number of power saving features. The IADJ pin
can be used to set the maximum supply current and the C0
and C1 pins can be used to digitally vary the supply current
to one of four modes. These modes include full power, low
power, terminate only and power down.
• High power ADSL driver
The EL1503 uses current-feedback type amplifiers, which
achieve a high slew rate while consuming moderate power.
They retain their frequency response over a wide range of
externally set gains. The EL1503 operates on ±5V to ±12V
supplies and consumes only 12.5mA per amplifier.
The device is supplied in a standard form-factor 20-pin SO
(0.300”), 16-pin thermal SO (0.150”), and the small footprint
(4x5mm) 24-pin LPP packages. Center pins on each side of
the 20-pin and 16-pin packages are used as ground
connections and heat spreaders. The LPP package has the
potential for a low θJA (<40°C/W) and dissipates heat by
means of a thermal pad that is soldered onto the PCB. All
package options are specified for operation over the full
-40°C to +85°C temperature range.
1
FN7038.0
• 39.2VP-P differential output drive into 22Ω
• 42.4VP-P differential output drive into 65Ω
• Driver 2nd/3rd harmonics of -66dBc/-72dBc at 2VP-P into
100Ω differential
• Supply current of 12.5mA per amplifier
• Supply current control
• Power saving modes
• Standard surface-mount packages
• Ultra-small LPP package
Applications
• ADSL line drivers
• HDSL2 line drivers
• Video distribution amplifiers
Ordering Information
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL1503CL
24-Pin LPP
-
MDP0046
EL1503CL-T7
24-Pin LPP
7”
MDP0046
EL1503CL-T13
24-Pin LPP
13”
MDP0046
EL1503CM
20-Pin SO (0.300")
-
MDP0027
EL1503CM-T13
20-Pin SO (0.300")
13”
MDP0027
EL1503CS
16-Pin SO (0.150”)
-
MDP0027
EL1503CS-T7
16-Pin SO (0.150”)
7”
MDP0027
EL1503CS-T13
16-Pin SO (0.150”)
13”
MDP0027
PART NUMBER
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL1503
s
Pinouts
EL1503
[20-PIN SO (0.300”)]
TOP VIEW
18 VS+
A
+
21 VIN-B
22 NC
20 VOUTB
VS- 3
19 NC
-
23 VIN-A
19 VOUTB
VOUTA 2
-
NC 1
20 VIN-B
VIN-A 1
B
+
24 VOUTA
EL1503
(24-PIN LPP)
TOP VIEW
17 GND*
NC 2
18 NC
GND* 4
VS- 3
17 VS+
GND* 5
16 GND*
16 NC
GND* 6
15 GND*
NC 5
15 NC
GND* 7
14 GND*
NC 6
14 NC
VIN+A 8
13 VIN+B
THERMAL
PAD
NC 4
C1 9
13 GND
VIN+B 12
IADJ 11
C0 10
POWER
CONTROL
LOGIC
*GND pins are heat spreaders
EL1503
[16-PIN SO (0.150”)]
TOP VIEW
VIN-A 1
16 VIN-B
VOUTA 2
15 VOUTB
VS- 3
B
13 GND*
+
GND* 5
12 GND*
VIN+A 6
11 VIN+B
C1 7
C0 8
2
-
GND* 4
14 VS+
A
-
C1 9
C0 10
+
VIN+A 8
GND 7
POWER
CONTROL
LOGIC
10 IADJ
9 NC
12 IADJ
11 NC
EL1503
Absolute Maximum Ratings (TA = 25°C)
VS+ to VS- Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.4V
VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +26.4V
VS- Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . . . -26.4V to 0.3V
Input C0/C1 to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Driver VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- to VS+
Current into Any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
Output Current from Driver (Static) . . . . . . . . . . . . . . . . . . . . 100mA
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-60°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . .-40°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
VS = ±12V, RF = 1.5kΩ, RL= 65Ω, IADJ = C0 = C1 = 0V, TA = 25°C. Amplifiers tested separately.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CHARACTERISTICS
IS+(Full Power)
Positive Supply Current per Amplifier
All Outputs at 0V, C0 = C1 = 0V
10
12.5
16
mA
IS-(Full Power)
Negative Supply Current per Amplifier
All Outputs at 0V, C0 = C1 = 0V
-15
-11.5
-9
mA
IS+(Low Power)
Positive Supply Current per Amplifier
All Outputs at 0V, C0 = 5V, C1 = 0V
7
9
11.5
mA
IS-(Low Power)
Negative Supply Current per Amplifier
All Outputs at 0V, C0 =5V, C1 = 0V
-10.5
-8
-6
mA
IS+(Terminate)
Positive Supply Current per Amplifier
All Outputs at 0V, C0 = 0V, C1 = 5V
4
5.1
7
mA
IS-(Terminate)
Negative Supply Current per Amplifier
All Outputs at 0V, C0 = 0V, C1 = 5V
-6
-4
-3
mA
IS+(Power Down)
Positive Supply Current per Amplifier
All Outputs at 0V, C0 = C1 = 5V
0.75
1.05
1.7
mA
IS-(Power Down)
Negative Supply Current per Amplifier
All Outputs at 0V, C0 = C1 = 5V
-0.5
-0.25
0.07
mA
IGND
Gnd Supply Current per Amplifier
All Outputs at 0V
-1
mA
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
-30
30
mV
ΔVOS
VOS Mismatch
-15
15
mV
IB+
Non-Inverting Input Bias Current
-15
15
µA
IB-
Inverting Input Bias Current
-50
50
µA
ΔIB-
IB- Mismatch
-30
30
µA
ROL
Transimpedance
0.4
eN
0.8
MΩ
Input Noise Voltage
4.5
nV√ Hz
iN
-Input Noise Current
13
pA/√ Hz
VIH
Input High Voltage
C0 & C1 inputs
VIL
Input Low Voltage
C0 & C1 inputs
IIH1
Input High Current for C1
C1 = 5V
IIH0
Input High Current for C0
C0 = 5V
IIL
Input Low Current for C1or C0
C1 = 0V, C0 = 0V
3
2.7
V
0.8
V
1.5
8
µA
0.75
4
µA
-1
1
µA
EL1503
Electrical Specifications
VS = ±12V, RF = 1.5kΩ, RL= 65Ω, IADJ = C0 = C1 = 0V, TA = 25°C. Amplifiers tested separately. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
RL = 65Ω
±10.3
±10.6
V
RL = 22Ω
±9.3
±9.8
V
450
mA
OUTPUT CHARACTERISTICS
VOUT
Loaded Output Swing
IOL
Linear Output Current
AV = 5, RL=10Ω, f=100kHz, THD=-60dBc
IOUT
Output Current
VOUT = IV, RL = 1Ω
1
A
DYNAMIC PERFORMANCE
BW
-3dB Bandwidth
AV = +5
80
MHz
HD2
2nd Harmonic Distortion
fC = 1MHz, RL = 100Ω, VOUT = 2VP-P
-66
dBc
fC = 1MHz, RL = 25Ω, VOUT = 2VP-P
-61
dBc
fC = 1MHz, RL = 100Ω, VOUT = 2VP-P
-77
dBc
fC = 1MHz, RL = 25Ω, VOUT = 2VP-P
-72
dBc
1100
V/µS
HD3
SR
3rd Harmonic Distortion
Slewrate
VOUT from -8V to +8V Measured at ±4V
4
700
EL1503
Typical Performance Curves
VS = ±5V, AV = 10, RL = 100Ω. FULL POWER MODE
VS = ±12V, AV = 10, RL = 100Ω, FULL POWER MODE
25
25
RF=1.5kΩ
RF=1.5kΩ
RF=1.82kΩ
RF=1.82kΩ
GAIN (dB)
GAIN (dB)
RF=1.3kΩ
RF=1.3kΩ
20
RF=2.0kΩ
RF=2.43kΩ
RF=2.74kΩ
15
100K
1M
20
RF=2.0kΩ
RF=2.4kΩ
RF=2.74kΩ
15
100K
100M
10M
10M
1M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 2. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
FIGURE 1. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
VS = ±12V, AV = 10, RL = 100Ω, 2/3 POWER MODE
VS = ±5V, AV = 10, RL = 100Ω, 2/3 POWER MODE
25
25
RF=1.3kΩ
RF=1.3kΩ
RF=1.5kΩ
RF=1.82kΩ
GAIN (dB)
GAIN (dB)
RF=1.5kΩ
RF=1.82kΩ
20
20
RF=2.0kΩ
RF=2.0kΩ
RF=2.4kΩ
RF=2.43kΩ
15
100K
RF=2.74kΩ
RF=2.74kΩ
1M
10M
15
100K
100M
1M
FREQUENCY (Hz)
100M
10M
Frequency (Hz)
FIGURE 3. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
FIGURE 4. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
VS = ±12V, AV = 10, RL = 100Ω, TERMINATE MODE
25
25
VS = ±5V, AV = 10, RL = 100Ω, TERMINATE MODE
RF=1.84kΩ
RF=1.82kΩ
RF=2.74kΩ
20
RF=2.43kΩ
RF=2.74kΩ
15
100M
RF=2.43kΩ
RF=2.0kΩ
GAIN (dB)
GAIN (dB)
RF=2.0kΩ
10M
1M
FREQUENCY (Hz)
FIGURE 5. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
5
100K
20
15
100K
1M
10M
FREQUENCY (Hz)
FIGURE 6. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
100M
EL1503
Typical Performance Curves
(Continued)
VS = ±12V, AV = 5, RL = 100Ω, FULL POWER MODE
VS = ±5V, AV = 5, RL = 100Ω, FULL POWER MODE
19
19
RF=1.3kΩ
RF=1.5kΩ
RF=1.5kΩ
RF=1.82kΩ
GAIN (dB)
GAIN (dB)
RF=1.82kΩ
14
9
100K
14
RF=2.4kΩ
RF=2.0kΩ
RF=2.4kΩ
RF=2.74kΩ
RF=2.74kΩ
RF=2.0kΩ
1M
10M
9
100K
100M
FREQUENCY (Hz)
10M
100M
FREQUENCY (Hz)
FIGURE 7. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
FIGURE 8. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
VS = ±12V, AV = 5, RL = 100Ω, 2/3 POWER MODE
VS = ±5V, AV = 5, RL = 100Ω, 2/3 POWER MODE
19
19
RF=1.3kΩ
RF=1.5kΩ
RF=1.5kΩ
RF=1.82kΩ
RF=1.82kΩ
RF=2.0kΩ
GAIN (dB)
GAIN (dB)
1M
14
RF=2.0kΩ
14
RF=2.4kΩ
RF=2.43kΩ
RF=2.74kΩ
RF=2.74kΩ
9
100K
10M
1M
9
100K
100M
FREQUENCY (Hz)
1M
10M
100M
FREQUENCY (Hz)
FIGURE 9. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
FIGURE 10. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
VS = ±12V, AV = 5, RL= 100Ω, TERMINATE MODE
VS = ±5V, AV = 5, RL = 100Ω, TERMINATE MODE
19
19
RF=2.0kΩ
RF=1.82kΩ
RF=2.43kΩ
RF=2.0kΩ
GAIN (dB)
GAIN (dB)
RF=1.82kΩ
14
RF=2.74kΩ
14
RF=2.4kΩ
RF=2.74kΩ
9
100K
1M
10M
FREQUENCY (Hz)
FIGURE 11. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
6
100M
9
100K
1M
10M
FREQUENCY (Hz)
FIGURE 12. DRIVER DIFFERENTIAL FREQUENCY
RESPONSE vs RF
100M
EL1503
Typical Performance Curves
(Continued)
100
100
25
IS+ (FULL
IS (mA)
iN (pA/√Hz)
eN (nV/√Hz)
10
IS- (FULL POWE
15
ER)
IS+ (2/3 POW
ER)
POW
I - (2/3
S
10
eN
100
10
1K
FREQUENCY (Hz)
0
1
100K
10K
0
4
8
10
12
-20
SUPPLY REJECTION (dB)
0
LEFT
DRIVER
-40
RIGHT
DRIVER
-60
-80
-100
10K
100K
1M
10M
FREQUENCY (Hz)
-20
LEFT
LEFT
DRIVER
DRIVE
-40
RIGHT
DRIVER
-60
-80
-100
10K
100M
FIGURE 15. POSITIVE SUPPLY REJECTION vs FREQUENCY
100K
VS = ±12V, AV=1, RF=1.5K
100
2/3 POWER
1
0
10K
FULL POWER
100K
1M
10M
FREQUENCY (Hz)
FIGURE 17. OUTPUT IMPEDANCE vs FREQUENCY
7
100M
OUTPUT IMPEDANCE (Ω)
10
1M
10M
FREQUENCY (Hz)
100M
FIGURE 16. NEGATIVE SUPPLY REJECTION vs FREQUENCY
VS = ±5V, AV=1, RF=1.5K
TERMINATE
OUTPUT IMPEDANCE (Ω)
6
FIGURE 14. SUPPLY CURRENT vs SUPPLY VOLTAGE
0
SUPPLY REJECTION (dB)
2
VS (V)
FIGURE 13. DRIVER INPUT VOLTAGE and FEEDBACK
CURRENT NOISE vs FREQUENCY
100
)
IS+ (TERMINATE
IS- (TERMINATE)
5
1
R)
20
iN
10
POWER)
TERMINATE
10
2/3 POWER
1
0
10K
FULL POWER
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 18. OUTPUT IMPEDANCE vs FREQUENCY
EL1503
Typical Performance Curves
(Continued)
VS=±5V, AV=5, RL=100Ω, FC=1MHz, FULL POWER
VS=±12V, AV=5, RL=100Ω, FC=1MHz, FULL POWER
-40
-45
-45
-50
-55
-65
HD (dB)
HD (dB)
-55
HD3
-60
-65
HD3
-70
-75
-75
HD2
-80
HD2
-85
-85
1
5
9
13
17
1
21
2
3
4
5
6
7
8
VOP-P (V)
VOP-P (V)
FIGURE 19. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
FIGURE 20. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
VS=±5V, AV=5, RL=100Ω, FC=1MHz, 2/3 POWER
VS=±5V, AV=5, RL=100Ω, FC=1MHz, 2/3 POWER
-50
-40
-55
-50
HD3
-65
HD (dB)
HD (dB)
-60
-70
-75
-60
HD3
-70
HD2
-80
HD2
-85
-80
1
5
9
13
17
21
1
2
3
VOP-P (V)
4
5
6
7
8
VOP-P (V)
FIGURE 21. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
FIGURE 22. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
VS=±5V, AV=5, RL=100Ω, FC=1MHz
VS=±12V, AV=5, RL=100Ω, FC=1MHz
-45
-40
-50
-50
THD (dB)
THD (dB)
-55
-60
2/3 POWER
-65
-70
-60
FULL POWER
-70
2/3 POWER
FULL POWER
-75
-80
-80
1
5
9
13
17
21
VOP-P (V)
FIGURE 23. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs OUTPUT AMPLITUDE
8
1
2
3
4
5
6
7
8
VOP-P (V)
FIGURE 24. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs OUTPUT AMPLITUDE
EL1503
Typical Performance Curves
(Continued)
VS = ±5V, AV = 5, RL = 100Ω, fC = 1MHz, FULL POWER
VS = ±12V, AV = 5, RL = 100Ω, fC = 1MHz, FULL
POWER
-60
-56
-62
-60
HD2
-64
HD2
-64
HD (dB)
HD (dB)
-66
-68
-70
-68
HD3
-72
-72
-74
HD3
-76
-76
-80
-78
1
3
5
7
11
9
13
15
17
1
19
2
4
3
5
6
VOP-P (V)
VOP-P (V)
FIGURE 25. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
FIGURE 26. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
VS = ±12V, AV = 5, RL = 100Ω, fC = 1MHz, 2/3 POWER
VS = ±5V, AV = 5, RL = 100Ω, fC = 1MHz, 2/3 POWER
-54
-58
-56
-60
-58
HD2
-62
HD (dB)
HD (dB)
-60
HD2
-62
-64
-64
HD3
-66
-68
-66
HD3
-70
-68
-70
-72
1
3
5
7
9
11
13
15
17
19
2
1
3
VOP-P (V)
FIGURE 27. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
-55
-57
-57
-59
2/3 POWER
THD (dBc)
THD (dBc)
VS = ±5V, AV = 5, RL = 100Ω, fC = 1MHz
-55
-61
-63
6
FIGURE 28. DIFFERENTIAL HARMONIC DISTORTION vs
OUTPUT AMPLITUDE
VS = ±12V, AV = 5, RL = 100Ω, fC = 1MHz
-59
5
4
VOP-P (V)
2/3 POWER
-61
-63
FULL POWER
FULL POWER
-65
-65
-67
-67
1
3
5
7
11
9
VOP-P (V)
13
15
17
19
FIGURE 29. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs OUTPUT AMPLITUDE
9
1
2
3
4
5
6
7
VOP-P (V)
FIGURE 30. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs OUTPUT AMPLITUDE
EL1503
Typical Performance Curves
35
(Continued)
AV = 10, RF = 1.82kΩ
AV = 10, RF = 1.82kΩ
3.5
W
FULL PO
30
E R MO D E
3.0
TERMIN
25
PEAKING (dB)
BW (MHz)
2.5
2/3 POWER MODE
20
MODE
TERMINATE
1.5
2/3 POW
ER MO
6
7
8
9
10
FULL POWER
0.5
10
5
11
0
12
5
6
7
8
±VS (V)
25
IS+ (FULL POWER)
IS- (FULL POWER)
IS+ (TERMINATE)
IS- (TERMINATE)
±IS (mA)
±IS (mA)
IS+ (2/3 POWER)
IS- (2/3POWER)
IS+ (2/3 POWER)
15
IS- (2/3 POWER)
IS+ (TERMINATE)
10
IS5
5
0
0
0
6
4
2
0
10
8
±IS (mA)
25
VS = ±5V
)
ER
OW
P
LL
R)
(F U
WE
PO
I S+
L
R)
L
WE
(FU
PO
3
/
I S2
(
ER)
I S+
POW
3
/
2
(
I SE)
INAT
E RM
(T
)
I S+
E
INAT
E RM
I - (T
20
±IS (mA)
)
ER
R)
OW
P
WE
L
O
L
P
)
L
(FU
ER
UL
OW
F
I S+
P
(
3
)
I S- + (2/
ER
IS
OW
P
(2/3
I ST E)
MINA
T ER
(
+
IS
E)
INAT
E RM
I - (T
10
10
FIGURE 34. IS vs RSET
VS = ±12V
15
8
RSET (kΩ)
FIGURE 33. IS vs RSET
20
6
4
2
RSET (kΩ)
25
12
IS+ (FULL POWER)
20
10
11
VS = ±5V, RSET to GND
IS- (FULL POWER)
15
10
MODE
FIGURE 32. DIFFERENTIAL PEAKING vs SUPPLY VOLTAGE
VS = ±12V, RSET to GND
20
9
DE
±VS (V)
FIGURE 31. DIFFERENTIAL BANDWIDTH vs SUPPLY
VOLTAGE
25
OD E
2.0
1.0
15
A TE M
15
10
S
5
S
5
0
0
0
100
200
300
ISET (µA)
FIGURE 35. IS vs ISET
10
400
500
0
100
200
300
ISET (µA)
FIGURE 36. IS vs ISET
400
500
EL1503
Typical Performance Curves
(Continued)
4.5
3.0
3.0
θJA = 80°C/W
1.0
0.5
0
-40
-20
0
20
40
60
80
/W
1.5
1.5
°C
θJA = 53°C/W
1.0
0.5
0
100
0
AMBIENT TEMPERATURE (°C)
25
50
4
3.5
POWER DISSIPATION (W)
85
100
FIGURE 38. POWER DISSIPATION vs AMBIENT
TEMPERATURE
16-PIN SO POWER DISSIPATION & THERMAL
RESISTANCE. USING ELANTEC EL1503CS
DEMOBOARD, 2”X2” (4-LAYER) DEMOBOARD WITH
HEATSINK VIA INTERNAL GROUND PHASE
3
47°C/W
2.5
2
1.5
1
0.5
0
-20
0
20
40
60
80
100
AMBIENT TEMPERATURE (°C)
FIGURE 39. POWER DISSIPATION vs AMBIENT TEMPERATURE
11
75
AMBIENT TEMPERATURE (°C)
FIGURE 37. POWER DISSIPATION vs AMBIENT
TEMPERATURE for VARIOUS MOUNTED θJAs
-40
24
2.0
2.0
7
=3
θJA = 43°C/W
2.703W
A
2.5
2.5
P
LP
POWER DISSIPATION (W)
θJA = 30°C/W
3.5
θJ
POWER DISSIPATION (W)
4.0
24-PIN LPP POWER DISSIPATION & THERMAL
RESISTANCE. USING JEDEC JESD51-7 HIGH
EFFECTIVE THERMAL CONDUCTIVITY (4-LAYER)
TEST BOARD, LPP EXPOSED DIEPAD SOLDERED TO
PCB PER JESD51-5
125
150
EL1503
Test Circuit
1 VIN-A
VIN-B 20
2 VOUTA
VOUTB 19
3 VS-
VS+ 18
4 GND
GND 17
5 GND
GND 16
6 GND
GND 15
7 GND
GND 14
8 VIN+A
VIN+B 13
9 C1
IADJ 12
10 C0
NC 11
RS
100
1W
R3
R4
56Ω
1/2W
56Ω
1/2W
332Ω
R16
R7
1
20
2
19
3
0.1µF
5µF
TANTALUM
C2
GND
LEFT
DRIVER
IN
R2
A
+
LEFT
DRIVER
OUT
-
1.5kΩ
-
B
+
1.5kΩ
RIGHT
DRIVER
OUT
18
5µF
4
17
5
16
6
15
7
14
8
13
9
12
0.1µF
TANTALUM
C1
GND
R17
51Ω
51Ω
10
C1
12
C0
11
VS+
RSET
RIGHT
DRIVER
IN
EL1503
Pin Descriptions
16-PIN SO
(0.150”)
20-PIN SO
(0.300")
24-PIN
LPP
PIN NAME
1
1
23
VIN-A
FUNCTION
CIRCUIT
Channel A Inverting Input
CIRCUIT 1
2
2
24
VOUTA
Channel A Output
3
3
3
VS-
Negative Supply
4, 5
4, 5, 6, 7
7
GND
Ground Connection
6
8
8
VIN+A
Channel A Non-Inverting Input
(Reference Circuit 1)
VS+
VS-
CIRCUIT 2
7
9
9
C1
Current Control Bit 1
VS+
6.7V
CIRCUIT 3
8
10
10
C0
Current Control Bit 0
9
11
1, 2, 4, 5, 6,
14, 15, 16,
18, 19, 22
NC
Not Connected
10
12
11
IADJ
Supply Current Control Pin
(Reference Circuit 3)
VS+
CIRCUIT 4
11
13
12
VIN+B
12, 13
14, 15, 16,
17
13
GND
Ground Connection
14
18
17
VS+
Positive Supply
15
19
20
VOUTB
16
20
21
VIN-B
13
Channel B Non-Inverting Input
(Reference Circuit 2)
Channel B Output
(Reference Circuit 1)
Channel B Inverting Input
(Reference Circuit 1)
EL1503
Applications Information
The EL1503 consists of two high-power line driver amplifiers
that can be connected for full duplex differential line
transmission. The amplifiers are designed to be used with
signals up to 4MHz and produce low distortion levels. A
typical interface circuit is shown in Figure 40 below.
DRIVER
INPUT
ROUT
+
-
LINE +
RF
RG
inductive sources. More than 100nH of source impedance
can cause ringing or even oscillations. This inductance is
equivalent to about 4” of unshielded wiring, or 6” of
unterminated transmission line. Normal high-frequency
construction obviates any such problem.
Power Supplies & Dissipation
Due to the high power drive capability of the EL1503, much
attention needs to be paid to power dissipation. The power
that needs to be dissipated in the EL1503 has two main
contributors. The first is the quiescent current dissipation.
The second is the dissipation of the output stage.
ZLINE
RF
ROUT
+
RF
RECEIVE
OUT +
R
RIN
+
RECEIVE
AMPLIFIERS
RECEIVE
OUT -
LINE -
+
-
R
RF
RIN
The quiescent power in the EL1503 is not constant with
varying outputs. In reality, 7mA of the 12.5mA needed to
power each driver is converted in to output current.
Therefore, in the equation below we should subtract the
average output current, IO, or 7mA, whichever is the lowest.
We’ll call this term IX.
Therefore, we can determine a quiescent current with the
equation:
P Dquiescent = V S × ( I S – 2I X )
where:
FIGURE 40. TYPICAL LINE INTERFACE CONNECTION
The amplifiers are wired with one in positive gain and the
other in a negative gain configuration to generate a
differential output for a single-ended input. They will exhibit
very similar frequency responses for gains of three or
greater and thus generate very small common-mode outputs
over frequency, but for low gains the two drivers RF's need
to be adjusted to give similar frequency responses. The
positive-gain driver will generally exhibit more bandwidth and
peaking than the negative-gain driver. If a differential signal
is available to the drive amplifiers, they may be wired so:
+
-
RF
2RG
RF
+
FIGURE 41. DRIVERS WIRED FOR DIFFERENTIAL INPUT
Each amplifier has identical positive gain connections, and
optimum common-mode rejection occurs. Further, DC input
errors are duplicated and create common-mode rather than
differential line errors.
VS is the supply voltage (VS+ to VS-)
IS is the maximum quiescent supply current (IS+ + IS-)
IX is the lesser of IO or 7mA (generally IX = 7mA)
The dissipation in the output stage has two main
contributors. Firstly, we have the average voltage drop
across the output transistor and secondly, the average
output current. For minimal power dissipation, the user
should select the supply voltage and the line transformer
ratio accordingly. The supply voltage should be kept as low
as possible, while the transformer ratio should be selected
so that the peak voltage required from the EL1503 is close to
the maximum available output swing. There is a trade of
however with the selection of transformer ratio. As the ratio
is increased, the receive signal available to the receivers is
reduced.
Once the user has selected the transformer ratio, the
dissipation in the output stages can be selected with the
following equation:
VS
P Dtransistors = 2 × I O × ⎛ ------- – V O ⎞
⎝ 2
⎠
where:
VS is the supply voltage (VS+ to VS-)
VO is the average output voltage per channel
IO is the average output current per channel
Input Connections
The EL1503 amplifiers are somewhat sensitive to source
impedance. In particular, they do not like being driven by
14
The overall power dissipation (PDISS) is obtained by adding
PDquiescent and PDtransistor.
EL1503
Then, the θJA requirement needs to be calculated. This is
done using the equation:
( T JUNCT – T AMB )
θ JA = ------------------------------------------------P DISS
where:
TJUNCT is the maximum die temperature (150°C)
TAMB is the maximum ambient temperature
PDISS is the dissipation calculated above
θJA is the junction to ambient thermal resistance for the
package when mounted on the PCB
This θJA value is then used to calculate the area of copper
needed on the board to dissipate the power. The graph
below show various θJA for the SO20 mounted on different
copper foil areas.
THERMAL RESISTANCE of 20-Pin SO (0.300")
EL1503 vs BOARD COPPER AREA
MOUNTED DEVICE θJA (°C/W)
55
Note: 2oz. COPPER USED
50
technique, but several aspects of board layout should be
noted. First, the heat should not be shunted to internal
copper layers of the board nor backside foil, since the
feedthroughs and fiberglass of the board are not very
thermally conductive. To obtain the best thermal resistance
of the mounted part, θJA, the topside copper ground plane
should have as much area as possible and be as thick as
practical. If possible, the solder mask should be cut away
from the EL1503 to improve thermal resistance. Finally,
metal heatsinks can be placed against the board close to the
part to draw heat toward the chassis.
Output Loading
While the drive amplifiers can output in excess of 500mA
transiently, the internal metallization is not designed to carry
more than 100mA of steady DC current and there is no
current-limit mechanism. This allows safely driving rms
sinusoidal currents of 2 x 100mA, or 200mA. This current is
more than that required to drive line impedances to large
output levels, but output short circuits cannot be tolerated.
The series output resistor will usually limit currents to safe
values in the event of line shorts. Driving lines with no series
resistor is a serious hazard.
TOP FOIL ONLY-WITH SOLDER MASK
TOP FOIL-WITH 0.45IN2 BOTTOM
FOIL WITH MANY FEEDTHROUGHS
45
40
Power Supplies
TOP FOIL ONLY-NO SOLDER MASK
35
30
0
1
2
3
4
5
6
7
8
9
10
FIGURE 42. AREA OF CIRCUIT BOARD HEAT SINK (IN2)
A separate application note details the 24-pin LPP PCB
design considerations.
Single Supply Operation
The EL1503 can also be powered from a single supply
voltage. When operating in this mode, the GND pins can still
be connected directly to GND. To calculate power
dissipation, the equations in the previous section should be
used, with VS equal to half the supply rail.
EL1503 PCB Design
A separate application note details the 24-pin LPP PCB
design considerations. The SO power packages (16 and 20
leads) are designed so that heat may be conducted away
from the device in an efficient manner. To disperse this heat,
the center leads (4 per side for the 20 lead and 2 per side for
the 16 lead) are internally connected to the mounting
platform of the die. Heat flows through the leads into the
circuit board copper, then spreads and convects to air. Thus,
the ground plane on the component side of the board
becomes the heatsink. This has proven to be a very effective
15
The amplifiers are sensitive to capacitive loading. More than
25pF will cause peaking of the frequency response. The
same is true of badly terminated lines connected without a
series matching resistor.
The power supplies should be well bypassed close to the
EL1503. A 3.3µF tantalum capacitor for each supply works
well. Since the load currents are differential, they should not
travel through the board copper and set up ground loops that
can return to amplifier inputs. Due to the class AB output
stage design, these currents have heavy harmonic content.
If the ground terminal of the positive and negative bypass
capacitors are connected to each other directly and then
returned to circuit ground, no such ground loops will occur.
This scheme is employed in the layout of the EL1503
demonstration board, and documentation can be obtained
from the factory.
Feedback Resistor Value
The bandwidth and peaking of the amplifiers varies with
supply voltage somewhat and with gain settings. The
feedback resistor values can be adjusted to produce an
optimal frequency response. Here is a series of resistor
values that produce an optimal driver frequency. The
bandwidth and peaking of the amplifiers varies with supply
voltage somewhat and with gain settings. The feedback
resistor values can be adjusted to produce an optimal
frequency response. Here is a series of resistor values that
EL1503
produce an optimal driver frequency response (1dB peaking)
for different supply voltages and gains:
TABLE 1. OPTIMUM DRIVER FEEDBACK RESISTOR FOR
VARIOUS GAINS AND SUPPLY VOLTAGES
DRIVER VOLTAGE GAIN
SUPPLY VOLTAGE
2.5
5
10
±5V
2.7K
2.2K
2.0K
±12V
2.2K
2.0K
2.0K
Power Control Function
The EL1503 contains two forms of power control operation.
Two digital inputs, C0 and C1, can be used to control the
supply current of the EL1503 drive amplifiers. As the supply
current is reduced, the EL1503 will start to exhibit slightly
higher levels of distortion and the frequency response will be
limited. The 4 power modes of the EL1503 are set up as
shown in the table below:
Another method for controlling the power consumption of the
EL1503 is to connect a resistor from the IADJ pin to ground.
When this pin is grounded (the normal state), the supply
current per channel is as per the specifications table on page
2. When a resistor is inserted, the supply current is scaled
according to the “IS vs RSET” graphs on page 10 in the
Performance Curves section.
Both methods of power control can be used simultaneously.
In this case, positive and negative supply currents (per amp)
are given by the equations below:
12.5mA
I S + = 1mA + ( C 1 × 2 ⁄ 3 ) × ------------------------------------------( 1 + R SET ÷ 1k )
12.5mA
+ ( C 0 × 1 ⁄ 3 ) × ------------------------------------------( 1 + R SET ÷ 1k )
12.5mA
I S - = 0 + ( C 1 × 2 ⁄ 3 ) × ------------------------------------------( 1 + R SET ÷ 1k )
12.5mA
+ ( C 0 × 1 ⁄ 3 ) × ------------------------------------------( 1 + R SET ÷ 1k )
TABLE 2. POWER MODES OF THE EL1503
C1
C0
0
0
IS Full Power Mode (CO or CP)
0
1
2/3 IS Power Mode (CO or CP)
1
0
1/3 IS Terminate only mode
1
1
Power down
OPERATION
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
16
Similar pages