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1-888-IN
Dual-Channel Laser Diode Driver with APC Amplifier
for Multi-Beam Printers
ISL58125
Features
The ISL58125 is a high-performance dual channel laser
driver that provides controlled current to grounded laser
diodes. A bias current is summed with the switched
current at the IOUT output, allowing the user to optimize
laser diode performance.
• Voltage-controlled Output Current Source
Output switched current flows when the LVDS signal
DATA is high. The output current returns to the
fixed-threshold value when DATA is low. Complete IOUT
shut-off is achieved by holding both of the DISx pins Hi,
which will override all other control pins.
• Very Few External Components Needed
• Internal LVDS Termination Resistors
• 300MHz Switching
• 110mA Output Current per channel
• Rise Time < 500ps
• Fall Time < 500ps
• APC Loop for Write Power Control
• Fast Settling APC Amplifier
A fast settling APC amplifier connects directly to the
monitor diode. The ISL58125 does not exhibit any
time-dependent droop since the calibration gain is stored
as a digital number.
• Single +5V Supply (±10%)
Ordering Information
• Pb-Free (RoHS compliant)
PART
NUMBER
(Note)
ISL58125CRZ-T13
PART
MARKING
58125 CRZ
PACKAGE
Tape & Reel
(Pb-free)
28 Ld QFN
PKG.
DWG. #
L28.4x5A
• Disable Feature for Power-Up Protection and
Conserving Power
• Zero Droop
Load Configuration
• Common-cathode LDs, Common-anode PD
IOUT1
PDIN IOUT2
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal
(e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device
information page for ISL58125. For more information on
MSL please see techbrief TB363.
July 22, 2013
FN6625.1
1
GND
Applications
• Laser Printer Applications
• Laser Diode Current Switching
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2009, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL58125
Pin Configuration
ERRB
VC2
VC1
CAL1B
CAL2B
27
26
25
24
23
28 SLPEN
ISL58125
(28 LD QFN)
TOP VIEW
DATA1 1
22 NC
DATA1B 2
21 GND
DATA2 3
20 VCC
DATA2B 4
19 IOUT1
THERMAL
PAD
GND 5
18 VCC
DIS1 6
17 IOUT2
DIS2 7
16 VCC
15 PDIN
2
14
IVOUT1
IVOUT2 13
11
RBIAS1
12
10
RBIAS2
RSET
9
NC
ROVR 8
FN6625.1
July 22, 2013
ISL58125
Pin Descriptions
PIN NAME
I/O
TYPE
DATA1
I
LVDS
Laser #1 Switching Control
DATA1B
I
LVDS
Laser #1 Switching Control
DATA2
I
LVDS
Laser #2 Switching Control
DATA2B
I
LVDS
Laser #2 Switching Control
GND
DESCRIPTION
Ground
Ground
DIS1
I
Digital
DIS1 = Low selects IOUT1
DIS2
I
Digital
DIS2 = Low selects IOUT2
I
Analog
Voltage Controlling Laser #1 Switching Current; 0V to 2V input for 0% to 100%
output
I
Analog
Voltage Controlling Laser #2 Switching Current
VC1
VC2
NC
No Connect
No Connect
ERRB = Low when output current is max OR Overheat OR Under Supply Voltage
ERRB
O
Open drain
IVOUT1
IVOUT2
O
Analog
Calibrate channel with an external trimpot to GND
Adjust the IV amplifier gain
RSET
O
Analog
Bandgap derived internal reference
ROVR
I
Analog
Resistor sets the peak current at which the error pin ERRB is pulled.
PDIN
I
Analog
Photo Diode input to the IV amplifier
Analog
Resistors set bias threshold current. See “Applications Information” on page 8 for
more details.
RBIAS1
RBIAS2
IOUT2
O
Analog
Laser #2 Current Output
IOUT1
O
Analog
Laser #1 Current Output
Power
Supply Voltage
VCC
CAL1B
I
TTL
Samples the laser #1 for APC; Active Low
CAL2B
I
TTL
Samples the laser #2 for APC; Active Low
SLPEN
I
TTL
Enable sleep mode when SLPEN = DISx = Hi
Thermal Pad
Exposed Thermal Pad should be soldered to GND
NOTE: Pins with the same name are not necessary internally connected together. LDD pins must not be used for connecting
together external components or features.
3
FN6625.1
July 22, 2013
ISL58125
Absolute Maximum Ratings (TA = +25°C)
Recommended Operating Conditions
Voltages Applied to:
VCC . . . . . . . . . . . . . . .
All Inputs . . . . . . . . . . .
IOUT . . . . . . . . . . . . . . .
LVDS Max Current Inputs
ESD Rating
Human Body Model . . . . .
Charged Device Model . . .
Thermal Resistance (Typical, Note 4)
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.....
.-0.5V
.....
.....
-0.5V to 6.0V
to VCC + 0.5V
. -0.5V to VCC
. . . . . . . 5mA
JA (°C/W)
28 Lead QFN . . . . . . . . . . . . . . . . . . . . . . .
42
Operating Ambient Temperature Range . . . . . . 0°C to +85°C
Maximum Junction Temperature . . . . . . . . . . . . . . . +150°C
Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
. . . . . . . . . . . . . . . . . . . . 3kV
. . . . . . . . . . . . . . . . . . . 1.5kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless
otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Standard Specification Conditions: Unless otherwise indicated, all tables are: VCC = 5.0V, DIS = Lo, TA = +25°C, RSET = 3.0k
Electrical Specifications
PARAMETER
Standard conditions, and/or as noted.
DESCRIPTION
VCC
Supply Voltage
ISdis
Supply Current (Disabled)
IS2
CONDITIONS
MIN
MAX
(Note 5) TYP (Note 5) UNIT
4.5
5.0
5.5
V
DISx = SLPEN = Hi
0.3
1.0
mA
Supply Current (Standby)
DISx = Hi
22
31
mA
VLO
Low Voltage Threshold
All TTL inputs
1.2
V
VHI
High Voltage Threshold
All TTL inputs
2.8
ILO
Input Low Current
All TTL inputs
-20
IHI
Input High Current
All TTL inputs
VSHUT
VCC Shut Down Voltage
VLVDS
LVDS Input Level
VCMR
LVDS Common Mode Voltage Range 300mVP-P
0.2
2.2
V
VC
Control Voltage
0.3
2.6
V
RTermination
Internal LVDS Termination Resistor
V
-10
2.5
Differential, with Vcm = 1.25V
µA
1
µA
2.9
V
0.2
V
180

EERB
VoutLOW
Digital Output Sink Capability
ERRB pin, sinking 5mA
0.4
V
IOVR-2k
Overcurrent trip point
ROVR = 2k, ERRB pin goes low
43
mA
VccUNR
UndervoltageTrip Point
ERRB pin goes low, No IOUT current
2.6
V
Laser Amplifier Output
PARAMETER
Standard conditions and/or as noted.
DESCRIPTION
CONDITIONS
MIN
MAX
(Note 5) TYP (Note 5) UNIT
IOUT
IOUTSW-max
Switched Output Current
VC = 2.6V
75
81
mA
IOUTBIAS-max
Bias Output Current
RBIAS = 1k
20
35
mA
IOFF
Output Off Current
DISx pins set to HIGH
-75
0
FREQOP
Operating Frequency
IOUT = maximum switch current
200
4
+75
µA
MHz
FN6625.1
July 22, 2013
ISL58125
Laser Amplifier Output
PARAMETER
Standard conditions and/or as noted. (Continued)
DESCRIPTION
CONDITIONS
MIN
MAX
(Note 5) TYP (Note 5) UNIT
IOUTPSRR
IOUT Supply Sensitivity
IOUT = 20mA, VCC = 5V ±10%
13
%/V
tR-IOUT
IOUT Rise Time
10% to 90%; typical LD for printer
0.5
ns
tF-IOUT
IOUT Fall Time
90% to 10%; typical LD for printer
0.7
ns
OUTENx_ton
IOUT on Propagation Delay
DATAx crossing to IOUT at 50% of final value
tPD_VC-IOUT
Propagation Time of VC
0.75V to 1.25V step
16
ns
tR_VC-IOUT
Rise Time of IOUT from VC
10% to 90%; resistive load, RLOAD = 10
25
ns
tF_VC-IOUT
Fall Time of IOUT from VC
90% to 10%; resistive load, RLOAD = 10
22
ns
VCBW
Bandwidth of VC
14
MHz
5
7
ns
VC
APC Electrical Specifications
PARAMETER
Standard conditions and/or as noted.
DESCRIPTION
CONDITIONS
MIN
MAX
(Note 5) TYP (Note 5) UNIT
tAPC-50
APC Response Time
0V to 2V step of VC
7.5
µs
IVgain
IV Amplifier Gain
External resistor RIV = 500
3.1
k
NOTE:
5. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
Timing Diagram
DIS
VC
CALB
DATA(LVDS)
CAL LEVEL
FIXED BIAS
LEVEL
SET BY RBIAS
IOUT
OFF
5
IOUT RISES TO
ITS VC
DEFINED
VALUE USING
THE LAST
CALIBRATION
GAIN SETTING
IN <1µs
OFF
FN6625.1
July 22, 2013
ISL58125
IOUT Control
DIS1
DIS2
DATA1
DATA2
CAL1
CAL2
SLPEN
IOUT1
IOUT2
x
x
x
1
OFF
OFF
Power-Down (Sleep Mode)
1
1
x
Standby (Full Standby Current, No IOUTs)
1
1
x
x
x
x
0
OFF
OFF
0
1
0
0
1
1
0
ON, BIAS ONLY
OFF
1
0
0
0
1
0
0
OFF
ON, BIAS ONLY
0
0
x
x
0
1
x
ON, CAL to level set by VC
OFF
0
0
x
x
1
0
x
OFF
ON, CAL to level set by VC
0
0
1
1
1
1
x
ON
ON
0
1
1
1
1
1
x
ON
OFF
1
0
1
1
1
1
x
OFF
ON
Normal Drive
NOTE: DATA1 and DATA2: 1 implies DATA>DATAB, 0 implies DATA<DATAB
6
FN6625.1
July 22, 2013
ISL58125
Typical Application
DATA1
+
-
DATA2
VCC
+
-
DATA2B
68
4.7µF
GAIN
CONTROL
0.1µF
SWITCHING
DRIVER
+
-
BEAD
DATA1B
IOUT1
VC1
NC
GND
+
-
RBIAS1
VCC
VC2
+
-
VCC
0.1µF
4.7µF
GND
GAIN
CONTROL
IOUT
RSET
+
-
BANDGAP
REF.
RBIAS2
LASERS
ROVR
PDIN
CAL.
POT
IVOUT2
CAL1B
+
-
68
SWITCHING
DRIVER
CAL2B
CAL.
POT
IV AMPLIFIER
DIS1
+5V
IVOUT1
LOGIC BLOCK
DIS2
ERRB
SLPEN
NC
7
FN6625.1
July 22, 2013
ISL58125
APC System Overview
As the laser heats up, or ages, its output power declines
relative to the applied current, so some form of power
control is required. The laser is optically coupled to a
photo-diode, so that the laser’s optical output can be
measured. Laser optical output power is controlled by
comparing the externally applied control voltage with the
voltage produced by the IV-amplifier which converts the
photo-diode’s output current into a voltage. Since the
calibrated gain is stored as a digital number in a register,
the ISL58125 exhibits none of the time-dependent droop
that is seen in most printers' laser diode drivers. This is
of particular importance during high dot/inch graphics
modes where the line may be slowed down very
significantly to allow 2400 dots per inch or even more.
Fixed-Threshold Laser Bias Control
1.05V
I TRIP = ------------------------------------------ Amp
 R OVR  0.012 
(EQ. 3)
.
100
80
60
40
20
When a laser is driven from below threshold to well
above threshold, it exhibits a few cycles of a damped
oscillation. The amplitude of this oscillation is minimized
when the laser is kept above threshold. The “fixed” bias
mode is set by asserting a logic Low on the SLPEN pin. To
set the laser bias threshold currents, IBIAS, connect
external resistors from RBIAS pins to GND. Figure 1
shows value of RBIAS corresponding to desired bias
current.
0
1k
2k
3k
4k
5k
ROVR ()
FIGURE 2. ROVR vs ITRIP CURRENT
Controlling the Sampling
The switching levels are sampled independently. This can
be done during the “off-paper” period.
During calibration mode, the internal servo control will
bring the laser diode output power level to match the
voltage control level set by VC voltage.
100
IBIAS (mA)
LOW. This can be used to detect fault conditions. Since
both channel’s overcurrent detectors are ORed together,
ERRB going low could indicate a fault in either or both
output channels. Note that the ISL58125 does not shut
itself down when an overcurrent condition is detected.
The device controller is expected to take any required
action. The maximum current is governed by Equation 3:
ITRIP (mA)
Applications Information
Typical Application
Upon the printer being powered up, the lasers should be
calibrated. This would establish nominal light power
outputs, typically a few milliwatts at the laser regardless
of the ambient temperature and also any laser aging.
10
1
0.1
1
10
RBIAS (k)
FIGURE 1. RBIAS vs BIAS CURRENT
Scaling External Resistors
RSET is used to scale the switching output current. Switching
output current, ISW, is the function of VC and RSET
2
VC
I SW = I SW Gain   ---------------- – ---------------
R

R
DAC
SET
(EQ. 1)
Where ISWGain = ~17, RDAC = 400.
RBIAS sets bias threshold current. Figure 1 exhibits the
relationship between IBIAS and RBIAS. The bias current
is set as Equation 2:
InternalVref
I BIAS = BiasChannelGain  -----------------------------------R BIAS
(EQ. 2)
Where BiasChannelGain = ~40, InternalVref = 1.0V.
ROVR resistor defines the maximum current that can
flow in either laser before the ERRB pin puts out a logical
8
Once everything is ready for printing, the paper is in
position and the mirror-motor is phase-locked then the
print line(s) can be written. Before, or after, the beam is
over the photo-sensitive drum, each laser can be recalibrated. This continual re-calibration will compensate
for any temperature drift of the laser, especially at the
initial warming up period.
Since the calibrated gain is stored as a digital number in
a register, the ISL58125 exhibits no time-dependent
droop. With no droop to degrade performance the only
limitation now is the lasers' own temperature change
along the line. This in turn can be compensated for to
some extent by adding a data-dependent compensation
signal to the analog VCx input pin. It may be found that
in fast draft modes for example, that the laser
temperature change is sufficiently small that many lines
can be written before the laser(s) need to be recalibrated. If the printed page has a low enough duty
cycle, no re-calibration may be needed at all.
The ISL58125 has analog voltage inputs to allow the
laser power level to be adjusted during the line. Typically
this would be driven with a PWM, low bandwidth signal to
FN6625.1
July 22, 2013
ISL58125
compensate for the differing beam path length as the
beam is swept from one side of the page to the other.
Undervoltage, overcurrent and over-temperature error
conditions are ORed together and made available on the
ERRB pin.
Power Supply Decoupling
Due to the high values of current being switched rapidly
on and off, it is important to ensure that the power
supply is well decoupled to ground. During switching, the
VCC undergoes severe current transients, thus every
effort should be made to decouple the VCC as close to
the package as possible. Symptoms that could arise
include poor rise/fall times, current overshoot, and poor
settling response. It is recomended that VCC inputs
should be bypassed with 4.7µF // 100nF // 470pF to
GND.
Inductance will be in series with the decoupling capacitor
at the rate of about 0.6nH/mm of trace or capacitor
distance. Thus for a 3mm loop from VCC through the
capacitor to ground, 300mA in 1ns will produce 540mV
transient on the VCC-GND voltage.
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
9
FN6625.1
July 22, 2013
ISL58125
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev.
DATE
REVISION
CHANGE
7/22/13
FN6625.1
Updated datasheet by removing Confidential Watermark, changing Logo, removed side bar
with part number, copyright on page 1 and changed Product Information verbiage to About
Intersil verbiage on page 14.
11/11/09
FN6625.0
Initial Release.
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting
www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at
http://www.intersil.com/en/support/qualandreliability.html#reliability
10
FN6625.1
July 22, 2013
ISL58125
Package Outline Drawing
L28.4x5A
28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 06/08
2.50
4.00
B
22
5.00
PIN #1 INDEX AREA
28
23
6
PIN 1
INDEX AREA
(4X)
6
24X 0.50
A
1
3.50
Exp. DAP
3.50
0.10 M C A B
4
28X 0.25
0.15
8
15
9
14
SIDE VIEW
TOP VIEW
2.50
Exp. DAP
28X 0.400
BOTTOM VIEW
SEE DETAIL "X"
( 3.80 )
0.10 C
Max 0.90
( 2.50)
C
SEATING PLANE
0.08 C
SIDE VIEW
( 4.80 )
( 24X 0.50)
( 3.50 )
C
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
(28X .250)
DETAIL "X"
( 28 X 0.60)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6.
11
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
FN6625.1
July 22, 2013
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