DATASHEET

DATASHEET
Data Sheet
Dual Laser Driver with APC Amplifier and Spread
Spectrum Oscillator
ISL58831
Features
The ISL58831 is a combination read + 3 write level laser driver
and IV amplifier, with an extra read + oscillator ROM channel
for use in dual-laser ‘Combo’ drivers. A separate (amplitude
and frequency) oscillator modulates the selected output for
laser noise reduction during read or write. All these functions
are provided in a 24 Ld QFN package.
• “Shrink-small” outline package
The SEL1 pin, when high, selects the DVD (write) laser. Positive
current supplied to the IIN lines, through a user-selected
resistor, allow the full-scale range of each amplifier to be
matched to the full-scale range of the users control DACs.
When the write laser is selected, and the WEN pins are
switched low, the respective current is summed to the output
with 1ns rise and fall times. Write channel 2 has 240mA
output capability with an 250X gain amplifier.
• CH3 to 170mA maximum
The 100mAP-P (maximum) oscillator is switched on and off by
the OSCEN line. The SEL1 line allows the oscillator to operate
at different amplitudes and frequencies for each laser.
The entire chip is powered down when ENABLE is low. The user
can define the gain of the I/V amplifier. With a slew rate of
200V/µs, the I/V amplifier can normally settle to 1% within
30ns.
An internal spread spectrum circuit modulates the oscillator
frequency to help reduce peak EMI.
• Voltage-controlled output current source requiring one
external set resistor per channel
• Current-controlled output current source
• CH2 to 235mA maximum
• CH4 to 100mA maximum
• Rise time = 0.8ns
• Fall time = 0.8ns
• On-chip oscillator with frequency and amplitude control by
use of external resistors to ground
• Oscillator to 600MHz
• Oscillator to 100mAP-P
• Single +5V supply (±10%)
• Disable feature for power-up protection and power savings
• 200V/µs I/V amplifier
• Internal spread spectrum modulation to reduce peak EMI
• Pb-free (RoHS compliant)
Applications
• Combo CD-R + DVD-R
• DVD±RW to 8X
• Writable optical disk drives
January 28, 2016
FN7440.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2006, 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL58831
Typical Application
68
+
-
10k
3V
1.5k
0.1µF
1pF
4.7µF
330
PHOTO
VDDN
20
PDIN
VOUT
THERMAL
PAD
16
5
15
6
14
7
13
WEN3
68
VREF
4
8
SEL1
17
IOUT1
100
0.1µF
LASER
GND
SS_MON
IOUT2
ROM LASER
RAMP1
1k
RAMP2
1k
12
WEN2
3
VDDN
ENABLE
RF2
21
IIN4
3k
18
11
2.4k
2
OSCEN
IIN3
22
2.4k
19
10
RF1
0.1µF
4.7µF
1
VDDQ
3k
23
IIN2
9
2.4k
WEN4
68
24
IINR
2.4k
68
0.1µF
68
5V
4.7µF
FIGURE 1. TYPICAL APPLICATION
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
PACKAGE
(RoHS Compliant)
TAPE AND REEL
QUANTITY
(UNITS)
PKG.
DWG. #
ISL58831CRZ
58831 CRZ
24 Ld QFN
-
MDP0046
ISL58831CRZ-T13 (Note 1)
58831 CRZ
24 Ld QFN
2.5k
MDP0046
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL58831. For more information on MSL, please see tech brief TB363.
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ISL58831
Block Diagram
APC
AMP
VOUT
PDIN
+
VDDN
VREF
VDDN
IINR
READ
GAINR CURRENT
AMPLIFIER
IIN2
xGAIN2
2X
READ
DRIVER
IOUT1
RF1
IIN3
xGAIN3
IIN4
xGAIN4
WRITE
DRIVERS
GND
SS_MON
OSCILLATOR
DRIVER
RAMP1
OSCILLATOR
RF2
OSCILLATOR
DRIVER
POWER
CONTROL
WEN2
RAMP2
ENABLE
OSCEN
SEL1
READ
DRIVER
WEN3
WEN4
IOUT2
VDDQ
FIGURE 2. BLOCK DIAGRAM
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ISL58831
Pin Configuration
20 VDDN
21 PDIN
22 VOUT
23 VREF
24 IINR
ISL58831
(24 LD QFN)
TOP VIEW
IIN2 1
19 VDDN
RF1 2
18 IOUT1
IIN3 3
17 GND
IIN4 4
THERMAL
PAD
16 SS_MON
RF2 5
15 IOUT2
ENABLE 12
OSCEN 11
13 RAMP2
VDDQ 10
SEL1 7
WEN4 9
14 RAMP1
WEN3 8
WEN2 6
Pin Descriptions
PIN
NUMBER
PIN
NAME
PIN
FUNCTION
PIN DESCRIPTION
Input pin for IIN2, which current is amplified and output to IOUT1 (add external series resistor when voltage driven).
1
IIN2
Analog
2
RF1
Analog
External resistor to ground sets the oscillator frequency when SEL1 = 1.
3
IIN3
Analog
Input pin for IIN3, which current is amplified and output to IOUT1 (add external series resistor when voltage driven).
4
IIN4
Analog
Input pin for IIN4, which current is amplified and output to IOUT1 (add external series resistor when voltage driven).
5
RF2
Analog
External resistor to ground sets the oscillator frequency when SEL1 = 0.
6
WEN2
Digital
WEN2 = 0 applies the current from the IIN2 amplifier to the IOUT pin.
7
SEL1
Digital
If SEL1 = 1, IOUT1 and RFREQ1 and RAMP1 are selected, otherwise IOUT2 and RFREQ2 and RAMP2 are selected.
8
WEN3
Digital
WEN3 = 0 applies the current from the IIN3 amplifier to the IOUT pin.
9
WEN4
Digital
WEN4 = 0 applies the current from the IIN4 amplifier to the IOUT pin.
10
VDDQ
11
OSCEN
Power Supply +5V supply for bias and amplifiers (connect all supplies).
Digital
OSCEN = 1 powers up the oscillator and oscillator driver and passes specified oscillator current to IOUT.
12
ENABLE
Digital
ENABLE = 1 powers up the chip, ENABLE = 0 puts the chip in power-down mode.
13
RAMP2
Analog
External resistor to ground sets the oscillator amplitude when SEL1 = 0.
14
RAMP1
Analog
External resistor to ground sets the oscillator amplitude when SEL1 = 1.
15
IOUT2
Analog
Output current source for ROM laser diode at [82 * IINR + IOSC (ac)].
16
SS_MON
Analog
Modulation rate monitor.
17
GND
18
IOUT1
19
VDDN
Power Supply +5V supply for output drivers (connect all supplies).
20
VDDN
Power Supply +5V supply for output drivers (connect all supplies).
21
PDIN
Analog
Connect the photo diode to this pin for the I-V amplifier input; connect the gain resistor and compensation capacitor
between PDIN and VOUT.
22
VOUT
Analog
Output voltage from I-V amplifier.
23
VREF
Analog
Reference voltage for the I-V amplifier.
24
IINR
Analog
Input pin for IINR (IINR2), which current is amplified and output to IOUT1 (IOUT2) (add external series resistor when
voltage driven).
PD
Power Supply Ground (connect all grounds).
Analog
Output current source for RW laser diode [100 * (1.65 * IINR + 2.5 * IIN2 + 2.0 * IIN3 + IIN4) + IOSC (ac)].
Thermal Pad Should be connected to GND.
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ISL58831
Absolute Maximum Ratings
Thermal Information
(TA = +25°C)
Voltages Applied to:
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V
WEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD +0.5V
IINx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +5.0V
IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V
Power Dissipation (maximum) . . . . . . . . . . . . . . . . . . . . . . . . . . . See page 9
IOUT Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA average, 500mAP-P
JA (°C/W)
Thermal Resistance (Typical)
42
24 Ld QFN Package (Note 4). . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . 0°C to +80°C
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
RFREQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500Ω (minimum)
RAMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500Ω (minimum)
FOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100MHz to 600MHz
AOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mAP-P to 100mAP-P
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
NOTE: Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications
PARAMETER
VDD
VDD = 5V, TA = +25°C, ENABLE = HI, WEN = HI, OSCEN = LO, SEL1 = HI, unless otherwise specified.
DESCRIPTION
TEST CONDITIONS
Supply Voltage
MIN
TYP
MAX
UNIT
4.5
5.0
5.5
V
IS1
Supply Current (Disabled)
ENABLE = <0.5V
0.1
100
µA
IS2
Supply Current
IINR = 0µA, IIN2/3/4 = 20µA
34
40
46
mA
IS3
Supply Current
OSCEN = HI, IINR = 0µA, IIN2/3/4 = 20µA
50
60
70
mA
IS4
Supply Current
IINR = 0µA, IIN2/3/4 = 500µA
61
73
85
mA
94
112
Supply Current
IINR = 200µA, IIN2/3/4 = 500µA
130
mA
DVLO
Digital Low Voltage
WEN2/3/4, OSCEN inputs
1.3
V
EVLO
Enable Low Voltage
ENABLE pin (to guarantee IS1)
0.5
V
DVHI
Digital High Voltage
WEN2/3/4, OSCEN inputs
IS5
2.2
V
EVHI
Enable High Voltage
ENABLE pin only
2.2
V
DVHICD
Digital High Voltage
SEL1 only
2.2
V
DVLOCD
Digital Low Voltage
SEL1 only
DILO
Digital Low Current
SEL1, OSCEN, ENABLE, WEN = 0.0V
DIHI
Digital High Current
SEL1, OSCEN, ENABLE, WEN = 5.0V
VSHUT
1.3
VDD Shutdown Voltage
Laser Amplifier
-100
V
µA
3.5
100
µA
3.9
V
VDD = 5V, TA = +25°C, ENABLE = HI unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
GAINR
Best Fit Current Gain
Channel R - IOUT1 (Note 5)
140
165
190
mA/mA
GAINR2
Best Fit Current Gain
Channel R2 - IOUT2 (Note 5)
70
82
95
mA/mA
GAIN2
Best Fit Current Gain
Channel 2 - IOUT1 (Note 5)
210
250
290
mA/mA
GAIN3
Best Fit Current Gain
Channel 3 - IOUT1 (Note 5)
170
200
230
mA/mA
GAIN4
Best Fit Current Gain
Channel 4 - IOUT1 (Note 5)
80
100
120
mA/mA
IOUTR
Output Current
VDD = 4.5V, VOUT = 3.4V, output is sourcing,
channel R - IOUT1 (Note 5), IINR = 2mA
150
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mA
FN7440.1
January 28, 2016
ISL58831
Laser Amplifier
VDD = 5V, TA = +25°C, ENABLE = HI unless otherwise specified. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
IOUTR2
Output Current
VDD = 4.5V, VOUT = 2.1V, output is sourcing,
channel R2 - IOUT2 (Note 5), IINR2 = 2mA
120
mA
IOUT2
Output Current
VDD = 4.5V, VOUT = 3.4V, output is sourcing,
channel 2 - IOUT1 (Note 5), IIN2 = 2mA
235
mA
IOUT3
Output Current
VDD = 4.5V, VOUT = 3.4V, output is sourcing,
channel 3 - IOUT1 (Note 5), IIN3 = 2mA
170
mA
IOUT4
Output Current
VDD = 4.5V, VOUT = 3.4V, output is sourcing,
channel 4 - IOUT1 (Note 5), IIN4 = 2mA
100
mA
IOSR
Best Fit Current Offset
Channel R (Note 5)
-6
+6
mA
IOS2, 3, 4
Best Fit Current Offset
Channels 2, 3, 4 (Note 5)
-6
+6
mA
ILIN
Output Current Linearity
Any channel (Note 5)
-3
+4
%
IDAC
Input Current Range
Input is sinking
2
mA
RINR
IINR Input Impedance
RIN is to GND
562
750
937
Ω
IIN2, 3, 4 Input Impedance
RIN is to GND
375
500
625
Ω
VTH
WEN2/3/4 Threshold for Write Pulses
Temperature stabilized
RIN2, 3, 4
0
1.68
V
IOFF1
Output Off Current 1
ENABLE = LO
0.5
mA
IOFF2
Output Off Current 2
WEN = HI, total for all channels
1.5
mA
IOFF3
Output Off Current 3
WEN = LO, IIN = 0µA, total for all channels
5
mA
VC1
IOUT Supply Sensitivity
IOUT = 40mA, VDD = 5V ±10%, read only
-3
3
%/V
VC2
IOUT Supply Sensitivity
IOUT = 80mA, 40mA read + 40mA write
-3
IOUT Current Output Noise
IOUT = 40mA, OSCEN = LO
TC1
IOUT Temperature Sensitivity
TC2
IOUT Temperature Sensitivity
INOUT
3
%/V
3.5
nA/Hz
IOUT = 40mA, read only
+100
ppm/°C
IOUT = 80mA, 40mA read + 40mA write
-100
ppm/°C
NOTE:
5. The amplifier linearity is calculated using a best fit method at three operating points. The output currents chosen are 20mA, 40mA, and 60mA. The
transfer function for IOUT is defined as follows: IOUT = (IIN * GAIN) +IOS.
Laser Current Amplifier Outputs AC Performance
otherwise specified.
PARAMETER
DESCRIPTION
VDD = 5V, IOUT = 40mA DC with 40mA pulse, TA = +25°C unless
CONDITIONS
MIN
TYP
MAX
UNIT
tr2
Write Rise Time
IOUT = 40mA (read) + 40mA (10%-90%)
0.8
2.0
ns
tf2
Write Fall Time
IOUT = 40mA (read) + 40mA (10%-90%)
0.8
2.0
ns
OS
Output Current Overshoot
Measured on 6.8Ω resistor load
tON
IOUT ON Propagation Delay
tOFF
5
%
Input timing to IOUT at 50% of final value
(Note 6)
2.0
ns
IOUT OFF Propagation Delay
Input timing to IOUT at 50% of final value
(Note 6)
2.0
ns
TDIS
Disable Time
Input timing to IOUT at 50% of final value
(Note 6)
20
ns
TEN
Enable Time
Input timing to IOUT at 50% of final value
(Note 6)
150
ns
BW
Amplifier Bandwidth
IOUT = 50mA, all channels, -3dB value
8
MHz
FOSC
Oscillator Frequency
RFREQ = 5600Ω
TCOSC
Oscillator Temperature Coefficient
RFREQ = 4500Ω
290
328
200
360
MHz
ppm/°C
NOTE:
6. Input timing is defined as WENx or ENABLE input pulse crosses 1.68V. Input pulse is standard 3.3V CMOS-level TTL input.
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ISL58831
APC Amplifier
VDD = 5V, TA = +25°C, RLOAD = 2kΩ to VREF unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
BW
Bandwidth
G=1
100
MHz
SR
Slew Rate
G = 1, VO = 0.5V to 3V
200
V/µs
tS
Settling Time
To 0.1%, VOUT = 0.5V to 3V
30
ns
AVOL
Open Loop Voltage Gain
VOUT = 0.5V to 3V
80
dB
VOS
Offset Voltage
VREF = 3V
TCVOS
+4
VREF = 3V
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
mV
µV/°C
-0.5
+0.5
µA
CMRR ≥54dB
1
VDD-1
V
VCM = 1.0V to 4.0V
55
RIN
Input Impedance
CIN
Input Capacitance
Pin 21 (PDIN)
Output Voltage Swing
RL = 2kΩ to VREF (Note 7)
VOUT
+5
Input Offset Voltage Temperature
Coefficient
Input Bias Current
IB
-5
0.5
75
dB
1
MΩ
2
pF
VDD-0.5
V
NOTE:
7. RL is total load resistance due to feedback resistor and load resistor. Recommended feedback resistor is 5kΩ.
IOUT Control
ENABLE
SEL1
WEN2
WEN3
WEN4
IOUT1
IOUT2
0
X
X
X
X
OFF
OFF
1
1
1
1
1
165 * IINR
OFF
1
1
0
1
1
(165*IINR) +(250*IIN2)
OFF
1
1
1
0
1
(165*IINR) +(200*IIN3)
OFF
1
1
1
1
0
(165*IINR) +(100*IIN4)
OFF
1
0
X
X
X
OFF
82*IINR
Oscillator Control
ENABLE
OSCEN
SEL1
IOSCILLATOR
0
X
X
OFF
1
0
X
OFF
1
1
1
Oscillator On to IOUT1
1
1
0
Oscillator On to IOUT2
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ISL58831
Timing Diagram
ENA
OSEN
WEN2
WEN3
WEN4
tr2
tf2
toff
ton
ten
tdis
IOUT1
FIGURE 3. TIMING DIAGRAM
7
60
6
55
5
50
ICC (mA)
RFREQ (kΩ)
Typical Performance Curves
4
45
3
40
2
35
1
250
350
450
550
30
200
650
300
400
500
600
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 4. FREQUENCY CONTROL
FIGURE 5. ICC vs FREQUENCY (EXCLUDING IOUT)
OSCILLATOR AMPLITUDE
MODULATION (mAP-P)
140
RFREQ = 5kΩ
120
RFREQ = 2.5kΩ
100
80
60
40
20
0
RFREQ = 1.65kΩ
0
1
2
3
4
5
RAMP (kΩ)
FIGURE 6. AMPLITUDE CONTROL
The ISL58831 oscillator frequency is controlled by the current
being sourced at the RFREQ pin. For a typical part, Equation 1
(accurate to better than 5MHz at any frequency) should be used
to determine the frequency of operation:
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FREQ  MHz  = -5.9672  10
1.5839  10
-5
2
-10
3
 R FREQ +
(EQ. 1)
 R FREQ – 0.1596  R FREQ + 841.34
FN7440.1
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ISL58831
Applications Information
Enable and Read Operation
The ENABLE line powers up the chip and supplies bias to all the
circuits. After being enabled, read current can be obtained by
applying a current to the IINR input. The read power is usually
operated in an automatic power control loop, by varying the
current in the IINR pin in response to the monitored laser light
power. Equation 2 is the defining equation for each amplifier:
V DAC
I OUT = -----------------------------------  GAIN
R SET + R INx
(EQ. 2)
Oscillator Operation
Usually a laser will be noisy due to mode-hopping often caused
by variable optical feedback into the laser. RF current can be
applied to reduce this noise effect by bringing the OSCEN pin
high. The amplitude of the RF is set by the RAMP resistor and the
frequency is set by the RFREQ resistor. See the “Typical
Performance Curves” on page 8 for resistor set values.
RF current is applied in a on/off fashion. Thus, if the RF
amplitude is 50mAP-P, 50mA will be added to the read current
for half the RF cycle, and then 0mA will be added to the read
current for half the RF cycle. In this case, if the threshold current
is only 40mA, the average laser power could exceed the intended
read laser power by about 2mW, due to the 50% duty cycle
current of 10mA above threshold. Therefore, in order to regulate
the read power, it is necessary to make sure that the RF
amplitude is not much more than the required DC read current.
The circuit has a feature to increase the ability to turn off the
laser for low threshold currents. At low read currents, the
amplitude of the RF will be reduced as the amplitude of the read
current is reduced.
Write Levels
well placed bypass capacitor will have a response limitation due
to the lead inductance, it might be necessary to also place a
lossy bead and a second decoupling capacitor on the supply side
of the bead to prevent switching currents on the supply line from
generating EMI.
Laser Diode Routing
It is very important to minimize the inductance of the trace
between the IOUT pin and the laser diode. This trace acts as an
antenna for EMI, inhibits the flow of RF and pulse current to the
laser and absorbs RF current into ground. The ground return from
the laser cathode to the chip and decoupling capacitors is best
as a wide plane on both sides of the trace leading to the laser
anode.
Ringing of the waveform might be observed on the IOUT pin. The
best way is to check the optical output of the laser with an optical
probe. If ringing is confirmed that cannot be reduced by an
improved layout, the addition of an RC snubber network right at
the output of the laser driver may be helpful. Be aware however,
that the rise time might be affected and that the pulse power
might be affected by pattern dependent voltage build-up on the
snubber capacitor. Users should expect to lose 0.5ns of tr/tf for
every 1cm of distance from IOUT to the laser diode and back to
the VDD decoupling capacitor.
Power Consumption Issues
The ISL58831 has been designed for low power consumption.
When disabled, the part takes negligible power consumption,
regardless of the state of the other pins. In addition, for VDD
<3.5V, the ISL58831 will shut down to less than 1mA of supply
current.
When in normal operation, the ISL58831 total power
consumption depends strongly on the laser diode current and
voltage. Since the total power consumption under worst case
conditions could approach one watt, the burden is on the user to
dissipate the heat into the board ground plane or chassis. An
in-depth discussion of the effects of ground plane layout and size
can be found in application note AN1091.
Typical applications will have at least two write powers. The
recommended method to control the write power level is to
assign Channel 2 to the lowest power level above read and add in
Channel 3 to obtain the highest write power level. This spreads
the gain over the most amplifiers, allows the largest current level
to the laser, reduces the sensitivity of each input and provides
the most protection to the laser in case of erroneous input
commands.
An approximate equation for the device power consumption is
shown in Equation 3 (users must adjust accordingly for any duty
cycle issues):
Write Switching Waveforms
Where:
P DISS =   I S +  14  I IN    V CC  +  I DIODE   V CC - V DIODE  
(EQ. 3)
The WEN lines are applied to a fast comparator set to 1.67V. This
makes it possible to have predictable rise and fall propagation
delays from the WEN write pulse inputs to the laser.
IS = IS2 when oscillator off, or IS3 when oscillator on (see page 5)
Power Supply Decoupling
VDD = Device power supply voltage
Due to the high values of current being switched rapidly on and
off, it is important to ensure that the power supply is well
decoupled to ground. During switching, the VDD undergoes
severe current transients, thus every effort should be made to
decouple the VDD as close to the package as possible, and to
route the laser cathode to the decoupling capacitor with a short
wide trace. Symptoms that could arise include poor rise/fall
times, current overshoot and poor settling response. Since even a
IDIODE = Laser diode current
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IIN = Sum of all the IIN currents
VDIODE = Forward voltage of laser diode at current of IDIODE
When using the ISL58831, the user must take extreme care not
to exceed the maximum junction temperature of +150°C. Since
the case-to-ambient thermal coefficient will dominate, and since
this is very much defined by the user’s thermal engineering, it is
not practical to define a strict limit on power consumption.
FN7440.1
January 28, 2016
ISL58831
Furthermore, the case-to-ambient thermal coefficient may not be
known precisely.
Temperature Measurement Set-Up and
Results
To assist in worst case conditions, it is possible to monitor the
silicon temperature of the ISL58831 by forcing current into the
ENABLE pin, which will then be at a voltage of VDD + VPN, where
VPN is the forward biassed voltage of the ESD protection diode.
Since ENABLE = HI is necessary for normal operation, the device
can be operated as it would be in the real-life applications, while
the temperature is monitored. The ISL58831 has been calibrated
with a 1MΩ resistor to +10V connected in series with the ENABLE
pin, which results in an input current of approximately 4.5µA.
Figure 7 allows the silicon temperature to be determined directly.
The graph shows the measured ENABLE pin to VDD pin
differential voltage, which shows a linear voltage sensitivity of
-2.26mV/°C. Users may wish to measure their specific part at
+20°C (no warm-up) to allow for any statistical/process
distribution, but the method is reliable and accurate.
Example: Measure ENABLE - VDD under coolest condition of
VDD = 0V and VENABLE = 5V through 1MΩ. Suppose the result
was 580mV at TAMBIENT = +20°C.
Now one can calculate the temperature rise of (450 to 580)/
-2.26 = +57°C. Using the power dissipation of
PW = (VDD * ICC) - (ICC * VDD), the JA of the application can be
calculated.
600
ENABLE PIN - VDD PIN (mV)
By applying this method to the ISL58831 in an actual
application, users can measure the silicon temperature under all
operating conditions to determine whether their thermal
engineering is sufficient. The thermal resistance of the QFN24 is
+140°C/W when tested on a standard JEDEC JESD51-3 (single
layer) test board. When using a standard JEDEC JESD51-7 (four
layer) test board, the thermal resistance is +112°C/W. Actual
thermal resistance is highly dependent on circuit board layout
considerations.
Now measure ENABLE - VDD under the actual operating
conditions. Suppose result (must be after thermal equilibrium
has been reached) is 450mV, and the new ICC value is 100mA.
550
500
450
400
350
300
250
ENA WITH 1MΩ TO +10V
0
25
50
75
100
125
150
SILICON TEMPERATURE (°C)
1M
ENABLE
+10V
ISL58831
V
+5V
VDD
FIGURE 7. ISL58831 ON-CHIP THERMOMETER
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FN7440.1
January 28, 2016
ISL58831
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
CHANGE
January 28, 2016
FN7440.1
Updated to newest template and order of content .
Updated Ordering Information table - added quantity for Tape and Reel, added Tape and Reel and MSL
notes.
Page 5, above Electrical Spec table - changed “IMPORTANT NOTE: All parameters having Min/Max
specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA.”
to: “NOTE: Compliance to datasheet limits is assured by one or more methods: production test,
characterization and/or design.”
Page 6, Laser Current Amplifier Outputs AC Performance table, Output Current Overshoot - Changed
Conditions from: See Application Notes to: Measured on 6.8O resistor load
Page 8, Timing Diagram - corrected the polarity of the WEN2, WEN3 and WEN4 signals. Correct polarity
is Active Low.
Page 5, Added Thermal Information section, JA (°C/W) of 42.
Page 12, POD MDP0046 updated from rev 10 to rev 11. No changes to POD, only internal record.
About Intersil
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FN7440.1
January 28, 2016
ISL58831
QFN (Quad Flat No-Lead)
Package Family
MDP0046
QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY
(COMPLIANT TO JEDEC MO-220)
MILLIMETERS
A
SYMBOL QFN44 QFN38
D
N
(N-1)
(N-2)
B
1
2
3
PIN #1
I.D. MARK
E
(N/2)
2X
0.075 C
2X
0.075 C
N LEADS
TOP VIEW
TOLERANCE
NOTES
A
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
+0.03/-0.02
-
b
0.25
0.25
0.23
0.22
±0.02
-
c
0.20
0.20
0.20
0.20
Reference
-
D
7.00
5.00
8.00
5.00
Basic
-
Reference
8
Basic
-
Reference
8
Basic
-
D2
5.10
3.80
5.80 3.60/2.48
E
7.00
7.00
8.00
5.10
5.80
5.80 4.60/3.40
e
0.50
0.50
0.80
0.50
L
0.55
0.40
0.53
0.50
±0.05
-
N
44
38
32
32
Reference
4
ND
11
7
8
7
Reference
6
NE
11
12
8
9
Reference
5
MILLIMETERS
(N-2)
(N-1)
N
L
PIN #1 I.D.
3
1
2
3
(E2)
(N/2)
NE 5
7
(D2)
BOTTOM VIEW
0.10 C
e
6.00
E2
0.10 M C A B
b
QFN32
C
SYMBOL QFN28 QFN24
QFN20
QFN16
TOLERANCE NOTES
A
0.90
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
0.02
+0.03/
-0.02
-
b
0.25
0.25
0.30
0.25
0.33
±0.02
-
c
0.20
0.20
0.20
0.20
0.20
Reference
-
D
4.00
4.00
5.00
4.00
4.00
Basic
-
D2
2.65
2.80
3.70
2.70
2.40
Reference
-
E
5.00
5.00
5.00
4.00
4.00
Basic
-
E2
3.65
3.80
3.70
2.70
2.40
Reference
-
e
0.50
0.50
0.65
0.50
0.65
Basic
-
L
0.40
0.40
0.40
0.40
0.60
±0.05
-
N
28
24
20
20
16
Reference
4
ND
6
5
5
5
4
Reference
6
NE
8
7
5
5
4
Reference
5
Rev 11 2/07
SEATING
PLANE
NOTES:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.08 C
N LEADS
& EXPOSED PAD
SEE DETAIL "X"
2. Tiebar view shown is a non-functional feature.
3. Bottom-side pin #1 I.D. is a diepad chamfer as shown.
SIDE VIEW
4. N is the total number of terminals on the device.
5. NE is the number of terminals on the “E” side of the package
(or Y-direction).
(c)
C
2
A
6. ND is the number of terminals on the “D” side of the package
(or X-direction). ND = (N/2)-NE.
(L)
A1
N LEADS
DETAIL X
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12
7. Inward end of terminal may be square or circular in shape with radius
(b/2) as shown.
8. If two values are listed, multiple exposed pad options are available.
Refer to device-specific datasheet.
FN7440.1
January 28, 2016
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