nr263s ds en

Light Load High Efficiency Synchronous Buck Regulator IC
NR263S
DATA SHEET
General Descriptions
The NR263S is Synchronous Rectification buck
regulator ICs integrates PowerMOSFETs. With the
current mode control, ultra low ESR capacitors such
as ceramic capacitors can be used. The ICs can
realize super-high efficiency by performing pulse
skip operation at light load condition. The ICs have
protection functions such as Over-Current Protection
(OCP), Under-Voltage Lockout (UVLO) and
Thermal Shutdown (TSD). Soft starting time can be
set up by selecting an external capacitor value. The
ON/OFF pin (EN Pin) turns the regulator ON/OFF.
The NR263S is available in an 8-pin SOP package.
Features & Benefits
● Synchronous Rectification with internal
PowerMOSFETs
● Current mode PWM control (Normal load)
● Pulse Skip Operation(at Light Load Condition)
● Up to 94% efficiency at normal load condition
● Up to 86% efficiency at light load condition
(@Vin=12V,Vout=5V,Iout=10mA)
● Stable with low ESR ceramic output capacitors
● Built-in protection function
Drooping type Over Current Protection (OCP) with
Auto-restart
Thermal Shutdown (TSD) with Auto-restart
Under Voltage Lockout(UVLO)
Vo Short Circuit Protection (HICCUP)
● By Vo = 5V fixed and external component count
reduction (NR263S)
● Soft-start Function by External Timing Capacitor
● Turn ON/OF the regulator function
Package
SOP8 Package
*Image: Not to scale
Electrical Characteristics
●
●
●
●
Input Voltage Range VIN = 8.0V~31V
Output Voltage VO=5V Fixed
Output Current IO=1A
Operationg Frequency Fsw=500kHz Fixed
Applications
●
●
●
●
●
Refrigerator
Air conditioner
LCD-TV
Blu-ray
Power supply for digital consumer
Basic Circuit Connection
NR263S (Vo=5V Fixed)
NR263S series-DSE Rev.1.0
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2016.03.09
http://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO.,LTD. 2016
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CONTENTS
General Descriptions ------------------------------------------------------------------------------------------ 1
1. Electrical Characteristics -------------------------------------------------------------------------------- 3
1.1 Absolute Maximum Ratings ----------------------------------------------------------------------- 3
1.2 Recommended Operating Conditions ----------------------------------------------------------- 3
1.3 Electrical Characteristics -------------------------------------------------------------------------- 4
2. Block Diagram & Pin Functions ----------------------------------------------------------------------- 5
2.1 Block Diagram --------------------------------------------------------------------------------------- 5
2.2 Pin Assignments & Functions --------------------------------------------------------------------- 6
3. Typical Application Circuit ----------------------------------------------------------------------------- 7
4. Allowable package power dissipation ----------------------------------------------------------------- 7
5. Package Outline ------------------------------------------------------------------------------------------- 9
5.1 Outline, Size ------------------------------------------------------------------------------------------ 9
6. Marking --------------------------------------------------------------------------------------------------- 10
7. Operational Descriptions ------------------------------------------------------------------------------ 11
7.1 PWM(Pulse Width Modulation) Output Control ------------------------------------------- 11
7.2 UVLO and Enable Function -------------------------------------------------------------------- 12
7.3 Soft-start Function -------------------------------------------------------------------------------- 13
7.4 Over current and Short circuit protection Function (OCP & HICCUP) -------------- 15
7.5 Thermal Shutdown (TSD) ----------------------------------------------------------------------- 16
7.6 About the "Pulse-Skip-Mode" in the Light-load condition ------------------------------- 16
8. Design Notes ---------------------------------------------------------------------------------------------- 18
8.1 External Components ---------------------------------------------------------------------------- 18
8.1.1
Inductor L1 ----------------------------------------------------------------------------------- 18
8.1.2
Input Capacitor CIN ------------------------------------------------------------------------- 20
8.1.3
Output Capacitor CO ----------------------------------------------------------------------- 20
8.2 Pattern Design ------------------------------------------------------------------------------------- 21
8.2.1
Input / Output Capacitors(CIN,CO) ------------------------------------------------------ 21
8.2.2
PCB Layout & Recommended Land Pattern ------------------------------------------ 22
8.3 Applied Design ------------------------------------------------------------------------------------- 23
8.3.1
Spike Noise Reduction(1) ------------------------------------------------------------------ 23
8.3.2
Spike Noise Reduction(2) ------------------------------------------------------------------ 23
8.3.3
Attention about the insertion of the bead-core ---------------------------------------- 24
8.3.4
Reverse Bias Protection -------------------------------------------------------------------- 24
8.3.5
Overvoltage protection of VO terminal ------------------------------------------------- 24
9. Typical characteristics (Ta=25°C) ------------------------------------------------------------------- 26
10. Packing specifications ---------------------------------------------------------------------------------- 28
10.1 Taping & Reel outline ---------------------------------------------------------------------------- 28
IMPORTANT NOTICE ------------------------------------------------------------------------------------ 29
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1.
Electrical Characteristics
1.1
Absolute Maximum Ratings
● The polarity value for current specifies a sink as “+” and a source as “−”, referencing the IC.
● Ta=25°C,unless otherwise noted.
Parameter
Symbol
Ratings
Units
DC input voltage
VIN
0.3 to 35
V
BS terminal voltage
VBS
SW terminal voltage
VSW
VO terminal voltage
EN terminal voltage
SS terminal voltage
VO
VEN
VSS
0.3 to
40.5
-0.3 to 5.5
8
1 to 35
2 to 35
6 to 35
0.3 to 6
0.3 to 35
0.3 to 7.0
SS terminal sink current
Issb
5.0
mA
BS to SW voltage
VBS-SW
V
V
V
V
(1)
PD
1.56
W
Junction temperature
(2)
TJ
40 to 150
°C
Tstg
40 to 150
°C
Thermal resistance (Junction to
θJP
60
PGND Lead)
Thermal resistance (Junction
θJA
80
toAmbient air)
(1)
Limited by thermal shutdown
(2)
The temperature detection of thermal shutdown is about 165°C
1.2
DC
* Pulse Width Limitation ≦10[ns]
DC
* Pulse Width Limitation ≦100[ns]
* Pulse Width Limitation ≦10[ns]
V
V
V
Power dissipation
Storage temperature
Conditions
Glass-epoxy board mounting
in a 40×40mm. * The implementation in our
Demo- Board, Tj=150°C
°C /W
°C /W
Glass-epoxy board mounting
in a 40×40mm. * The implementation in our
Demo- Board
Recommended Operating Conditions
Operating IC in recommended operating conditions is required for normal operating of circuit functions shown in
Table 3 Electrical characteristics of NR263S.
Parameter
Symbol
DC input voltage range
Ratings
Units
MIN
MAX
VIN
8
31
V
IO
0
1
A
Ta
40
85
°C
Conditions
(3)
DCoutput current range
Operating ambient temperature
(4)
(4)
Operating junction temperature
Tj
125
40
Refer to “Fig3-1 Typical Application Circuit”
(4)
To be used within the allowable package power dissipation characteristics (Fig 4)
(4)
°C
(3)
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1.3
Electrical Characteristics
● The polarity value for current specifies a sink as “+” and a source as “−”, referencing the IC.
● Ta=25°C,unless otherwise noted.
Table.3 Electrical Characteristics
Ratings
Parameter
Symbol
Units
MIN
TYP MAX
VO
Output voltage
4.85
⊿VO /⊿T
Output voltage temperature coefficient
fsw
Operating frequency
5.00
5.15
±0.3
-30%
500
V
mV/°C
+30%
kHz
Line regulation
(5)
VLine
50
mV
Load regulation
(5)
VLoad
50
mV
Over current protection
threshold
IS
Supply Current
IIN
250
Shutdown Supply Current
IIN(off)
1.2
Input UVLO Threshold
Vuvlo
6
5
Vuvlo_hys
Uvlo hysteresis
SS terminal source current
EN
terminal
1.1
ISS
Sink current
IEN
Turn-ON thereshold
VEN
Hysteresis voltage
1.5
2.6
0.8
VIN = 12V,Io = 0.5A
IN =
12V, Io = 0.5A
-40°C ~+85°C
VIN=12V, Vo=5.0V,
IO=1A
VIN= 8V~17V,
Vo=5.0V, IO=0.5A
VIN=12V, Vo=5.0V,
IO=0.1A~1.0A
A
VIN=12V, Vo=5.0V,
uA
VIN= 12V, VEN=12V
IO=0mA
10
uA
VIN=12V, VEN=0V
7
V
VIN Rising
0.55
2.5
Conditions
UVLO ON~UVLO OFF
5.0
8.5
μA
VSS=0V, VIN=12V
14
30
μA
VEN= 12V
1.1
2.1
V
VIN=12V
VEN_hys
0.15
V
Maximum ON Duty
(5)
DMAX
85
%
VIN=12V
Minimum ON Period
(5)
TON(MIN)
200
nsec
VIN=12V
(5)
TSD
165
°C
VIN=12V
(5)
TSD_hys
15
°C
VIN=12V
(5)
RonH
250
mΩ
VIN=12V
(5)
RonL
200
mΩ
VIN=12V
Thermal shutdown threshold
temperature
Thermal shutdown restart hysteresis
of temperature
ON Resistance of Hi-side SW
MOSFET
ON Resistance of Lo-side SW
MOSFET
(5)
Guaranteed by design,not tested
151
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2.
2.1
Block Diagram & Pin Functions
Block Diagram
Fig. 2-1
NR263S Block Diagram
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2.2
Pin Assignments & Functions
SS
1
BS
2
8 NC
7
VO
NR263S
SW
3
GND 4
Fig. 2-2
6 EN
5 IN
Pin Assignments
Table.4 Terminal Functions
Pin No.
Symbol
Functions
1
SS
2
BS
3
SW
4
GND
5
IN
6
EN
Enable signal input
Drive EN Pin high to turn ON the regulator, low to turn it OFF
7
VO
Feedback signal input terminal to compare Output voltage
The feedback threshold (VREF) is 5.0V
Connect the VO terminal directly to the output voltage VO.
8
NC
No connection
Soft-start control input
To set the soft-start period, connect to a capacitor CSS between SS and AGND
terminal
Boost Input
A BS terminal supplies the drive power of the internal PowerMOSFET
Connect a capacitor between the SW terminal and the BS terminal
Power switching output
SW supplies power to the output
Connect the LC filter between SW and the output
Note that a capacitor CBS is required between SW and BS to supply the power the
High-side driver
Ground terminal
By the synchronous rectification, the switching current flows
Power Input
Supply power to the IC
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3.
Typical Application Circuit
Standard connection is shown in Fig3-1.
VIN
RBS
REN
5
IN
6
CIN
CBS
2
BS
EN
SW
VO
L
3
NR263S
1
SS
GND
CSS
VO
NC
4
7
CO
8
GND
GND
Fig. 3-1
NR263S Standard connection
CIN: 10μF / 25V
REN:100kΩ
CO: 22μF / 16V
RBS:≦10Ω
CBS: 0.1μF
CSS: 0.1μF
L: 6.8μH
*As for the circuit diagram of the Demo-Board, please refer to the Demo-Board circuit diagram of the "8.2.2
mounting board pattern example" section.
4.
Allowable package power dissipation
Fig. 4-1
Allowable package powe disspation of NR263S
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Notes:
1) Because the Fig5 is defined in "PD=1.56[W]" at "Tj=150 [°C]", please keep enough margin when you use.
(Our Demo-board implementation in the Fig21)
2) Losses can be calculated by the following equation. In addition, efficiency ηx will vary depending on the
conditions of the input voltage, output current. By measuring the ηx in the actual operation, assigns a numerical
value to the equation (1) , as a ηx remain of percent display.
η
(1)
Main sources of heat generation are an inductor which is flowing
the load current , and the IC which has the PowerMOSFET and
the control circuit.
By subtracting the steady loss of the inductor from the overall
efficiency, the loss of the IC is calculated by equation (1).
VO: Output voltage
If following situations are ...VO = 5[V], IO = 1[A] continuous,
the inductor DCR = 80[mΩ],
the Loss of IC when the overall efficiencyis 90 percent,
it will be 0.476[W] from the equation (1).
ηx: Efficiency(%)
NR263S series-DSE Rev.1.0
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2016.03.09
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VIN: Input voltage
IO: Output current
L(DCR):DC serial resistance of
inductor (Ω)
8
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5.
Package Outline
5.1
Outline, Size
Top view
8
1
7
2
6
3
5
4
Side view1
Side view2
Notes:
1) Dimension is in millimeters (mm)
2) Drawing is not to scale.
Fig. 5-1
SOP8 Package outline
NR263S series-DSE Rev.1.0
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6.
Marking
As for the Marking, the product name and lot number, those are laser marking to mold package surface.
*1. Product name
*2. Lot number (3 digits)
The 1st letter : Last one digit of the year (Y)
The 2nd letter : manufacturing Month (M)
Jan - Sep:1 – 9
Oct:O
Nov:N
Dec:D
The 3rd letter : manufacturing Week (W)
First week - Fifth week:1 - 5
*1
NR263S
SK *2
*3
*3. Our control number (4 digits)
Fig. 6-1
NR263S series-DSE Rev.1.0
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2016.03.09
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Marking Specification
10
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7.
Operational Descriptions
The Characteristic value of, unless otherwise noted, it writes the TYP value in accordance with the NR263S
specifications.
7.1
PWM(Pulse Width Modulation) Output Control
The PWM control circuit of the NR263S consists of the current sense amplifier, the error amplifier, the PWM
comparator, the slope superimposing circuit. The Vtrip is the drain current feedback signal detected by current sense
amplifier. And the VCOMP is the error amplification signal generated by the error amplifier with the output voltage
and the reference voltage. By comparing with the Vtrip and the VCOMP in the PWM comparator, it performs control
of the ON-Duty. In the slope superimposition circuit, by superimposing the slope signal with respect to the current
feedback signal Vtrip, it can avoid the sub-harmonic oscillation that occur at ON-Duty 50% or more.
Fig. 7-1
Basic Structure of Buck Regulator with PWM Control by Current mode Control
When the UVLO was released or, the EN terminal voltage exceeded threshold, the SS terminal voltage starts to rise.
In the period until the SS terminal voltage reaches to 0.6V (typ), to drive the High-side driver and the High-side
switch (the following M1), by turning on the Low-side switch (the following M2), the boost capacitor CBS is
charged. After that, the switching operation is started when the SS terminal voltage exceeds 0.6V (typ). M1 and M2
are the switching-MOSFET for suppling the power to the Output. By M1&M2 repeating ON and OFF alternately,
and energy is supplied to the Output stage. In the period when M1 turns on, the current of Inductor L increase, and
the output of the current sense amplifier is raised, too. In the PWM comparator, the error amplifier output VCOMP
signal is compared with the Vtrip signal which is the addition of the current sense amplifier signal and the slope
compensation signal. When the Vtrip exceeds the VCOMP, M1 turns OFF, and M2 turns ON, the regenerative current
of the inductor L flows via M2 from the GND. Then, upon receiving a set signal from the oscillator OSC, M1 is
turned ON again.
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7.2
UVLO and Enable Function
In the condition that the EN terminal is connected to the IN terminal, when the input voltage V IN is increased beyond
6V(typ.), the UVLO is released and started the switching operation. And, in the condition that the input voltage V IN
is applied beyond 6V(typ.), when the EN terminal voltage exceeds 1.1V (typ.), it is started the switching operation.
VIN
VIN
REN1
REN1
IN
EN
IN
EN
GND
GND
(A)
Fig. 7-2
(B)
Remote ON/OFF by EN terminal
The Fig7-2 (B) is the option of the "Remote ON/OFF control" by using the EN terminal. By using switch such as
Open-collector and, by removing the EN terminal voltage VEN to GND level (Low), it is possible to turn OFF. In
case of without ON / OFF operation by external signal, please use the Fig7-2 (A) connection. It is started by the
applying of the VIN, and it is stopped by shut-off of the VIN. REN1 is recommended 100[kΩ].
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7.3
Soft-start Function
By connecting a capacitor between the SS terminal and the GND terminal, when the input voltage is supplied to the
IC, the soft-start function will be effective.The output voltage (Vo) is ramped up by the charging voltage level of
Css. Because the internal constant current source I SS supplied from the SS terminal is 5 μA, the soft-start period
depends on the charging time constant of the CSS. When the charging of CSS is started by the constant current I SS, the
SS terminal voltage VSS is linearly increased. The soft-start period is the time that the VSS passes between the
"Soft-start start threshold voltage VSS1(=0.6V)" and "Soft-start completion threshold voltage VSS2(=1.4V)". During
the Soft-start, the rise-time is controlled by controlling the OFF period of PWM control. The rise time t_SS and the
delay time t_delay are calculated in the following equations…
(2)
Note: VSS1(=0.6V) ≦VSS≦ VSS2 (=1.4V), ISS=5μA
(3)
Note:
0V ≦VSS<VSS1 (0.5V), ISS=5μA
The rise time of the output voltage Vo is " t_delay + tSS ".
Fig. 7-3
The timing chart of the Soft-start in the normal startup
Vss
Vss
Vss2=1.4V
Vss2=1.4V
Vss1=0.6V
Vss1=0.6V
Vo
Fig. 7-4
T
Vo
T
T
T
The occurrence of the overshoot on Vo rising waveform
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Adjust the capacitance of CSS so that the excessive overshoot may not occur on the Rising-Waveform of the output
voltage Vo at the start-up. The overshoot occurs when tss is short.If the soft-start is finished before the constant
voltage control follows Vo rising speed,it may become such waveform of Fig7-4. When a capacitance of the CSS is
increased, though the overshoot will not occur , please understand that the start-up time is longer. In actual operation,
please confirm the Rising-waveform, and adjust the capacitance of the C SS.
Note: About CSS discharge to restart
It is explained about discharging of the CSS capacitor when this IC is restarted such as ON/OFF operation in the EN
terminal. When it was restarted, there is a case where the voltage is remaining in the soft-start capacitor CSS. In this
IC, it has adopted the forced discharge sequence as shown in the Fig7-5. By the internal impedance, after once
discharging the SS terminal voltage to 0.6V or less, and then resume the soft-start.
Discharge of the capacitor Css, it is discharged by the internal impedance 600 Ω (typ) in the IC.
VEN(th)=1.1[V](typ)
Discharge impedance
600Ω(typ.)
VSS2=1.4[V](typ.)
VSS1=0.6[V](typ.)
Fig. 7-5
Discharge of the capacitor Css at restart
Under the condition that the voltage is remaining in the Css, after the ON-signal is inputted, it takes the time of
“t_discharge+tss” until Vo-waveform rise and stabilize. The soft-start capacitor Css has been charged to the internal
regulator voltage 1.8V.
It considers the discharge from the condition that the soft-start capacitor CSS has been charged up to 1.8V in the
steady condition. The SS terminal voltage VSS at optional time t after the start of discharge will be calculated by the
equation (4). For the time t_discharge that the V SS is discharged to 0.6 V from 1.8 V, it can be calculated by
equation (5).
Ω
Ω
(4)
(5)
When there is a mode for continuous “ON/OFF” operation, consider delay by discharging of the C SS.
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7.4
Over current and Short circuit protection Function (OCP & HICCUP)
An OCP characteristic is shown in the Fig7-6. The "drooping type" over-current-protection is equipped in the
NR263S. As for the over-current-protection circuit,this IC detects a peak current to flow to the switching-transistor.
When peak current exceeds setup value, a Ton-period of the transistor is made to shorten forcibly, and an output
voltage VO is made to decrease, and an output current is restricted. In this case, by the decline of the output voltage
VO, when a VO-terminal- voltage VO decreases to 3.5V 70% of the internal-reference -voltage (5V) , by the
reducing of the switching-frequency (the FDOWN mode),the "drooping characteristic" is improved in the low output
voltage.As shown in the Fig12, Moreover, when a VO-terminal-voltage VO decreases more and it becomes under
30% of the internal reference voltage (*5V→1.5V), the Soft-start capacitor CSS is charged by internal current source
ISS=5μA.When a SS-terminal-voltage VSS rises to 2.2V, the interval-operation mode (HICCUP) becomes effective,
and the continuous-switching-operation is canceled. After that, the soft-start capacitor CSS is discharged by the
constant current (=-2.5[μA]) , and the suspension-period of interval-operation is set up. The soft-start is restarted
when a SS-terminal-voltage VSS decreases to 0.23[V]. The interval-operation mode (HICCUP) is maintained due to
this repetition. By becoming the interval-operation mode, part stress such as heat-generation can be eased. An output
voltage is resumed to normal condition automatically when over-current condition is canceled. * When a HICCUP
function is invalidated, the short-current becomes continuously such as a characteristic of the red line in the Fig7-7.
Fig. 7-6
OCP (HICCUP Mode) Timing Chart
HICCUP
Fig. 7-7
OCP characteristic curve (Condition example :VIN=12V, VO=5V)
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7.5
Thermal Shutdown (TSD)
Output
Voltage
出力電圧
The thermal shutdown circuit detects the IC junction
temperature. When the junction temperature exceeds
the rated value (around 165°C), it shuts-down the output
transistor and turns the output OFF. If the junction
temperature falls below the thermal shutdown rated
value by around 15°C, the operation returns
automatically.
* (Thermal Shutdown Characteristics)
Notes
The circuit protects the IC against temporary heat
generation. It does not guarantee the operation including
reliabilities under the continuous heat generation
conditions, such as short circuit for a long time.
7.6
Restart
setup
temperature
復帰設定温度
Shutdown
setup
保護設定温度
temperature
Junction
temperature
接合温度
Fig. 7-8
TSD Operation
About the "Pulse-Skip-Mode" in the Light-load condition
A NR263S is equipped with the "Pulse-Skip-Mode (naming of our company) " to realize high efficiency in
Light-load. The more load current decrease,it is controlled so that a COMP voltage V COMP may decrease.
In the condition that the load-current decreases and the VCOMP is under the Vskip (Vskip=Light-load detection
threshold), the operation changes to the Pulse-Skip-Mode when the discontinuous-condition of inductor-current is
longer than the internal timer setup. In the Pulse-Skip-Mode, the peak value of the "Hi-side MOSFET Drain-current
(=ILP)" is limited to about 600mA. And, the variable-frequency-operation is done that changes the
switching-frequency corresponding to the load. The more switching-frequency decreases, the efficiency in the
light-load condition is possible to improve because the switching-loss decreases in the Hi-side MOSFET and the
Lo-side MOSFET. And, when the load condition changes from light-load to heavy-load,the operation changes from
the Pulse-Skip-Mode to the normal PWM switching mode in a moment.
Notes:
*The VCOMP, the Skip signal, and, the light-load detection threshold Vsk will not be able to confirm directly from the
outside of the package.
*The pulse-skip mode can't be intentional cancellation by the external signal.
Fig. 7-9
Timing chart of the Pulse-Skip-Mode
In addition, pulse-skipping mode frequency as described above will be decreased. There is also a case to be audible
frequency band (20kHz or less). Pulse skip frequency Fskip can be roughly calculated by the following equation.
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(6)
In actual operation confirmation of the standby-light load, if the audible-noise by the operation of an
audible-frequency-range occurs, please adjust the inductance(L) of the inductor in reference to the equation (6).
However, if the Fskip becomes higher, power consumption will increase. Please be careful. In pulse skipping
operation, the ILP of equation (6) is limited to a constant value determined by the input voltage V IN and use inductor
inductance L. But, it has the input voltage dependence such as Fig7-10. If you wish to calculate the Fskip, please
pick up the value of the ILP from Fig7-10 and substitute the ILP to equation (6).
1.2
1
L=6.8μH
ILP(A)
0.8
L=10μH
0.6
L=22μH
0.4
L=33μH
L=47μH
0.2
L=68μH
0
0
5
10
15
20
25
30
35
VIN(V)
Fig. 7-10
VIN vs. IL characteristics (with inductance L variation)
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8.
Design Notes
8.1
External Components
All components are required for matching to the condition of use.
8.1.1
Inductor L1
The Inductor is one of the most important components in the Buck regulators. In order to maintain the stabilized
regulator operation, the Inductor should be carefully selected so it must not saturate or overheat excessively at any
conditions. Please select an inductor with care to six items listed below.
 It is for switching regulator use only
Because the coil for the noise filter (For EMI Countermeasure) has large loss and large heat generation, please do
not use.
 Avoidance of sub-harmonic oscillation
Under the peak detection current control, when the control Duty is more than 0.5 in use conditions, the inductor
current may fluctuate at a frequency that is an integer multiple of switching operation frequency. This phenomenon
is the known as sub-harmonic oscillation and this phenomenon theoretically occurs in the peak detection current
control mode. In order to stabilize the operation, although the inductor current compensation is made internally, the
inductance corresponding to the output voltage should be selected as an application. Specifically, for slope
compensation amount is fixed in the IC, it is necessary to moderate the slope of the inductor current. The ripple
portion of Inductor current ΔIL and the peak current ILP are calculated from the following equations:
Large Inductance
Δ
small Inductance
(6)
Δ
(7)
Fig. 8-1
Relationship between the inductance and ripple current ΔIL
According to the equations, if the inductance of the inductor L is small, both ΔIL and ILp is increased. Consequently,
the inductor current becomes very steep if inductance is too small, so that the operation of the converter might
become unstable. It is necessary to take care of an inductance decrease due to magnetic saturation such as in
overload and load shortage.
(Inductance L calculation in case of "D≧0.5")
The duty control is represented by the ratio of the output voltage V O and the input voltage VIN. The control duty will
be 0.5 or more in case that the input voltage V IN is 10V or less. If the inductor current is used as the continuous
current mode (CCM) in this input / output condition, the ΔI L in equation (9) is recommended the setting of less than
0.2A in order to avoid the sub-harmonic oscillation (Slope relaxation of the inductor current).
(9)
(Inductance L calculation in case of "D<0.5")
In the case of "D<0.5", the settable range of the ΔIL becomes "0.2≦ΔIL≦1A".
6.8μH that is a reference constant in the Typical Application Circuit is roughly the upper limit of the settable range
of the ΔIL. It is a setting that is able to give the smallest inductance L. If the ΔI L becomes smaller, the necessary
inductance L will be larger. Please calculate the inductance L using the equation (9) in the range of "ΔI L=0.2A-1A".
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 ΔIL / Io ratio
When the ΔIL/Io ratio is increased, the Inductance decreases.However, there is a matter of trade-off, for example, the
output ripple voltage increases.When the ΔI L/Io ratio is decreased, required inductance increases, and the outer
shape of the Inductor becomes larger. Setting of the ΔI L/Io ratio to 0.2 or 0.3 is conventionally regarded as a setting
for good cost performance.
 Diameter of the wire winding
When the Inductance is increased, if the core-size of the Inductor is identical, the number of turns of windings will
increase, and the diameter of wire windings will be thinner. Because the DC resistance DCR also increases, the large
current can't to flow. If the DCR is in priority, the core size of the Inductor enlarges.
 DC superposition characteristics
Depending on the material or shape of the core, the inductance of inductor has DC superposition characteristics that
decreases gradually by the flowing DC current. Be sure to confirm if the inductance value is significantly lower than
the design value when making the maximum load current for practical use flow. Obtain the data of the DC
superposition characteristics including graphs from the manufacturer of the coil to understand the characteristics of
the Inductor used in advance. In doing so, important parameters are:
1) Saturation point...At what ampere does magnetic saturation occur?
2) Inductance fluctuation with the practical load current
For example, for using it up to 1 A in the actual load Io, it can not use the Inductor which the saturation point is such
as 0.5 A. In addition, in spite of having an inductance of 10 μH at the no-load, please pay caution for the thing
which has the characteristic that it decreases to such as 5μH by the superposition current of 1A.
 Less noise
If the core is the open magnetic circuit type shaped like a drum, the magnetic flux passes outside the Inductor, so
that the peripheral circuit might be damaged due to noise. Use the Inductor which has a core/structure of the
low-leakage magnetic flux type. For details, consult the manufacturer of the Inductor.
 Heat generation
In actuality, when using the coil for mounting the PCB, heat generation of the coil main body might be influenced
by peripheral parts. In most cases, temperature rise of the coil includes the Inductor’s own heat generation, and there
are temperature limitations such as below:
1) onboard(Cars) grade product: 150°C
2) highly-reliable product: 125°C
3) general product: 85-100°C
Be sure to evaluate heat generation because temperature rise differs when the PCB on which the Inductor is mounted
is designed differently.In general, Inductors with a smaller DCR value on the specification sheet have smaller loss.
* Select the most appropriate one in consideration of the conditions of use, mounting, heat dissipation, etc.
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8.1.2
Input Capacitor CIN
Please use the ceramic capacitor to the input capacitor. It will lower the input impedance and it will contribute to the
stable operation of the IC. The input capacitor CIN must be arranged in as much as possible the shortest distance to
between IN - GND of the IC. Even if there is a smoothing capacitor CF in the transformer secondary side rectifying
and smoothing circuit, please place the CIN in the immediate vicinity of the IC. As a point of CIN selection, it will
include the following:
 Satisfaction of the withstand voltage and, that capacitance change with respect to the applied voltage is low
 The rate of capacity change in the ambient temperature range to be used is small
 Parts temperature which contains the heat-generation is must satisfy the specifications of the maximum
operating temperature
 Its impedance Z is sufficiently low in the temperature conditions and using frequency
* Please query the product information of the capacitor manufacturer.
* Even in the ceramic capacitor, in case of the insertion parts having a lead, its impedance will be higher than
surface-mounted type, therefore please be careful.
* In generally, in case of ceramic capacitors, the allowable ripple current is not included in the specification.
But,because it has the equivalent series resistance ESR inside, the ceramic capacitor occurs slightly heat-generation
by flowing ripple current. Therefore there is a need to comply with the maximum operating temperature containing
the heat generation. In this case, also please consider the heat conduction from the heat generating parts of the
surrounding.
Select the most suitable parts which has a margin in consideration of the use condition, the mounting condition, the
radiation condition, and so on.
8.1.3
Output Capacitor CO
In the current control mode, the feedback loop which detects the inductor current is added to the voltage control
mode. The stable operation is achieved by adding inductor current to the feedback loop without considering the
effect of secondary delay factor of LC filter. It is possible to reduce the capacitance of LC filter that is needed to
make compensations for the secondary delay, and the stable operation is achieved even by using the low ESR
capacitor (ceramic capacitor).
The output capacitor CO comprises the LC low-pass filter with the Inductor L1 and works as the rectifying capacitor
of switching output. The current equal to ripple portion ΔIL of the Inductor current charges and discharges the output
capacitor. The equivalent serial resistance ESR exists in the ceramics capacitor, and the voltage multiplied by ESR
and ΔIL becomes the output ripple voltage and it appears as VOripple.
Ω
Δ
(10)
To suppress output ripple voltage VO ripple to any value, the required ESR conditions in the ceramic capacitor can be
calculated by the following equation (10).
Ω
Δ
(11)
Therefore, if the ripple portion of the inductor current ΔIL is small, the output ripple voltage VO ripple will be
relatively small. If the ΔIL is large, as parallel connection of the ceramic capacitor, it may be necessary to reduce the
ESR. As a point of CO selection, it will include the following:
In the same way as the input capacitor CIN, as the point of CO selection, it will include the following:
 Satisfaction of the withstand voltage and, that capacitance change with respect to the applied voltage is low
 The rate of capacity change in the ambient temperature range to be used is small
 Parts temperature which contains the heat-generation is must satisfy the specifications of the maximum
operating temperature
 Its impedance Z is sufficiently low in the temperature conditions and using frequency
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*Please query the product information of the capacitor manufacturer
*Even in the ceramic capacitor, in case of the insertion parts having a lead, its impedance will be higher than
surface-mounted type, therefore please be careful.
*In generally, in case of ceramic capacitors, the allowable ripple current is not included in the specification.
But,because it has the equivalent series resistance ESR inside, the ceramic capacitor occurs slightly heat-generation
by flowing ripple current. Therefore there is a need to comply with the maximum operating temperature containing
the heat generation. In this case, also please consider the heat conduction from the heat generating parts of the
surrounding.
Select the most suitable parts which has a margin in consideration of the use condition, the mounting condition, the
radiation condition, and so on.
8.2
Pattern Design
High current paths in the circuit are marked as bold lines in the circuit diagram below. These paths are required for
wide and short trace as possible. In addition, the pattern trace which is the signal system GND, and the pattern trace
which the main circuit current flows, please to so that it does not become common impedance.
Fig. 8-2
8.2.1
Note points in the wiring pattern
Input / Output Capacitors(CIN,CO)
The input capacitor CIN and the output capacitor CO are
required to connect to the IC as short as possible.
Think about the image to connect it between the pins of the
IC ideally and directly.
In such cases as the secondary side of the switching power
supply, when there is a filter capacitor on the input side in
advance, though it is possible that it is included with a input
capacitor for NR263S, in case of long distance between filter
capacitor and NR263S , it is necessary to connect as
“line-bypass-capacitor”,aside from the one for the filter.
The ripple current flows to the capacitor of input and output,
you must make Low impedance and ESR.
When you design a circuit board, set to shorter length the
pattern of input and output capacitor.
In the same way,consideration is necessary for route of the
capacitor pattern.
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(A)
(B)
(A)・・・Recommended Pattern
(B)・・・No good pattern example
Fig. 8-3 CIN,CO
pattern example
21
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8.2.2
PCB Layout & Recommended Land Pattern
The pattern example of the printed circuit board for our Demo Board is shown in the Fig8-6. (Double sided PCB)
PCB Size:40mm×40mm
Thickness:1.6mm
Copper foil thickness:35μm
Fig. 8-4
Component mounting side (surface)
Fig. 8-5Back side (see from surface)
Fig. 8-6 Our demo board circuit diagram for NR260S series
(In reference for NR263S)
C1,C2:10μF/25V
C3:0.1μF C4,C5:22μF/16V C7:0.047μF R3:≦10Ω
R1:100kΩ
R4 & R5:Short
R6:Open
L1:6.8μH
*Part number will match the silk-prints of the demo board.
*Optional Parts
C11:Phase advance capacitor・・・For experiment
C12:Bypass capacitor (IN to AGND&PGND)・・・For experiment
C13:Snubber circuit capacitor・・・For experiment, R10:Snubber circuit resistor・・・For experiment
R2:Open (R2 is not used in the NR260S series)
R3:Resistor for spike noise reduction・・・For experiment
D1:The Schottky barrier diode for Efficiency improvement・・・For experiment
It is recommended a Schottky barrier diode having a smaller V F than the parasitic diode VF of the Lo-side MOSFET.
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Notes:
1) Dimension is in millimeters, *Dimensions in brackets are in inches
2) Drawing is not to scale
Fig. 8-7
Foot printing for SOP8(recommended land Pad)
8.3
Applied Design
8.3.1
Spike Noise Reduction(1)
The addition of the BS serial resistor
The “turn-on switching speed” of the internal
Power-MOSFET can be slowed down by inserting RBS
(option) of the Fig8-10.It is tendency that Spike noise
becomes small by reducing the switching-speed. Set
up 10-ohm as an upper limit when you use RBS.
*Attention
1) When the resistance value of RBS is enlarged by
mistake too much, the internal power-MOSFET
becomes an under-drive,it may be damaged worst.
2) The “defective starting-up” is caused when the
resistance value of RBS is too big.
*The BS serial resistor RBS is R3 in the Demonstration
Board.
8.3.2
RBS
BS
NR263S
Fig. 8-8
SW
CBS
The addition of the BS serial resistor
Spike Noise Reduction(2)
The addition of the Snubber circuit
In order to reduce the spike noise, it is possible to
compensate the output waveform and the recovery time
of internal parasitic diode by connecting a capacitor and
resistor parallel to the internal parasitic diode (snubber
method). This method however may slightly reduce the
efficiency.
* For observing the spike noise with an oscilloscope,
the probe lead (GND) should be as short as possible and
connected to the root of output capacitor. If the probe
GND lead is too long, the lead may act like an antenna
and the observed spike noise may be much higher and
may not show the real values.
*The snubber circuit parts are C13 and R10.
IN
SW
NR263S
PGND
≒10Ω
*Option
≒1000pF
Fig. 8-9
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The addition of the Snubber circuit
23
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8.3.3
Attention about the insertion of the bead-core
Fig. 8-10
Bead core insertion prohibited area
In the area surrounded by the red dotted line within the Fig8-12, don’t insert the bead-core such as Ferrite-bead.
As for the pattern-design of printed-circuit-board, it is recommended that the parasitic-inductance of wiring-pattern
is made small for the safety and the stability.
When bead-core was inserted, the inductance of the bead-core is added to parasitic-inductance of the wiring-pattern.
By this influence, the surge-voltage occurs often, or , AGND & PGND of IC becomes unstable, and also, negative
voltage occurs often.
Because of this, faulty operation occurs in the IC. The IC has the possibility of damage in the worst case.
About the Noise-reduction, fundamentally, Cope by “The addition of BS serial resistor” and “The addition of CR
snubber circuit”.
8.3.4
Reverse Bias Protection
A diode for reverse bias protection may be required
between input and output in case the output voltage is
expected to be higher than the input Pin voltage
(a common case in battery charger applications).
IN
2. IN
NR263S
NR885E
Fig. 8-11
8.3.5
SW
3.SW
Reverse bias protection diode
Overvoltage protection of VO terminal
If the hot-swap is done by such as load-line connector when the DC / DC converter circuit is in operation, the surge
voltage due to hot-swap will occur on the Vo output circuit. In your use condition, please be careful so that the
voltage applied to the VO terminal does not exceed the absolute maximum rating (6V). For problems such as the
reverse-flow from the external circuit, please take measures. Nevertheless, if you can not suppress an overvoltage
factors by the surge voltage such as when the hot-swap was done, please protect the VO terminal by inserting the
RVO as shown in Fig8-14. The resistance of RVO as a guide is defined as 100Ω. And, by inserting of the R VO
(= 100Ω) to the sensing line, the output voltage VO(=5V(typ)) will rise further +5mV equivalent.
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NR263S
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100Ω
Fig. 8-12
The resistor RVO for overvoltage protection of theVO terminal
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9.
Typical characteristics (Ta=25°C)
(1)Efficiency
100
90
80
Efficiency[%]
70
VIN=8V
VIN=12V
VIN=18V
VIN=24V
VIN=31V
60
50
40
30
20
10
0
0.001
0.010
0.100
1.000
Output Current IO [A]
Fig. 9-1
Io=1A
(4) Supply Current : IIN
2.5
6.0
Input current Iin [mA]
Output voltage VO [V]
(2) Output startup
5.0
4.0
3.0
2.0
1.0
0.0
4.0
5.0
6.0
7.0
2
1.5
1
0.5
0
8.0
0
5
Input voltage VIN [V]
Fig. 9-3
15
20
25
30
Input voltage VIN [V]
Fig. 9-2
(5) Shutdown Supply Current : Iin(off)
(3) Load Regulation : VLoad
10
Input current Iin [uA]
5.20
Output voltage VO [V]
10
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
9
8
7
6
5
4
3
2
1
0
0.0
0.2
0.4
0.6
0.8
1.0
0
Output current IO [A]
Fig. 9-4
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5
10
15
20
25
30
Input voltage VIN [V]
Fig. 9-5
26
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(6)Switching frequency : Fosc
(7)Over current protection
6.0
Output voltage VO [V]
Frequency Fosc [Khz]
1000
100
10
1
0
0.2
0.4
0.6
0.8
1
5.0
VIN=8V
VIN=12V
VIN=18V
VIN=24V
VIN=31V
4.0
3.0
2.0
1.0
0.0
0.0
Output current IO [A]
Fig. 9-7
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0.5
1.0
1.5
2.0
2.5
Output current IO [A]
Fig. 9-6
27
NR263S
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10. Packing specifications
Taping & Reel outline
Pocket
5.55
12.0
Round Sprocket
φ1.55
Holes
5.5
0.3
1.75
10.1
φ2.05
6.7
2.47
8.0
4.0
EIAJ No.TE1208
2.0
Notes:
1) All dimensions in millimeters (mm)
2) Surface resistance:under 109Ω
3 )Drawing is not to scale
Fig. 10-1
Taping outline
Notes:
1) All dimensions in
millimeters (mm)
2) Drawing is not to
scale
EIAJ No.RRM-12DC
φ13
Fig. 10-2
±0.2
Reel outline
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Quantity (TBD)
4000pcs/reel
φ330±2
±0.8
φ80±1
φ21
13.5
17.5
±0.5
±1.0
28
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IMPORTANT NOTICE
●All data, illustrations, graphs, tables and any other information included in this document as to Sanken’s products listed herein (the
“Sanken Products”) are current as of the date this document is issued. All contents in this document are subject to any change
without notice due to improvement, etc. Please make sure that the contents set forth in this document reflect the latest revisions
before use.
●The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to
Sanken. If considering use of the Sanken Products for any applications that require higher reliability (transportation equipment and
its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety devices, etc.), you
must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix your name and seal,
on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the Sanken Products. Any use
of the Sanken Products without the prior written consent of Sanken in any applications where extremely high reliability is required
(aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited.
●In the event of using the Sanken Products by either (i) combining other products or materials therewith or (ii) physically,
chemically or otherwise processing or treating the same, you must duly consider all possible risks that may result from all such
uses in advance and proceed therewith at your own responsibility.
●Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the
occurrence of any failure or defect in semiconductor products at a certain rate. You must take, at your own responsibility,
preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which
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●No contents in this document can be transcribed or copied without Sanken’s prior written consent.
●The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples and
evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of use of the
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●All technical information described in this document (the “Technical Information”) is presented for the sole purpose of reference of
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●Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied,
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●You must not use the Sanken Products or the Technical Information for the purpose of any military applications or use, including
but not limited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Technical
Information, or providing them for non-residents, you must comply with all applicable export control laws and regulations in each
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●Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including the
falling thereof, out of Sanken’s distribution network.
●Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it is
error free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting
from any possible errors or omissions in connection with the contents included herein.
●Please refer to the relevant specification documents in relation to particular precautions when using the Sanken Products, and refer
to our official website in relation to general instructions and directions for using the Sanken Products.
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29