bd9d321efj e

Datasheet
4.5V to 18V Input, 3.0A Integrated MOSFET
1ch Synchronous Buck DC/DC Converter
BD9D321EFJ
General Description
BD9D321EFJ is a synchronous buck switching regulator
with built-in low on-resistance power MOSFETs. It is
capable of providing current of up to 3 A. The SLLMTM
control provides excellent efficiency characteristics in
light-load conditions which make the product appropriate
for equipment and devices that demand minimal standby
power consumption. External phase compensation circuit
is not necessary for it is a constant on-time control DC/DC
converter with high speed response. Features









Synchronous Single DC/DC Converter
Constant On-time Control
TM
SLLM (Simple Light Load Mode) Control
Over Current Protection
Short Circuit Protection
Thermal Shutdown Protection
Under Voltage Lockout Protection
Adjustable Soft Start
HTSOP-J8 Package (Backside Heat Dissipation)
Key Specifications
 Input Voltage Range:
4.5V to 18.0 V
 Output Voltage Setting Range:
0.765V to 7V
(VIN×0.07)V to (VIN×0.65)V
 Output Current:
3 A (Max)
 Switching Frequency:
700 kHz (Typ)
 High Side MOSFET On-Resistance:100 m Ω (Typ)
 Low Side MOSFET On-Resistance: 70 m Ω (Typ)
 Standby Current:
2 μA (Typ)
Package
HTSOP-J8
Applications

Step-down Power Supply for DSPs, FPGAs,
Microprocessors, etc.

Set-top Box

LCD TVs

DVD / Blu-ray Player / Recorder

Entertainment Devices
W (Typ) x D (Typ) x H (Max)
4.90mm x 6.00mm x 1.00mm
HTSOP-J8
Typical Application Circuit
Figure 1. Typical Application Circuit
○Product structure: Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays.
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BD9D321EFJ
Pin Configuration
(TOP VIEW)
EN
1
8 VIN
FB
2
7
BOOT
VREG
3
6
SW
SS
4
5
GND
Figure 2. Pin Assignment
Pin Descriptions
Terminal
No.
Symbol
Function
1
EN
Turning this terminal signal low level (0.3 V or lower) forces the device to enter the shutdown
mode. Turning this terminal signal high level (2.2 V or higher) enables the device. This
terminal must be terminated.
2
FB
An inverting input terminal of comparator which compares with reference voltage (VREF).
Refer to page.17 for how to calculate the resistance of the output voltage setting.
3
VREG
4
SS
5
GND
Power supply voltage terminal inside IC.
Voltage of 5.25V (Typ) is outputted with more than 2.2V is impressed to EN terminal.
Connect 1µF ceramic capacitor to ground.
Terminal for setting the soft start time. The rise time of the output voltage can be specified by
connecting a capacitor to this terminal. Refer to page.17 for how to calculate the capacitance.
Ground terminal for the output stage of the switching regulator and the control circuit
Switch node. This terminal is connected to the source of the high-side MOSFET and drain of
the low-side MOSFET. Connect a bootstrap capacitor of 0.1µF between this terminal and
BOOT terminal. In addition, connect an inductor considering the direct current
superimposition characteristic.
6
SW
7
BOOT
8
VIN
Power supply terminal for the switching regulator.
Connecting a 20µF(10µF×2) and 0.1µF ceramic capacitor to ground is recommended.
-
FIN
A backside heat dissipation pad. Connecting to the internal PCB ground plane by using
multiple via provides excellent heat dissipation characteristics.
Connect a bootstrap capacitor of 0.1µF between this terminal and SW terminal.
The voltage of this capacitor is the gate drive voltage of the high-side MOSFET.
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BD9D321EFJ
Block Diagram
3
VREG
VIN
VREG
VIN
Thermal
Protection
VOUT
TSD
8
5V REG
VREG
7
BG
EN
UVLO
TSD
SS
BOOT
BG
EN
On Time
Controller
Block
Soft
Start
4
R
Q
S
SW
ZERO Driver
OCP Circuit
FB
2
VIN
VOUT
6
SW
5
REF
SS
GND
UVLO
OCP
TSD
EN
1
EN Logic
UVLO
Figure 3. Block Diagram
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BD9D321EFJ
Absolute Maximum Ratings (Ta = 25C)
Parameter
Symbol
Rating
Unit
Input Voltage (Note 1)
VIN
20
V
BOOT Voltage (Note 1)
VBOOT
27
V
BOOT-SW Voltage (Note 1)
VBOOT-VSW
7
V
Output Feedback Voltage
VFB
VREG
V
SW Voltage (Note 1)
VSW
20
V
VREG
7
V
SS Voltage (Note 1)
VSS
7
V
Logic Input Voltage (Note 1)
VEN
20
V
Pd
3.75
W
Operating Temperature Range
Topr
-40 to +85
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
+150
°C
VREG Voltage (Note 1)
Power dissipation
(Note 2)
Junction Temperature
(Note 1) No need to exceed Pd.
(Note 2) Derating in done 30.08 mW/°C for operating above Ta ≥ 25°C (Mount on 4-layer 70.0mm×70.0mm×1.6mm board)
Caution1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Caution2: The operating temperature range is intended to guarantee functional operation and does not guarantee the life of the LSI within this range. The life of
the LSI is subject to derating depending on usage environment such as the voltage applied, ambient temperature and humidity. Consider derating in the design
of equipment and devices.
Recommended Operating Conditions
Limit
Parameter
Symbol
Unit
Min
Typ
Max
Input voltage
VIN
4.5
12
18
V
BOOT voltage
VBOOT
4.5
-
24
V
VSW
-0.7
-
+18
V
BOOT-SW voltage
VBOOT-VSW
4.5
-
5.5
V
Logic Input Voltage
VEN
0
-
18
V
Output Current
IOUT
-
-
3
A
VRANGE
0.765 (Note 3)
-
7 (Note 4)
V
SW Voltage
Output Voltage Range
(Note 3) Please use under the condition of VOUT ≥ VIN×0.07 [V].
(Note 4) Please use under the condition of VOUT ≤ VIN×0.65 [V].
(Refer to the page 17 for how to calculate the output voltage setting.)
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BD9D321EFJ
Electrical Characteristics
(Ta = 25°C, VIN = 12V, VEN = 3V unless otherwise specified)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
<VIN Pin Block >
Standby Circuit Current
ISTB
-
2
15
µA
VEN=GND
Operating Circuit Current
IVIN
-
0.7
2
mA
VEN=3V, IOUT=0mA
when no switching
EN Low Voltage
VENL
-
-
0.3
V
EN High Voltage
VENH
2.2
-
VIN
V
EN Bias Current
IEN
-
1.5
5
µA
VEN=3V
VVREG_STB
-
-
0.1
V
VEN=GND
VVREG
5
5.25
5.5
V
IREG
-
10
-
mA
UVLO Threshold Voltage
VVREG_UVLO
3.4
3.8
4.2
V
UVLO Hysteresis Voltage
dVVREG_UVLO
200
300
400
mV
FB Threshold Voltage1
VREF1
0.753
0.765
0.777
V
VIN=12V, VOUT=1.8V
PWM Mode Operation
FB Threshold Voltage2
VREF2
0.741
0.757
0.773
V
VIN=12V, VOUT=5.0V
PWM Mode Operation
FB Input Current
IFB
-
-
1
µA
SS Charge Current
ISSC
1.4
2.0
2.6
µA
SS Discharge Current
ISSD
0.1
0.2
-
mA
Ton
-
215
-
nsec
Toffmin
100
200
-
nsec
High Side FET ON Resistance
RONH
-
100
200
mΩ
Low Side FET ON Resistance
RONL
-
70
140
mΩ
Iocp
-
5
-
A
<Enable Block >
<5V Linear Regulator Block >
VREG Standby Voltage
VREG Output Voltage
Maximum Current
< Under-Voltage Lock-Out Block >
VREG: Sweep up
VREG: Sweep down
< Reference Voltage Block >
VREG=5.25V,
VSS=0.5V
< On Time Control Block >
On Time
Minimum Off Time
VIN=12V,
VOUT=1.8V
<SW Block >
< Over Current Protection Block >
Over Current Protection Current Limit
(Note 5)
(Note 5)
No tested on outgoing inspection.
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Typical Performance Curves
1200
10
9
8
800
VIN Supply Current [µA]
VIN Supply Current [µA]
1000
VIN=12V
600
400
7
6
5
4
3
VIN=12V
2
200
1
0
0
-50
0
Tj [°C]
50
-50
100
0
50
100
Tj [°C]
Figure 4. VIN Current vs Junction Temperature
Figure 5. VIN Shutdown Current vs Junction Temperature
2.00
50
45
1.90
35
VIN=12V
30
VOUT [V]
EN Input Current [µA]
40
25
20
1.80
1.70
15
1.60
10
5
1.50
0
0
5
10
15
20
0.5
1
1.5
2
2.5
3
IOUT [A]
EN [V]
Figure 6. EN Current vs EN Voltage
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Figure 7. Output Voltage vs Output Current
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Typical Performance Curves (Continued)
1.90
100
1.88
90
1.86
80
IOUT=1A
70
Efficiency [%]
VOUT [V]
1.84
1.82
1.80
1.78
IOUT=10mA
1.76
10
1.70
0
15
VOUT =1.8V
30
1.72
10
VOUT =3.3V
40
20
5
VOUT =5.0V
50
1.74
0
VOUT =7.0V
60
20
VOUT =1.05V
VIN=12V
0.001
0.01
0.1
Figure 8. Output Voltage vs Input Voltage
10
Figure 9. Efficiency vs Output Current
EN 5V/div
VIN 10V/div
VREG 5V/div
VREG 5V/div
SW 10V/div
SW 10V/div
VOUT 1V/div
VOUT 1V/div
500µsec/div
500µsec/div
Figure 10. Start-up Waveform(EN=0V→5V)
(VIN=12V, VOUT=1.8V, IOUT=3A, Css=3300pF)
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1
IOUT [A]
VIN[V]
Figure 11. Start-up Waveform(VIN=EN)
(VIN=12V, VOUT=1.8V, IOUT=3A, Css=3300pF)
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Typical Performance Curves (Continued)
VIN 10V/div
EN 5V/div
VREG 5V/div
VREG 5V/div
SW 10V/div
SW 10V/div
VOUT 1V/div
VOUT 1V/div
500µsec/div
500µsec/div
Figure 12. Shutdown Waveform(EN=5V→0V)
(VIN=12V, VOUT=1.8V, IOUT=3A, Css=3300pF)
Figure 13. Shutdown Waveform(VIN=EN)
(VIN=12V, VOUT=1.8V, IOUT=3A, Css=3300pF)
VOUT
50mV/div
VOUT
50mV/div
IOUT
2.0A/div
IOUT
2.0A/div
100µsec/div
100µsec/div
Figure 15. Load Transient Response
(VIN=12V, VOUT=1.8V, IOUT=1A to 3A)
Figure 14. Load Transient Response
(VIN=12V, VOUT=1.8V, IOUT=50mA to 3A)
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Typical Performance Curves (Continued)
900
900
850
800
750
Switching Frequency [kHz]
Switching Frequency [kHz]
800
VOUT=1.8V
700
650
600
550
500
700
VOUT=1.8V
600
500
400
300
200
100
450
VIN=12V
IOUT=1A
400
0
0
5
10
15
20
0
0.5
1
1.5
2
2.5
3
VIN[V]
IOUT [A]
Figure 16. Switching Frequency vs Input Voltage
Figure 17. Switching Frequency vs Output Current
VIN
100mV/div
SW
5V/div
1µsec/div
Figure 18. Voltage Ripple at Input
(VIN=12V, VOUT=1.8V, IOUT=3A, L=2.2µH, CIN=10µF x 2)
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Typical Performance Curves (Continued)
VOUT
20mV/div
VOUT
20mV/div
SW
5V/div
SW
5V/div
10µsec/div
1µsec/div
Figure 19. Voltage Ripple at Output
Figure 20. Voltage Ripple at Output
(VIN=12V, VOUT=1.8V, IOUT=30mA, L=2.2µH, COUT=22µF x 2)
(VIN=12V, VOUT=1.8V, IOUT=3A, L=2.2µH, COUT=22µF x 2)
0.78
0.775
V REF [V]
0.77
0.765
0.76
0.755
0.75
0.745
0
20
40
60
80
ON Duty[%]
Figure 21. Reference Voltage vs ON Duty
(PWM operation)
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BD9D321EFJ
Function Explanations
1 Basic Operation
1-1 Constant On Time Control
BD9D321EFJ is a single synchronous buck switching regulator employing a constant on-time control system.
It controls the on-time by using the duty ratio of VOUT /VIN inside IC so that a switching frequency becomes 700 kHz.
Therefore it runs with the frequency of 700 kHz under the constant on-time decided with VOUT / VIN.
1-2 SLLMTM Control
BD9D321EFJ utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes
SLLM (Simple Light Load Mode) control for lighter load to improve efficiency.
Efficiency η[%]
① SLLMTM Control
② PWM Control
Output Current IOUT[A]
Figure 22. Efficiency (SLLMTM Control and PWM Control)
①SLLMTM Control
②PWM Control
VOUT
20mV/div
VOUT
20mV/div
SW
5V/div
SW
5V/div
10µsec/div
1µsec/div
Figure 23. SW Waveform (①SLLMTM control)
(VIN = 12V, VOUT = 1.8V, IOUT = 30mA)
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Figure 24. SW Waveform (②PWM control)
(VIN = 12V, VOUT = 1.8V, IOUT = 3A)
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BD9D321EFJ
1-3 Enable Control
The IC shutdown can be controlled by the voltage applied to the EN terminal. When VEN reaches 2.2 V (Typ), the
internal circuit is activated and the IC starts up.
VEN
EN terminal
VENH
VENL
0
t
VOUT
Output setting voltage
0
t
Soft start time
Figure 25. Start-up with EN pin
1-4 Soft Start Function
By turning EN terminal to High, the soft start function operates and it gradually starts output voltage by controlling the
current at start-up. Also soft start function prevents sudden current and over shoot of output voltage. Rising time can
be set by connecting capacitor to SS terminal. For setting the rising time, please refer to page.17.
EN
SS
VTH
VOUT
0.765V
FB
Td
Tss
Figure 26. Soft Start Timing chart
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BD9D321EFJ
2 Protective Functions
The protective circuits are intended for prevention of damage caused by unexpected accidents. Do not use them
for continuous protective operation.
2-1 Over Current Protection (OCP)
Over current protection function is effective by controlling current which flows in low side MOSFET by 1 cycle each of
switching period. With inductor current exceeding the current restriction setting value IOCP when LG is ON, the HG
pulse cannot be hit even with FB voltage under REF voltage and LG continues to be ON until it is below IOCP. It hits
HG when it goes below IOCP. As a result both frequency and duty fluctuates and output voltage may decrease.
In a case where output is decreased because of OCP, output may rise after OCP is released due to the action at high
speed load response. This is non-latch protection and after over current situation is released the output voltage will
recover.
VOUT
FB
High side
MOSFET gate
(HG)
Low side
MOSFET gate
(LG)
OCP threshold (Iocp)
Inductor current
OCP signal
inside IC
Output load
current
Normal
Over
Current
Normal
Figure 27. Over current protection timing chart
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2-2 Under Voltage Lockout Protection (UVLO)
The Under Voltage Lockout Protection circuit monitors the VREG terminal voltage.
The operation enters standby when the VREG terminal voltage is 3.5 V (Typ) or lower.
The operation starts when the VREG terminal voltage is 3.8 V (Typ) or higher.
Figure 28. UVLO Timing Chart
※Load at Startup
Ensure that the respective output has light load at startup of this IC. Also, restrain the power supply line noise at startup and
voltage drop generated by operating current within the hysteresis width of UVLO. Noise exceeding the hysteresis noise width
may cause the IC to malfunction.
2-3 Thermal Shutdown Function
When the chip temperature exceeds Tj = 175°C, the DC/DC converter is stopped. The thermal shutdown circuit is
intended for shutting down the IC from thermal runaway in an abnormal state with the temperature exceeding Tjmax =
150°C. Do not use this function for application protection design. This is non-latch protection.
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BD9D321EFJ
Application Example
Figure 29. Application Circuit
VIN
[V]
VOUT [V]
Table 1. Recommended Component values
R1 [kΩ]
R2 [kΩ]
C1 [pF]
L [µH] (Note 7)
12
1.0
6.8
22
- (Note 6)
1.5
12
1.05
8.2
22
- (Note 6)
1.5
(Note 6)
1.5
12
1.2
12+0.51
22
-
12
1.8
30
22
- (Note 6)
2.2
(Note 6)
2.2
12
3.3
68+5.6
22
-
12
5.0
120+3.3
22
- (Note 6)
3.3
12
7.0
180+3.3
22
- (Note 6)
3.3
(Note 6) C1 is a feed forward capacitor.
Additional phase boost can be achieved by adding the 5pF to 100pF capacitor (C1) in parallel with R1.
(Note 7) Recommended Inductor ・ALPS GLMC series
・TDK
SPM6530 series
Selection of Components Externally Connected
(1) Output LC Filter Constant
The DC/DC converter requires an LC filter for smoothing the output voltage in order to supply a continuous current to the
load. Selecting an inductor with a large inductance causes the ripple current ∆IL that flows into the inductor to be small.
However, decreasing the ripple voltage generated in the output is not advantageous in terms of the load transient
response characteristic. An inductor with a small inductance improves the transient response characteristic but causes the
inductor ripple current to be large which increases the ripple voltage in the output voltage, showing a trade-off relationship.
The recommended inductor values are shown in Table 1.
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BD9D321EFJ
IL
Inductor saturation current > IOUTMAX +⊿IL /2
⊿IL
Average inductor current
(Output Current:IOUT)
t
Figure 30. Waveform of current through inductor
Figure 31. Output LC filter circuit
The inductor peak to peak ripple current ⊿IL is calculated using the following equation.
ΔI L  VOUT  (VIN -VOUT ) 
1
[A]
VIN  FOSC  L
For example, with VIN = 12 V, VOUT = 1.8 V, L = 2.2µH and the switching frequency FOSC = 700 kHz, the calculated peak
current ⊿IL is 1.0A.
Then, the inductor saturation current must be larger than the sum of the maximum output current (IOUTMAX) and 1/2 of the
inductor ripple current (∆IL / 2).
The output capacitor COUT affects the output ripple voltage characteristics. The output capacitor COUT must satisfy the
required ripple voltage characteristics.
The output ripple voltage can be represented by the following equation.
ΔVRPL  ΔI L  (RESR 
1
8  COUT  FOSC
)[V]
RESR is the Equivalent Series Resistance (ESR) of the output capacitor.
※The capacitor rating must allow a sufficient margin with respect to the output voltage.
The output ripple voltage can be decreased with a smaller ESR.
A ceramic capacitor of about 22 µF to 100 µF is recommended.
※Pay attention to total capacitance value, when additional capacitor CLOAD is connected in addition to output capacitor
COUT. Then, please determine CLOAD and soft start time Tss (Refer to (3) Soft Start Setting) as satisfying the following
equation.
COUT  C LOAD ≤
(I OCP - I OUT )  TSS
[μF]
VOUT
IOCP is Over Current Protection Current limit value.
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(2) Output Voltage Setting
The output voltage value can be set by the feedback resistance ratio.
VOUT
R1
FB
R2
Voltage
Reference
Figure 32. Feedback Resistor Circuit
VOUT 
R1  R2
 VREF V
R2
The VREF can be represented by the following equation defining VOUT_T as the target output voltage.
In case
In case
0.07 
0.5 
VOUT _ T
VIN
VOUT _ T
VIN
, VREF  0.02 
 0.5  0.65, VREF
VOUT _ T
VIN
 VOUT _ T
 0.22  
 VIN
 0.765 [V]
2
V

  0.2  OUT _ T  0.7105 [V]
VIN

BD9D321EFJ can operate under the condition which satisfies the following equation.
0.07 ≤
VOUT
≤ 0.65
VIN
3) Soft Start Setting
Turning the EN terminal signal High activates the soft start function. This causes the output voltage to rise gradually while
the current at startup is placed under control. This allows the prevention of output voltage overshoot and inrush current.
The rise time depends on the value of the capacitor connected to the SS terminal.
Td  C SS VTH I SS
TSS  C SS V FB  1.15 I SS
where
Td
TSS
C SS
V FB
VTH
is Internal MOS threshold voltage(0.7V Typ)
I SS
is Soft Start Terminal Source Current(2.0μA Typ)
is Soft Start Delay Time
is Soft Start Time
is Capacitor connected to Soft Start Time Terminal
is FB Terminal Voltage(0.765V Typ)
with CSS  3300pF,
Td = (3300 [pF]  0.7 [V] ) / 2.0 [μA]
= 1.16 [msec]
TSS = ( 3300 [pF]  0.765 [V]  1.15 ) / 2.0 [μA]
= 1.45[msec]
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PCB Layout Design
In the step-down DC/DC converter, a large pulse current flows into two loops. The first loop is the one into which the current
flows when the high side FET is turned ON. The flow starts from the input capacitor CIN, runs through the FET, inductor L
and output capacitor COUT and back to ground of CIN via ground of COUT. The second loop is the one into which the current
flows when the low side FET is turned on. The flow starts from the low side FET, runs through the inductor L and output
capacitor COUT and back to ground of the low side FET via ground of COUT. Route these two loops as thick and as short as
possible to allow noise to be reduced for improved efficiency. It is recommended to connect the input and output capacitors
directly to the ground plane. The PCB layout has a great influence on the DC/DC converter in terms of all of the heat
generation, noise and efficiency characteristics.
VIN
MOS FET
CIN
VOUT
L
COUT
Figure 33. Current Loop of Buck Converter
Accordingly, design the PCB layout considering the following points.





Connect an input capacitor as close as possible to the IC VIN terminal on the same plane as the IC.
If there is any unused area on the PCB, provide a copper foil plane for the ground node to assist heat dissipation from
the IC and the surrounding components.
Switching nodes such as SW are susceptible to noise due to AC coupling with other nodes. Route the coil pattern as
thick and as short as possible.
Provide lines connected to FB and SS far from the SW nodes.
Place the output capacitor away from the input capacitor in order to avoid the effect of harmonic noise from the input.
EN
GND_S
GND
VIN
EN
VIN_S
GND_S
GND
VIN
VIN_S
VOUT_S
VOUT_S
CIN CBOOT
R1 R2
VOUT
C1
VOUT
CVREG CSS
L
COUT
GND
GND
GND_S
GND_S
TOP Layer
Bottom Layer
Figure 34. Example of PCB layout
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BD9D321EFJ
Power Dissipation
When designing the PCB layout and peripheral circuitry, sufficient consideration must be given to ensure that the power
dissipation is within the allowable dissipation curve.
HTSOP-J8 Package
70  70  1.6 mm assembled glass epoxide board
(1) 4-layer board (Copper foil area 70 mm  70 mm)
(2) 2-layer board (Copper foil area 70 mm  70 mm)
(3) 2-layer board (Copper foil area 15 mm  15 mm)
(4) 1-layer board (Copper foil area 0 mm 0 mm)
Figure 35. Power dissipation (HTSOP-J8)
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BD9D321EFJ
I/O Equivalent Circuit
1. EN
2. FB
EN
333kΩ
666kΩ
1MΩ
3. VREG
4. SS
VIN
VREG
VREG
SS
2.3kΩ
6. SW
7. BOOT
BOOT
VREG
VIN
VIN
BOOT
SW
SW
Figure 36. I/O equivalence circuit
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BD9D321EFJ
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on 4 - layer 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 37. Example of monolithic IC structure
12.
Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
14. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD9D321EFJ
Ordering Information
B
D
9
D
3
Part Number
2
1
E
F
J
Package
EFJ: HTSOP-J8
-
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
HTSOP-J8 (TOP VIEW)
Part Number Marking
D 9 D 3 2 1
LOT Number
1PIN MARK
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BD9D321EFJ
Physical Dimension, Tape and Reel Information
Package Name
HTSOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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)
∗ Order quantity needs to be multiple of the minimum quantity.
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Revision History
Date
Revision
07.Aug.2013
29.Jan.2015
001
002
Changes
Created
Revised the Electrical Characteristics and Table1. Added Figure 21.
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-GE
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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