DATASHEET

HCTS164MS
TM
Radiation Hardened
8-Bit Serial-In/Parallel-Out Shift Register
August 1995
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835, CDIP2-T14
TOP VIEW
• Total Dose 200K RAD (Si)
• Dose Rate Survivability >1012 RAD (Si)/s (20ns Pulse)
• Dose Rate Upset >1010 RAD (Si)/s (20ns Pulse)
DS1 1
14 VCC
• Single Event Ray Upset Rate < 2 x 10-9 Errors/Bit Day
(Typ)
DS2 2
13 Q7
Q0 3
12 Q6
Q1 4
11 Q5
• Military Temperature Range: -55oC to +125 oC
Q2 5
10 Q4
• Significant Power Reduction Compared to LSTTL ICs
Q3 6
9 MR
GND 7
8 CP
• LET Threshold >100 MEV-cm2/mg
• Latch-Up-Free Under Any Conditions
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
-VIL = 0.8 VCC (Max)
-VIH = VCC/2 (Min)
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835, CDFP3-F14
TOP VIEW
• Input Current Levels Ii ≤5µA at VOL, VOH
DS1
Description
The Intersil HCTS164MS is a radiation hardened 8-bit Serial-In/
Parallel-Out Shift Register with asynchronous reset.
The HCTS164MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
1
14
VCC
DS2
2
13
Q7
Q0
3
12
Q6
Q1
4
11
Q5
Q2
5
10
Q4
Q3
6
9
MR
GND
7
8
CP
Ordering Information
PART NUMBER
TEMPERATURE RANGE
HCTS164DMSR
-55oC to +125oC
HCTS164KMSR
-55oC to +125oC
SCREENING LEVEL
PACKAGE
Intersil Class S Equivalent
14 Lead SBDIP
Intersil Class S Equivalent
14 Lead Ceramic Flatpack
HCTS164D/Sample
+25oC
Sample
14 Lead SBDIP
HCTS164K/Sample
+25oC
Sample
14 Lead Ceramic Flatpack
HCTS164HMSR
+25oC
Die
Die
Truth Table
INPUTS
OUTPUTS
OPERATING
MODE
MR
CP
DS1†
DS2†
Q0
Reset (Clear)
L
X
X
X
L
L-L
Shift
H
L
L
L
q0 -q6
H
L
H
L
q0 - q6
H
H
L
L
q0 - q6
H
H
H
H
q0 - q6
Q1-Q7
H = High Voltage Level
L = Low Voltage Level
= LOW-to-HIGH clock transition
q = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition
† = DS1 and DS2 inputs must be at state one setup prior to CP (rising edge)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
FN
Spec Number
3386.1
518613
HCTS164MS
Functional Diagram
CP
DS1
DS2
CL
D Q
R
CL
D
CL
Q
D
R
CL
D Q
R
Q
R
CL
D
CL
Q
D
R
CL
D Q
R
Q
R
CL
D
Q
R
MR
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Spec Number
2
Q7
518613
Specifications HCTS164MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
74oC/ W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 116oC/ W 30oC/W
Maximum Package Power Dissipation at +125o Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . .0.43W
If device power exceeds package dissipation capability provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5 VCC (TR, TF) . . . . . . 100ns/ V Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . VCC to VCC/2V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETERS
Supply Current
SYMBOL
ICC
Output Current
(Sink)
IOL
Output Current
(Source)
IOH
Output Voltage Low
VOL
Output Voltage High
Input Leakage
Current
Noise Immunity
Functional Test
(NOTE 1)
CONDITIONS
VOH
IIN
FN
GROUP
A SUBGROUPS
VCC = 5.5V,
VIN = VCC or GND
LIMITS
TEMPERATURE
o
1
+25 C
MIN
MAX
UNITS
-
40
µA
-
750
µA
1
+25oC
4.8
-
mA
2, 3
+125oC, -55oC
4.0
-
mA
1
+25oC
-4.8
-
mA
2, 3
+125oC, -55oC
-4.0
-
mA
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
±0.5
µA
-
±5.0
µA
-
-
-
2, 3
VCC = VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
(Note 2)
VCC = VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V (Note 2)
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
2, 3
7, 8A, 8B
+125oC,
+125oC,
+25oC,
-55oC
-55oC
+125oC,
-55oC
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”.
Spec Number
3
518613
Specifications HCTS164MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
CP to Qn
TPLH
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
26
ns
VCC = 4.5V
VCC = 4.5V
CP to Qn
TPHL
VCC = 4.5V
VCC = 4.5V
MR to Qn
TPHL
LIMITS
GROUP
A SUBGROUPS
+125 C, -55 C
2
33
ns
9
+25oC
2
33
ns
2
40
ns
2
34
ns
2
42
ns
+125oC,
-55oC
o
9
VCC = 4.5V
o
10, 11
10, 11
VCC = 4.5V
o
+25 C
10, 11
+125oC,
-55oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3.0V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
SYMBOL
(NOTE 1)
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
Capacitance Power
Dissipation
CPD
VCC = 5.0V, f = 1MHz
1
+25oC
-
135
pF
1
+125oC, -55oC
-
210
pF
Input Capacitance
CIN
1
+25oC
-
10
pF
1
+125oC, -55oC
-
10
pF
1
+25oC
-
15
ns
1
+125oC, -55oC
-
22
ns
PARAMETER
Output Transition Time
TTHL
TTLH
VCC = 5.0V, f = 1MHz
VCC = 4.5V
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Minimum and Maximum Limits are guaranteed, but not
directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETERS
Quiescent Current
SYMBOL
ICC
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
200K RAD
LIMITS
TEMP
MIN
MAX
UNITS
o
-
0.75
mA
o
+25 C
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND, VOUT =
0.4V
+25 C
4.0
-
mA
Output Current (Source)
IOH
VCC = 4.5V, VIN = VCC or GND, VOUT =
VCC -0.4V
+25oC
-4.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
+25oC
-
0.1
V
Output Voltage High
VOH
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
+25oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
µA
VCC = 4.5V, VIH = VCC/2, VIL = 0.8V,
(Note 3)
+25oC
-
-
-
Input Leakage Current
Noise Immunity
Functional Test
IIN
FN
Spec Number
4
518613
Specifications HCTS164MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETERS
(NOTES 1, 2)
CONDITIONS
SYMBOL
CP to Qn
TPLH
CP to Qn
VCC = 4.5V
TPHL
MR to Qn
200K RAD
LIMITS
TPHL
TEMP
MIN
MAX
UNITS
+25oC
2
33
ns
o
VCC = 4.5V
+25 C
2
40
ns
VCC = 4.5V
+25oC
2
42
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12µA
IOL/IOH
5
-15% of 0 Hour
PARAMETER
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test 1 (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test 2 (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test 3 (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 1)
Group B
Group D
READ AND RECORD
ICC, IOL/H
Subgroups 1, 2, 3, 9, 10, 11
NOTE:
1. Alternate Group A Testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
NOTE:
1. Except FN Test which will be performed 100% Go/No-Go.
Spec Number
5
518613
Specifications HCTS164MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
1/2 VCC = 3V ±0.5V
GROUND
VCC = 6V ±0.5V
50kHz
25kHz
-
14
-
-
-
1, 2, 8, 9, 14
-
-
3 - 6, 10 - 13
9, 14
8
1, 2
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
3 - 6, 10 - 13
1, 2, 7 - 9
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
3 - 6, 10 - 13
7
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
7
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ±5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1KΩ ±5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ±0.5V
3 - 6, 10 - 13
7
1, 2, 8, 9, 14
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ±5% for Irradiation Testing.
Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures.
AC Timing Diagrams and Load Circuit
DUT
VIH
TEST
POINT
INPUT
VS
VIL
CL
RL
TPLH
TPHL
VOH
VS
OUTPUT
CL = 50pF
VOL
RL = 500Ω
VOH
TTLH
TTHL
80%
VOL
20%
80%
20%
OUTPUT
AC VOLTAGE LEVELS
PARAMETER
HCTS
UNITS
VCC
4.50
V
VIH
3.0
V
VS
1.3
V
VIL
0
V
GND
0
V
Spec Number
6
518613
HCTS164MS
Die Characteristics
WORST CASE CURRENT DENSITY:
< 2.0 x 105A/cm2
DIE DIMENSIONS:
95 mils x 95 mils
2.380mm x 2.410mm
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
METALLIZATION:
Type: AlSi
Metal Thickness: 11kÅ ±1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ±2.6kÅ
Metallization Mask Layout
HCTS164MS
DS2
DS1
VCC
Q7
Q6
(2)
(1)
(14)
(13)
(12)
Q0 (3)
(11) Q5
Q1 (4)
NC
NC
(10) Q4
(5)
Q2
(6)
Q3
(7)
GND
(8)
CP
(9)
(MR)
Spec Number
7
518613
HCTS164MS
Intersil Space Level Product Flow - MS
Wafer Lot Acceptance, All Lots (including SEM);
Method 5007
100% Interim Electrical Test (T1)
Gamma Radiation Verification, Each Wafer, 4 Samples/
Wafer, 0 Rejects, Method 1019
100% Static Burn-In 2, Method 1015, Condition A or B, 24
Hours Minimum, + 125oC Minimum
100% Nondestructive Bond Pull, Method 2023
100% Interim Electrical Test 2 (T2)
Sample Wire Bond Pull Monitor, Method 2011
100% Delta Calculation (T0-T2)
Sample Die Shear Monitor, Method 2019 or 2027
100% PDA 1, Method 5004 (see Notes 1, 2)
100% Internal Visual Inspection - Method 2010, Condition A
100% Dynamic Burn-In, Condition D, 240 Hours, +125oC or
Equivalent per Method 1015
100% Delta Calculation (T0-T1)
100% Temperature Cycling, Method 1010, Condition C,
10 Cycles
100% Interim Electrical Test 3 (T3)
100% Constant Acceleration Method 2001, Condition per
Method 5004
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (see Note 2)
100% PIND, Method 2020, Condition A
100% Final Electrical Test
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Radiographic, Method 2012 (see Note 3)
100% Initial Electrical Test (T0)
100% External Visual, Method 2009
100% Static Burn-In 1, Method 1015, Condition A or B,
24 Hours Minimum, +125oC minimum
Sample Group A, Method 5005 (see Note 4)
100% Data Package Generation (see Note 5)
NOTES:
1. Failures from Interim Electrical Test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroups 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A as allowed by MIL-STD-883, Method 5005 may be performed.
5. Data package contains:
• Cover Sheet (Intersil name and/or logo, PO #, customer part #, lot date code, Intersil part #, lot #, quantity).
• Wafer lot acceptance report (Method 5007). Includes reproductions of SEM photos with % step coverage. GAMMA Radiation Report. Contains cover page, disposition, rad dose, Lot #, test package used, specifications #s, test equipment, etc. radiation read and record data on
file at Intersil.
• X- Ray report and film. Includes pentrameter measurements.
• Screening, electrical, and group A attributes (screening attributes begin after package seal).
• Lot serial number sheet (good units serial # and lot #).
• Variables data (all delta operations). Data is identified by serial number. The data header includes lot # and date of test.
• The Certification of Conformance is part of the shipping invoice and is not part of the data book. The Certificate of Conformance is signed
by an authorized quality representative.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
7585 Irvine Center Drive
Suite 100
Irvine, CA 92618
TEL: (949) 341-7000
FAX: (949) 341-7123
Intersil Corporation
2401 Palm Bay Rd.
Palm Bay, FL 32905
TEL: (321) 724-7000
FAX: (321) 724-7946
EUROPE
Intersil Europe Sarl
Ave. William Graisse, 3
1006 Lausanne
Switzerland
TEL: +41 21 6140560
FAX: +41 21 6140579
ASIA
Intersil Corporation
Unit 1804 18/F Guangdong Water Building
83 Austin Road
TST, Kowloon Hong Kong
TEL: +852 2723 6339
FAX: +852 2730 1433
Spec Number
8
518613
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