Data Sheet

PCA9515
I2C-bus repeater
Rev. 09 — 23 April 2009
Product data sheet
1. General description
The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and
SMBus systems.
While retaining all the operating modes and features of the I2C-bus system, it permits
extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines,
thus enabling two buses of 400 pF.
The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length.
Using the PCA9515 enables the system designer to isolate two halves of a bus, thus more
devices or longer length can be accommodated. It can also be used to run two buses, one
at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is
isolated when 400 kHz operation of the other is required.
Two or more PCA9515s cannot be put in series. The PCA9515 design does not allow
this configuration. Since there is no direction pin, slightly different ‘legal’ low voltage levels
are used to avoid lock-up conditions between the input and the output. A ‘regular low’
applied at the input of a PCA9515 will be propagated as a ‘buffered low’ with a slightly
higher value. When this ‘buffered low’ is applied to another PCA9515, PCA9516A, or
PCA9518A in series, the second PCA9515, PCA9516A, or PCA9518A will not recognize
it as a ‘regular low’ and will not propagate it as a ‘buffered low’ again. The
PCA9510A/9511A/9513A/9514A and PCA9512A cannot be used in series with the
PCA9515, PCA9516A, or PCA9518A but can be used in series with themselves since
they use shifting instead of static offsets to avoid lock-up conditions.
The PCA9515 SCLn/SDAn Ci is about 200 pF versus the normal < 10 pF when VCC = 0 V.
The newer PCA9515A should be used in applications where power is secured to the
repeater but an active bus remains on either set of SCLn/SDAn pins to prevent this
increase in bus loading. Additionally, the PCA9515A has a wider voltage range of 2.3 V to
3.6 V and can be used in applications with lower voltage supply constraints.
2. Features
n
n
n
n
n
n
n
n
n
2 channel, bidirectional buffer
I2C-bus and SMBus compatible
Active HIGH repeater enable input
Open-drain input/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Accommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters
Powered-off high-impedance I2C-bus pins
Operating supply voltage range of 3.0 V to 3.6 V
PCA9515
NXP Semiconductors
I2C-bus repeater
n 5.5 V tolerant I2C-bus (SCLn, SDAn) and enable (EN) pins
n 0 Hz to 400 kHz clock frequency1
n ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
n Packages offered: SO8 and TSSOP8 (MSOP8)
3. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
PCA9515D
SO8
plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
PCA9515DP
TSSOP8[1]
plastic thin shrink small outline package; 8 leads;
body width 3 mm
SOT505-1
[1]
Also known as MSOP8.
3.1 Ordering options
Table 2.
Ordering options
Type number
Topside mark
Temperature range
PCA9515D
PCA9515
Tamb = −40 °C to +85 °C
PCA9515DP
9515
Tamb = −40 °C to +85 °C
4. Block diagram
VCC
PCA9515
SDA0
SDA1
SCL0
SCL1
pull-up
resistor
EN
002aae620
GND
Fig 1.
Block diagram of PCA9515
The output pull-down of each internal buffer is set for approximately 0.5 V, while the input
threshold of each internal buffer is set about 0.07 V lower, when the output is internally
driven LOW. This prevents a lock-up condition from occurring.
1.
The maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
2 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
5. Pinning information
5.1 Pinning
n.c.
1
8
VCC
SCL0
2
7
SCL1
SDA0
3
6
SDA1
GND
4
5
EN
PCA9515D
n.c.
1
8
VCC
SCL0
2
7
SCL1
SDA0
3
6
SDA1
GND
4
5
EN
002aac744
002aac743
Fig 2.
PCA9515DP
Pin configuration for SO8
Fig 3.
Pin configuration for TSSOP8
5.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
n.c.
1
not connected
SCL0
2
serial clock bus 0
SDA0
3
serial data bus 0
GND
4
supply ground
EN
5
active HIGH repeater enable input
SDA1
6
serial data bus 1
SCL1
7
serial clock bus 1
VCC
8
supply power
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
3 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
6. Functional description
The PCA9515 BiCMOS integrated circuit contains two identical buffer circuits which
enable I2C-bus and similar bus systems to be extended without degradation of system
performance. (Refer to Figure 1 “Block diagram of PCA9515”.)
The PCA9515 BiCMOS integrated circuit contains two bidirectional open-drain buffers
specifically designed to support the standard low-level-contention arbitration of the
I2C-bus. Except during arbitration or clock stretching, the PCA9515 acts like a pair of
non-inverting, open-drain buffers, one for SDA and one for SCL.
6.1 Enable
The EN pin is active HIGH with an internal pull-up and allows the user to select when the
repeater is active. This can be used to isolate a badly behaved slave on power-up until
after the system power-up reset. It should never change state during an I2C-bus operation
because disabling during a bus operation will hang the bus and enabling part way through
a bus cycle could confuse the I2C-bus parts being enabled.
The enable pin (EN) should only change state when the global bus and the repeater port
are in an idle state to prevent system failures.
6.2 I2C-bus systems
As with the standard I2C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the buffered bus. (Standard open-collector configuration of the I2C-bus.)
The size of these pull-up resistors depends on the system, but each side of the repeater
must have a pull-up resistor. This part is designed to work with Standard-mode and
Fast-mode I2C-bus devices in addition to SMBus devices. Standard-mode I2C-bus devices
only specify 3 mA output drive; this limits the termination current to 3 mA in a generic
I2C-bus system where Standard-mode devices and multiple masters are possible. Under
certain conditions, higher termination currents can be used. Please see application note
AN255, “I2C/SMBus Repeaters, Hubs and Expanders” for additional information on sizing
resistors and precautions when using more than one PCA9515 in a system or using the
PCA9515 in conjunction with the P82B96.
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
4 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
7. Application design-in information
A typical application is shown in Figure 4. In this example, the system master is running
on a 3.3 V I2C-bus while the slave is connected to a 5 V bus. Both buses run at 100 kHz
unless the slave bus is isolated and then the master bus can run at 400 kHz. Master
devices can be placed on either bus.
3.3 V
5V
VCC
SDA
SDA0
SDA1
SDA
SCL
SCL0
SCL1
SCL
BUS
MASTER
400 kHz
PCA9515
bus 0
Fig 4.
SLAVE
100 kHz
EN
bus 1
002aae621
Typical application
The PCA9515 is 5 V tolerant so it does not require any additional circuitry to translate
between the different bus voltages.
When one side of the PCA9515 is pulled LOW by a device on the I2C-bus, a CMOS
hysteresis type input detects the falling edge and causes an internal driver on the other
side to turn on, thus causing the other side to also go LOW. The side driven LOW by the
PCA9515 will typically be at VOL = 0.5 V.
In order to illustrate what would be seen in a typical application, refer to Figure 5 and
Figure 6. If the bus master in Figure 4 were to write to the slave through the PCA9515, we
would see the waveform shown in Figure 5 on Bus 0. This looks like a normal I2C-bus
transmission until the falling edge of the 8th clock pulse. At that point, the master releases
the data line (SDA) while the slave pulls it LOW through the PCA9515. Because the VOL of
the PCA9515 is typically around 0.5 V, a step in the SDA will be seen. After the master
has transmitted the 9th clock pulse, the slave releases the data line.
On the Bus 1 side of the PCA9515, the clock and data lines would have a positive offset
from ground equal to the VOL of the PCA9515. After the 8th clock pulse, the data line will
be pulled to the VOL of the slave device that is very close to ground in our example.
It is important to note that any arbitration or clock stretching events on Bus 1 require that
the VOL of the devices on Bus 1 be 70 mV below the VOL of the PCA9515 (see VOL−VILc in
Section 9 “Static characteristics”) to be recognized by the PCA9515 and then transmitted
to Bus 0.
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
5 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
9th clock pulse
SCL
VOL of PCA9515
SDA
VOL of master
Fig 5.
002aae622
Bus 0 waveform
9th clock pulse
SCL
VOL of PCA9515
SDA
VOL of slave
Fig 6.
002aae623
Bus 1 waveform
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages with respect to GND.
Symbol
Parameter
Conditions
VCC
supply voltage
I2C-bus
Min
Max
Unit
−0.5
+7
V
SCL or SDA
−0.5
+7
V
any pin
-
50
mA
Vbus
voltage range
I
DC current
Ptot
total power dissipation
-
100
mW
Tstg
storage temperature
−55
+125
°C
Tamb
ambient temperature
−40
+85
°C
operating
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
6 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
9. Static characteristics
Table 5.
Static characteristics
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supplies
VCC
supply voltage
3.0
3.3
3.6
V
ICCH
HIGH-level supply current
both channels HIGH;
VCC = 3.6 V;
SDAn = SCLn = VCC
-
2.3
5
mA
ICCL
LOW-level supply current
both channels LOW;
VCC = 3.6 V; one SDA
and one SCL = GND,
other SDA and SCL open
-
2.3
5
mA
ICCLc
contention LOW-level supply current
VCC = 3.6 V;
SDAn = SCLn = GND
-
2.1
5
mA
V
Input SCLn; input/output SDAn
HIGH-level input voltage
VIH
0.7VCC
-
5.5
−0.5
-
+0.3VCC
V
−0.5
-
+0.4
V
VIL
LOW-level input voltage
[1]
VILc
contention LOW-level input voltage
[1]
VIK
input clamping voltage
II = −18 mA
-
-
−1.2
V
ILI
input leakage current
VI = 3.6 V
−1
-
+1
µA
IIL
LOW-level input current
SDA, SCL; VI = 0.2 V
-
-
10
µA
VOL
LOW-level output voltage
IOL = 0 mA or 6 mA
0.47
0.52
0.6
V
VOL−VILc
difference between LOW-level
output and LOW-level input voltage
contention
guaranteed by design
-
-
70
mV
ILOH
HIGH-level output leakage current
VO = 3.6 V
-
-
10
µA
6
7[2]
pF
input capacitance
Ci
VI = 3 V or 0 V
-
Enable input EN
VIL
LOW-level input voltage
−0.5
-
+0.8
V
VIH
HIGH-level input voltage
2.0
-
5.5
V
IIL
LOW-level input current
-
10
30
µA
ILI
input leakage current
−1
-
+1
µA
Ci
input capacitance
-
6
7
pF
EN; VI = 0.2 V
VI = 3.0 V or 0 V
[1]
VIL specification is for the first LOW level seen by the SDAn/SCLn lines. VILc is for the second and subsequent LOW levels seen by the
SDAn/SCLn lines.
[2]
The SCLn/SDAn Ci is about 200 pF when VCC = 0 V. The PCA9515A should be used in applications where power is secured to the
repeater but an active bus remains on either set of SCLn/SDAn pins.
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
7 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
10. Dynamic characteristics
Table 6.
Dynamic characteristics
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL
HIGH to LOW propagation delay
Figure 7
57
98
170
ns
tPLH
LOW to HIGH propagation delay
Figure 7
33
55
78
ns
tTHL
HIGH to LOW output transition time
Figure 7
-
67
-
ns
tTLH
LOW to HIGH output transition time
Figure 7
-
135
-
ns
tsu
set-up time
EN to START condition
100
-
-
ns
th
hold time
EN after STOP condition
100
-
-
ns
[1]
[1]
The tTLH transition time is specified with loads of 1.35 kΩ pull-up resistance and 7 pF load capacitance, plus an additional 50 pF load
capacitance. Different load resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and
transition times.
3.3 V
input
1.5 V
1.5 V
tPHL
tPLH
80 %
output
1.5 V
20 %
1.5 V
20 %
tTHL
0.1 V
3.3 V
80 %
VOL
tTLH
002aad478
Fig 7.
Propagation delay and transition times
11. Test information
VCC
VCC
RL
PULSE
GENERATOR
VI
VO
DUT
CL
RT
002aad479
RL = load resistor; 1.35 kΩ.
CL = load capacitance includes jig and probe capacitance; 7 pF.
RT = termination resistance should be equal to Zo of pulse generators.
Fig 8.
Test circuit for open-drain outputs
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
8 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
12. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
Fig 9.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Package outline SOT96-1 (SO8)
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
9 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
D
E
SOT505-1
A
X
c
y
HE
v M A
Z
5
8
A2
pin 1 index
(A3)
A1
A
θ
Lp
L
1
4
detail X
e
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.45
0.25
0.28
0.15
3.1
2.9
3.1
2.9
0.65
5.1
4.7
0.94
0.7
0.4
0.1
0.1
0.1
0.70
0.35
6°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-04-09
03-02-18
SOT505-1
Fig 10. Package outline SOT505-1 (TSSOP8)
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
10 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
13. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
13.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
13.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
13.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
11 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
13.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 11) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 7 and 8
Table 7.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
220
Table 8.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 11.
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
12 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 11. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
14. Abbreviations
Table 9.
Abbreviations
Acronym
Description
BiCMOS
Bipolar Complementary Metal-Oxide Semiconductor
CDM
Charged-Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
I2C-bus
Inter-Integrated Circuit bus
MM
Machine Model
RC
Resistor-Capacitor network
SMBus
System Management Bus
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
13 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
15. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9515_9
20090423
Product data sheet
-
PCA9519_8
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 1 “General description”:
– 4th paragraph: referenced part type numbers changed from “PCA951x” to “PCA951xA”
(excludes PCA9515)
– Added new 5th paragraph
•
Table 5 “Static characteristics”, sub-section “Input SCLn; input/output SDAn”:
– Symbol for parameter “input leakage current” changed from “II” to “ILI”
– Symbol/parameter changed from “IOH, output HIGH level leakage current”
to “ILOH, HIGH-level output leakage current
•
•
Added soldering information
Added Section 14 “Abbreviations”
PCA9515_8
(9397 750 14097)
20040929
Product data sheet
-
PCA9515_7
PCA9515_7
(9397 750 12875)
20040624
Product data sheet
-
PCA9515_6
PCA9515_6
(9397 750 12294)
20031110
Product data
853-2223 30410
dated 2003 Oct 03
PCA9515_5
PCA9515_5
(9397 750 09814)
20020513
Product data
853-2223 28185
dated 2002 May 13
PCA9515_4
PCA9515_4
(9397 750 09512)
20020301
Product data
853-2223 27802
PCA9515_3
PCA9515_3
(9397 750 08127)
20010307
Product specification
853-2223 25782
PCA9515_2
PCA9515_2
(9397 750 07852)
20001201
Product specification
853-2223 25138
PCA9515_1
PCA9515_1
(9397 750 07757)
20001113
Product specification
853-2223 25005
-
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
14 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PCA9515_9
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 09 — 23 April 2009
15 of 16
PCA9515
NXP Semiconductors
I2C-bus repeater
18. Contents
1
2
3
3.1
4
5
5.1
5.2
6
6.1
6.2
7
8
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
I2C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 4
Application design-in information . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Soldering of SMD packages . . . . . . . . . . . . . . 11
Introduction to soldering . . . . . . . . . . . . . . . . . 11
Wave and reflow soldering . . . . . . . . . . . . . . . 11
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 11
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 23 April 2009
Document identifier: PCA9515_9
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