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AN1172
Application note
ACS™
A logic-level transient-voltage protected AC switch
Introduction
Home appliances such as washing machines, refrigerators and dishwashers employ a lot of
low power loads such as valves, door lock systems, dispensers or drain pumps. Since these
loads are powered by the mains in ON / OFF mode, they were initially controlled by relays.
Recently, relays have been replaced by triacs, due to their smaller size and lower driving
energy. Nevertheless triacs don't fulfill alone the new requirements that users now need and
are used with others components.
Power switches must now be directly driven by a microcontroller unit (MCU) and must be
robust to withstand the A.C. line transients so that systems may fall into line with
electromagnetic compatibility (EMC) standards. ACSs (for Alternating Current Switches)
have been designed with this goal mind, i.e. to offer logic level and more robust
semiconductor devices.
On the other hand, ACSs have been developed adopting a functional integration approach.
They can be used directly between a MCU and the load. An external protection or a buffer
circuit are not required since these are already integrated on the die. This considerably
reduces the overall electronic board size. Moreover, the array of ACSs allows one device to
control the various loads typically required in a washer appliance.
Table 1. gives the RMS current of loads that can be controlled by ACS402-5SB4 or
ACS108-5SA/N, in ON / OFF control mode.
Table 1.
Power
Factor
(dIout/dt)c
(dVout/dt)c
Turn-off delay
(A)
(A/ms)
(V/µs)
(ms)
Door Lock
<0.3
1
0.15
0.15
<10
Lamp
<0.8
1
0.4
0.15
<20
Relay, Valve,
Dispenser,
Micromotor
<0.1
>0.7
<0.05
<2
<10
Pump
<0.2
>0.2
<0.1
<10
<10
Fan
<0.6
>0.2
<0.3
<10
<20
Load
May 2006
ACS108 and ACS402 targeted loads
I RMS
Rev 2
1/23
www.st.com
Contents
AN1172
Contents
1
2
3
4
2/23
ACS triggering mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Negative gate current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
New layout possibilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Inductive loads on/off control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Valves and relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Pumps and Fans ON / OFF control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Resistive loads on/off control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1
Inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2
Transient junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3
Light bulb flashover . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electromagnetic compatibility standards . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
IEC 61000-4-5 standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2
IEC 61000-4-4 standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AN1172
ACS triggering mode
1
ACS triggering mode
1.1
Negative gate current
The ACS silicon structure is different from the triac one. For instance, the gate embeds a
diode junction. Then the gate current can only circulate in one direction, from the COM pin
to the Gate one. A peak reverse voltage (VGM) of this junction is also defined in the ACS
data sheet.
In order to sink a current from the gate by a microcontroller output port, the supply voltage
positive terminal must be connected to the drive reference, i.e. the COM pin of ACSs (see
Figure 1.).
An interesting benefit of such a connection is that the ACS is not fired when the MCU is at
reset state. Indeed, in this case, all the MCU port pins are at high level. This means that the
gate resistors are all connected to the COM terminal. No spurious triggering can then occur.
It should be noticed that for a direct switch / MCU connection, the MCU current capability is
not the only point to check to decide if the buffer circuit can be removed. Actually, the
transistor, used to amplify the MCU current in order to control the gate, also play an
overvoltage protection role. Annex B gives the gate voltage limits between which the MCU
output port will be not stressed. It is also shown that with ACSs, the gate voltage remains
inside these limits even with worst cases of dI/dt gradients at turn-on.
Figure 1.
Gate / MCU connection
L
AC MAINS
Valve / PUMP
etc.
N
Iout
G
Com
Vg
Vdd
Vs
R
D1
M1
I
D2
M2
R
Vss
MCU
3/23
ACS triggering mode
1.2
AN1172
New layout possibilities
It has already been said that ACS silicon structure is different from the triac, according to the
gate operation. A second difference is that ACS have been developed in an integration goal.
To allow different cells to be associated in one single package or controlled by one single
drive die, the common drive reference voltage must be connected to the back of the die.
Indeed, each die bottom is electrically linked to the other ones by the frame. This is achieved
by the ACS silicon structure, where an integrated level shifter allows both thyristors to be
controlled by means of a gate voltage referenced at the back of the die (COM pin). (See
References, 1.).
Thanks to ACSs arrays, the copper tracks count is reduced since the different COM pins are
connected together inside the package. This also allows smaller gate / MCU copper tracks
loop areas, and so increases the EMI immunity of the overall electronic board. Figure 2.
shows an example of connection between an ACS402-5SB4 and an ST62xx, both in DIL20
packages.
Figure 2.
Reduction of gate / MCU loop areas
ACS402
ST6
1
Rg
OUT1
G1
OUT2
G2
OUT3
G3
OUT4
G4
PA3
PA2
PA1
PA0
COM
Vdd
1
A particular benefit of such a pin out appears with Surface Mount Devices (SMD). In this
case, the tab pin is the COM one. The copper surface used to perform a heat-sink can then
be used as a supply voltage bus. It allows new layout possibilities and, above all, a
miniaturization of the Printed Circuit Board (PCB). Indeed, unlike triacs, the heat-sink areas
are at the same voltage and so can be regrouped (see Figure 3.). The heatsink area
therefore depends on the maximum amount of dissipated power at the same time, by all the
switches put on it. So, the number of switches which will conduct at the same time and their
conduction time should be known.
Figure 3.
Printed circuit area reduction thanks to ACSs in SOT223 packages
LOAD
A1
A2
LOAD
A2
A2
G
COPPER HEATSINK
OUT
COM
Copper heatsink
MCU
Ref.
LOAD
G
MCU
Ref.
LOAD
OUT
A1
A2
COM
A2
G
G
PCB required for Triacs
4/23
PCB required for ACSs
AN1172
Inductive loads on/off control
2
Inductive loads on/off control
2.1
Valves and relays
2.1.1
Turn-off overvoltages are clamped by ACSs
Valves and relays are both electromagnetic systems. In the case of AC high voltage
operation, their windings present a high series resistance (a few kΩ) and a high series
inductance (tens of Henry). Hence, they absorb a low RMS current (typically, 10 to 50 mA).
In this case, the current rate of decrease is low and an automatic switch turn-off may result,
when its current becomes lower than the holding level (see References, 2.). There may be
an over-voltage due to the fact that there is still some current through the inductive load. The
inductive energy thus creates a back electromotive voltage which tends to force the switch to
conduct. If this over-voltage is not clamped, it can exceed the device breakdown level and
damage it.
ACSs are over-voltage self-protected. They can sustain their holding current in such an
operating mode, as shown in Figure 4.
Figure 4.
ACS voltage and current waveforms at turn-off (230 V 35 mA RMS valve)
Iout (10 mA/div)
Vout (200 V/div)
During clamping periods, the inductive energy is dissipated both in the silicon die and the
series resistance of the load. The worst case appears when the load inductance is the
highest, i.e. for electromagnet loads.
In annex C, a theoretical analysis is performed with a 0.1 power factor load and an RMS
current lower than 40 mA (value which never appears in practice where, for such RMS
currents, the power factor is always higher than 0.7). Then, it is demonstrated that, even in
this worst case scenario, the transient junction temperature remains below 160°C. And the
clamping period time (tcl) always lasts less than 1 ms. Such a thermal stress is suitable for
ACSs dies thanks to their reliable planar technology.
5/23
Inductive loads on/off control
2.1.2
AN1172
Maximum switching frequency
As far as thermal management involving clamping phases is concerned, a maximum load
commutation frequency must be defined to avoid excessive device heating. Figure 5. gives
the maximum supplementary temperature rise due to recurrent clampings, versus the ACS
switching period (see Appendix C). This value is given for a 230 V - 50 Hz mains voltage
(110 V mains is less stressing), for the worst case of load (power factor = 0.1, peak load
current = iH max) and for the maximum VCL and iH values (800 V and 60 mA respectively). In
this case, the energy absorbed by the die equals 25 mJ.
The chosen package is the TO92 one (ACS108-5SA device) because it presents the highest
Rth value, among ACS packages on offer (DIL20, TO92, SOT223, DIL8).
It can be seen that this temperature elevation can be neglected (< 4° C) as long as the
control frequency is less than one Hertz. Such a value is suitable for most appliance
applications where loads are at most controlled once per second. For that reason, in ACS
data-sheets, the maximum allowed current is given for a 1 Hertz maximum frequency 0.1
minimum load power factor. Turn-off dissipated power is then reviewed for a wide range of
application needs.
This enables us to conclude that no varistor is needed across ACSs to clamp the loads
inductive energy at turn-off, even with electromagnets which are the highest inductive loads
in Appliances.
Figure 5.
Supplementary temperature elevation due to repetitive clampings (@
clamping energy = 25 mJ, package: TO92)
40
30
∆ Trep
(° C)
Appliances
operation field
20
10
0
0
0.5
1.0
1.5
2.0
ACS switching period (T) (s)
2.2
Pumps and Fans ON / OFF control
2.2.1
Application requirements for (dI/dt)c and (dV/dt)c
There is a higher risk that a triac or an ACS will fail to turn-off when both the load current
rate of decrease and the reapplied voltage rate across the device are steep (see
References, 3.). This risk increases as the junction temperature increases. The maximum
current decreasing rate that ACS can switch off, called (dI/dt)c is defined for a maximum
reapplied voltage rate, called (dV/dt)c, and for its maximum Tj.
6/23
AN1172
Inductive loads on/off control
Pumps and Fans are, for the most part, induction or permanent magnet motors. Their series
inductance is in the range of one Henry, and their winding resistance equals a few hundred
Ohm. Their power factor is low. Hence, after switch turn-off, the reapplied voltage across it is
high and appears with a high rate of increase (as described in Equation 1 where L and cosϕ
are the inductance and power factor of the load, V the mains RMS voltage and C is the ACS
capacitance value).
Equation 1
(dV / dt) c ( V / µs ) ≅ V( V )
2 sin ϕ
10 −6
L ( H)C (F )
Figure 6. shows that the (dV/dt)c rate for an ACS402-5 die without any snubber, controlling a
230 V 220 mA pump, is lower than 10 V/µs. The measure will be similar with an ACS108-5
die because it presents the same capacitance value as an ACS402-5.
Equation 2 shows that the current rate of decrease is almost half the RMS current (0.44 ratio
for a 50 Hz mains frequency and 0.53 for 60 Hz).
Equation 2
dI / dt c ( A / ms ) ≅ 2 IRMS ( A ) 2π f(Hz ) 10 - 3
To summarize, it can be said that the worst case commutation appears with pumps or fans.
In this case, the stress that ACSs must withstand is:
Equation 3
⎧ dI / dt c ( A / ms ) ≅ 0.5 IRMS ( A )
⎨
⎩ (dV / dt ) c ≤ 10 V / µs
Figure 6.
230 V 220 mA RMS pump switch-off
Vout (50 V/div)
dV/dt = 8,7 V/µs
Iout (10 mA/div)
7/23
Inductive loads on/off control
2.2.2
AN1172
ACS asymmetrical turn-off behavior
As shown in Figure 7., ACSxxx-5 behaves differently depending on the current direction
before switch-off. This asymmetrical behavior is very lower for ACSxxx-6 and
ACS110/ACS120 devices where the (dI/dt)c parameter is quite similar for both polarities.
Figure 7.
ACS402-5 and ACS108-5 (dI/dt)c typical ability versus reapplied (dV/dt)c
rate @ Tj = 110°C
(dI/dt)c (mA/ms)
(A/ms)
800
700
600
500
Iout>0 Iout<0
400
300
2
200
100
1
0
2
4
6
(dVdt)c
8
10
12
(V/µs)
For a 200 mA RMS current pump (see case 1 in Figure 7.), the turn-off will be performed
whatever the current sign is. The maximum turn-off delay is then one half-cycle (10 ms for
50 Hz mains frequency).
On the other hand, for a 200 - 600 mA RMS pump (see case 2 in Figure 7.) and for a 110° C
junction temperature, the switch-off will only be achieved when the current reaches zero with
a negative sign. Therefore, in this case, the turn-off delay time can reach up to 20 ms for
50 Hz line frequency (Figure 8.).
Figure 8.
Turn-off delay for two different pump or fan RMS current
1
2
VOUT
IOUT
VOUT
IOUT
t
t
ig
ig
Turn-off delay
8/23
Turn-off delay
AN1172
Resistive loads on/off control
3
Resistive loads on/off control
3.1
Inrush current
In most systems, resistive loads are thermal effective. For example, light bulbs emit light
when their filament is hot enough. New types of door-lock actuators have emerged in which
the bolt move is due to a thermal expansion of a metallic part or a wax.
All these loads can be characterized by a very low resistance value in cold state.
Consequently, when the switch is turned on, there is a high inrush current. For low power
light bulbs, the inrush current lasts on average 10 ms. The worst scenario is in the case of
thermal door-locks. Figure 9. shows a typical inrush current in such loads.
Figure 9.
Inrush current in a 230 V thermal effective door-lock
Vout (200 V/div)
Iout (1 A/div)
3.2
Transient junction temperature
With such current shapes at turn-on, thermal calculation must be carried out in order to
choose the right package or heat-sink so as to avoid exceeding the maximal junction
temperature (110° C).
To perform the calculus, the current shape must be simplified. Let us work on the hypothesis
that the current average waveform of Figure 9. is similar to a 2 A peak 0.18 s time long sinus
shape.
9/23
Resistive loads on/off control
AN1172
Then, the average conduction and gate current losses in the ACS are given by the following
relationship:
Equation 4
2
Pav = rd IRMS
+ Vt 0 IRMS
2 2
+ Vgt Ig
π
Then, according to ACS108-5 or ACS402-5 specifications, we find: Pav = 1.76 W.
For a tp long dissipated power pulse, the peak junction temperature (Tj peak) is given by
Equation 5, where Tjo is the initial Tj value.
Equation 5
Tj peak = Tjo + Zth t p ⋅ Pav
Since the thermal impedance values at 0.18 s for TO92 and DIL20 packages are 22.5 and
8° C/W respectively, it can be said that the junction temperature elevation, at the end of the
inrush current period, is 40° C for a TO92 package and 14° C for a DIL20 package.
So, the maximal junction temperature before door lock switch-on should be at most 96° C for
ACS402-5SB4 (DIL20) and 70° C for ACS108-5SA (TO92), in order to keep Tj peak below
Tj max (110 °C).
For washing systems, as the door lock start may appear at the beginning of a washing cycle,
we suppose that Tjo equals at worst the maximal ambient temperature, i.e. 70° C. So, in this
respect, both ACS devices are convenient for door lock operation.
3.3
Light bulb flashover
Another point should be highlighted when driving a light bulb with a silicon switch. Indeed, at
the lamp life time end, the filament breaks itself. This results on a flashover across the gas,
included in the bulb. Then, the overall filament can be can short circuited by the flashover,
and the load current is not limited. Figure 10. gives the typical overcurrent measured when a
25 W lamp fails. This current can exceed the i².t capability of the ACS and destroy it.
Figure 10. 25 W light bulb flashover current
250 Amp !
I lamp (50A/div)
t = 500 µs/div
10/23
AN1172
Resistive loads on/off control
To avoid destroying the ACSs at each lamp flashover, a power resistor can be added in
series with the light.
This resistor (R) is rated in order to limit the ACS current to its ITSM value (10 A for a 10 ms
half sinus conduction). R is calculated as following:
Equation 6
R=
230 2
= 33 Ω
10
The power dissipated by the resistor is linked on the load RMS current, and so on the load
power (PL). Here we have :
Equation 7
P = R ⋅ PL / V
2
= 33 × 25 / 230
2
= 0.39 W
A 33 Ω 1/2 W resistor is sufficient.
Figure 11. gives the overcurrent measured with such a resistor during the flashover of a
25 W light bulb.
Figure 11. Flashover current limited by a 33 Ω 1/2 W resistor
Iout (2 A/div)
11/23
Electromagnetic compatibility standards
4
Electromagnetic compatibility standards
4.1
IEC 61000-4-5 standard
4.1.1
Standard requirements
AN1172
The IEC 61000-4-5 standard has been established to check if systems can always work
after there has been a voltage surge super-imposed to the mains. A standard voltage
waveform has been chosen which embodies typical over-voltages due to thunder or
disconnection of running inductive loads from the line.
Two kinds of surges must be applied:
1.
Line to Ground surge: in this case the maximum voltage surge is 4 kV (for aerial
power network), but the energy is absorbed by the Y2 capacitors (connected between
lines and ground) of the mains filter.
2.
Line to Neutral surge: in this case the maximum voltage surge is 2 kV (for aerial
power network, N.B: 1 kV is required for public power network) and is applied across
the power device and the load controlled by this one.
A Line to Neutral over-voltage is then:
1.
entirely absorbed by the load if the power switch is ON;
2.
entirely held by the semiconductor device if it appears while the switch is at off-state.
As the Line to Neutral surge can appear at peak mains voltage, the overall amount of
voltage can reach 2.4 kV. This will be higher than the break-down level of the silicon devices
used in appliances. Then, in order to prevent components destruction, designers use a
varistor connected across silicon devices. The overvoltage is limited below the breakdown
level of the power semiconductor and the surge energy is absorbed by the metal-oxyde
component.
4.1.2
ACS behavior during IEC 61000-4-5 test
When a surge appears when an ACS is OFF, the mains over-voltage is first clamped by the
device. But an excessive energy surge can raise the ACS current above its breakover level.
Then, the switch turns on in break over mode. Such an event is particularly stressful on the
semiconductor especially so if the current and its rate of increase are both high. The worst
case occurs for ACS driving low resistance, non inductive loads.
For example, Figure 12. and Figure 13. have been recorded with a thermal active door lock
system at low temperature. The 2 kV surge is super-imposed to the 230 V - 50 Hz mains
and synchronized with its peak value, as shown on Figure 12. Figure 13. highlights the
device turn-on in this mode. As the load was previously off, its resistance is cold and equals
150 Ω. In this case, the current rises at a rate of 100 A/µs and reaches 15 A. Such transient
surges would damage triacs, but not ACSs which are designed to turn-on in breakover
mode. No more varistor is then needed in parallel across ACSs unlike triacs. The difference
between ACS and Triac + Varistor is that, with the ACS, the load is switched on during a half
or one mains cycle. This can be accepted as such events happen a few times in the
system's life.
Reliability tests are carried out on production batches to check the ACS robustness towards
IEC 61000-4-5. A standard surge generator is used directly across a load and an ACS. The
load is a 150 Ω resistor, including a 3 µH parasitic inductance, to simulate a cold door-lock.
12/23
AN1172
Electromagnetic compatibility standards
The applied surge is fixed at +/- 2,4 kV in order to be equivalent to a 2 kV over-voltage
applied at the peak mains voltage, with the same bias.
Figure 12. 2 kV surge on the mains
(IEC 61000-4-5 test)
4.2
IEC 61000-4-4 standard
4.2.1
2.1: Standard requirements
Figure 13. ACS breakdown zoom
(IEC 61000-4-5 test)
For IEC 61000-4-4 tests, two different stressing ways are demanded. One is to apply the
bursts to the Line, Neutral or Ground through 33 nF capacitors. In this case, the bursts are
entirely absorbed by the mains filter, which is always present at the input of electronic
systems. The second IEC 61000-4-4 stressing mode is to apply the bursts through a typical
100 pF capacitor (realized by an aluminum sheet), directly to the I/O ports of the system.
The I/O port test is in fact required for systems where there are control wires, as for
computers (wires between keyboard and central unit). But appliance manufacturers apply
similar test to check if their products can withstand fast voltage transients.
The standard requires that for burst voltages up to 2 kV, the system must operate without
problem. However, triacs can then turn-on due to high dV/dt rates. In this case, a snubber
must be added to smooth these rates. Designers must then manage with the following
trade-off:
4.2.2
1.
Reduce dV/dt rates: the snubber capacitance must be high and the snubber
resistance must be low;
2.
Reduce the dI/dt rate at turn-on: the snubber capacitance must be low and the
snubber resistance must be high.
Snubber removal thanks to ACSs
I/O tests have been carried out on an electronic board including an ACS402, where the
gates are short-circuited to the COM in order to avoid parasitic turn-on due to MCU bad
operations. The system under test is embodied by this board. The I/O wires are then the
OUT pins of each ACS cell (which are connected to the loads), plus the Line and Neutral
wires. The trial diagram is shown in Figure 14.
13/23
Electromagnetic compatibility standards
AN1172
Figure 14. IEC 61000-4-4 test synopsis
IEC1000-4-4
Filter
Y2
Generator
High Voltage
Output
Test board
Mains
100 pF
COM
220Ω
ACS 402
10 cm
220 Ω
220 Ω
220 Ω
25 W light bulb
Ground Reference
10 cm
Figure 15. shows the OUT-COM voltage measured during a 2 kV IEC 61000-4-4 test (N.B.:
1 kV is required for public power network). We see that in spite of capacitive current due to
high dV/dt rates, the ACS does not turn-on. The semiconductor switch withstanding to IEC
61000-4-4 depends on its dV/dt capability. ACS devices present dV/dt characteristics ten
times greater than both same current and sensibility ratings triacs. For example, a 10 mA
maximum 0.2A igt ACS has a minimum dV/dt capability of 500 V/µs (@ Tj = 110 °C).
It can also be seen that the ACS voltage overflows its breakdown value given for a 50 Hz
sine wave (810 V is reached in spite of 650 V breakdown value). In fact, the voltage rate of
increase is so high that the silicon device has not enough time to begin to clamp. A higher
value than its VCL value can then be reached.
Figure 15. IEC 61000-4-4 test on ACS402-5 cell for a 2 kV burst
Iout (1 A/div)
Vout (250 V/div)
To sum up, it can be said that ACSs, thanks to their high dV/dt capability, improve the overall
electronic board robustness towards fast line transients without any snubber. But it must be
kept in mind that the mains filter Y2 capacitors play also a role in sustaining IEC 61000-4-4
tests, by derivating some part of the bursts energy. The typical values of these capacitors
are 2.2 nF.
14/23
AN1172
Conclusion
Conclusion
ACS retains the well-known advantages of the triac (high AC voltage blocking capability,
current bidirectionality) and adds high over-voltage robustness and the increased reliability
and compactness that appliance manufacturers now need.
Thanks to the clamping capability and robust break-over characteristics of the ACS
structure, the protection circuits that are usually connected in parallel with the triacs, are no
longer required. The varistor removal increases automatically the reliability of the electronic
board. And the snubber removal allows designers to be free with the dV/dt at off state and
dI/dt at turn-on trade-off when choosing an R-C circuit.
In addition, the triac gate-drive transistor and its associated resistors are also redundant
because ACS devices have built-in logic level drive circuits that allow the power switch to be
safely driven from any MCU output pin capable of sinking 20 mA without over-stressing the
micro-controller output.
Hence, the typical component count falls from eight with triacs, down to two with ACSs (see
Figure 16.).
The new ACS devices represent a real breakthrough in the design of power switches for
home appliances. The enhanced performance, for example their robust off-state and logic
level drive, allied to their inherent compactness will open new perspectives in the design of
compact and reliable electronic power controllers.
Figure 16. Component count reduction thanks to ACS
ACS
Vcc
MCU
Vcc
MCU
References
1.
P.Rault, "Triacs for Home Appliances: present and future", PCIM forum, Honk Kong, pp.
57-65, 1998.
2.
E.Leblanc, "Thyristors and Triacs, an Important Parameter: the Holding Current",
Application Note n°302, STMicroelectronics, February 1989.
3.
P.Rault, "Improvement in the Triac commutation", Application Note n°439,
STMicroelectronics, May 1992.
4.
SCR Manual, General Electric, 6th Edition, 1979.
15/23
ACS402 demonstration Board
Appendix A
AN1172
ACS402 demonstration Board
Figure 17. shows the electronic diagram of a demonstration board used to illustrate ACS402
/ ST6 compatibility. Note that the reset, power supply and oscillator circuits are given as
examples. Other solutions are also possible. For instance, ST6 and ST7 microcontrollers
with integrated reset circuits can be used.
The main features are:
●
VDD is connected to the Neutral;
●
VDD is the reference voltage of each ACS402 cell, which are all connected together in
the DIL20 package;
●
each ACS402 cell is driven directly from a Port A I/O pin, which can sink up to 20 mA.
Figure 17. Demonstration board diagram
F1
FUSE 2A
J2
MAINS CONNECTOR
L
D1
BRIDGE
-
N
T1
TRANSFORMER 1.5VA 230V/6V
+
VDD
+
+
VIN
GND
C1
100µF/25V
U5
ACS402
C2
100µF/16V
13
G4
VOUT
15
G3
VDD
6
OUT3
U3
TS831
VDD
2
5
6
C3
22n
7
3
4
17
G2
4
OUT2
1
TIMER
NMI
TEST
RST
OSCIN
OSCOUT
PB0/AIN
PB1/AIN
PB2/AIN
PB3/AIN
PB4/AIN
PB5/AIN
PB6/AIN
PB7/AIN
PA0
PA1
PA2
PA3
15
14
13
12
11
10
9
8
19
18
17
16
SW1
SW2
SW3
SW4
SW5
SW6
RG4
220
RG3
220
RG2
220
RG1
220
20
X1
8MHz
VDD
GND
U4
ST6220B
GND
IN OUT
C4
22n
Figure 18. Demonstration board printed circuit
16/23
J1
LOADS CONNECTOR
8
OUT4
R5
2Meg
U2
LM7905
19
G1
VDD
10
COM
2
OUT1
L
1
2
3
4
5
AN1172
ESD diode conduction due to kick-back
Appendix B
ESD diode conduction due to kick-back
An over-voltage can appear across the gate and COM (or A1 for triacs) terminals at high
turn-on di/dt rates. This effect is called the "kick-back". It is due to the high density current at
turn-on which causes high conduction voltage drop. Since the conduction begins around the
gate area, the forward voltage is in part applied to the gate.
This gate spike is clamped by the micro-controller internal electrostatic discharge (ESD)
diodes, which can be damaged if conduction lasts for too long.
In order to prevent ESD diodes conduction, their voltage must remain negative. When
considering Figure 1. at ACS turn-on, i.e. when the push transistor M1 is off and the pull
transistor M2 is on, a circulating current will never occur through D2 if the current iR remains
positive. This yields Equation B1.
Equation B1
R ⋅ iR = - VM2 + VS + Vg > 0
As M2 is conducting, its voltage drop can be neglected. Thus, the previous relation gives:
Equation B2
Vg > - VS
If D1 conducts, this means that the supply voltage is held by M2, neglecting D1 drop
voltage. This MOS transistor is thus in a linear mode. Its current equals its saturating level,
called isat.
Now, since isat current is necessarily higher than the Vs/R ratio (in order to secure the microcontroller operation), we can write the following relationship :
Equation B3
VD1 = Vg - R ⋅ isat < Vg - VS
A sufficient condition to ensure that VD1 remains below zero is that Vg remains below Vs.
This condition, plus Equation B2, gives the following safety rule for no ESD diode
conduction:
Equation B4
- VS < Vg < +VS
17/23
ESD diode conduction due to kick-back
AN1172
Figure 19. Kick-back test with ACS402
Figure 20. Kick-back test with Z0109
triac
13,5 V
Vg (5 V/div)
+5 V
+5 V
Vg (5 V/div) 1,5 V
Iout (5 A/div)-5 V
dI/dt = 65 A/µs
IA2 (5 A/div)
-5 V
dI/dt = 110 A/µs
To compare the kick-back effect of triacs and ACSs, a special test circuit has been defined.
It consists on turning on the switch with a 10nF capacitor connected directly across the A1A2 or OUT-COM terminals. The capacitor is charged at 300 V. Figure 19. and Figure 20.
show the experimental results obtained with such a testing method, for a positive bias
voltage.
A Z0109 (0.8 A IRMS 10 mA igt ST triac) doesn't fulfill with Equation B4, for VGA1 voltage
reaches 13.5 V with a 65 A/µs dI/dt rate. This is largely above the supply voltage. With the
ACS402, the maximum Vg voltage is 1.5 V, and is still within the limits of Equation B4
despite a dI/dt which is twice as big as with the Z0109.
ACS / MCU interface would then be secured even at turn-on at peak mains voltage or on a
short-circuit.
18/23
AN1172
How to calculate the junction temperature during clamping periods
Appendix C
C.1
How to calculate the junction temperature
during clamping periods
Dissipated power evaluation
It should be kept in mind that the load inductive energy is not entirely absorbed by the die at
clamping. Another part is dissipated by the Joule effect in the load resistor or absorbed by
the mains. A way to accurately evaluate the clamping energy is then to estimate the ACS
current waveform, versus the time. The energy is then calculated by integrating this
waveform and the product of the clamping voltage along the turn-off period.
Figure 21. Electric equivalent circuit at clamping
E
I
R
L
Vac
Vcl
Let us consider a typical AC load equivalent circuit shown in Figure 21. The load current
during the clamping time is given by the following relationship.
Equation C1
i( t ) =
R
Vcl + E - Vac ⎛ - L (t - t0 )
⎜e
⎜
R
⎝
R
- (t - t 0 )
⎞
1⎟⎟ + i( t 0 ) ⋅ e L
⎠
It is difficult to evaluate the influence of E in a general way. Its sign depends on its phase
towards the current and the value of the holding current. But, it can be said that the back
electromotive force has little influence for most universal and synchronous motors in which
impedances are high and E is close to zero. Furthermore, for all other loads, such as
passive loads or asynchronous motors, the b.e.m.f E is null. For this reason, let us neglect
its value. Let cosϕ be the load power factor and V the RMS mains voltage. Since the
clamping occurs near the zero crossing current, the value of the main voltage at t0, for a
positive current, is given by the relationship C.2.
Equation C2
Vac = - V 2 ⋅ 1 - cos ²ϕ
Figure 22. shows the current waveforms calculated with such an hypothesis, and assuming
that the holding current does not depend on the current rate of decrease. The junction
temperature influence on the iH and Vcl levels is also not considered. Then, i(t0), in Equation
C1, is equal to the iH value given for a 25°C junction temperature (ex: around 30 mA for an
ACS402-5 or an ACS108-5). The ACS clamping voltage is taken equal to 700 V.
Calculations are carried out for 100 mA RMS loads with different power factors, and for a
230 V 50 Hz mains voltage.
19/23
How to calculate the junction temperature during clamping periods
AN1172
Figure 22. Current waveform during clamping phase for 100mA / 230V RMS loads
50
Load current (mA)
40
IH
30
20
cos ϕ = 0.1
cos ϕ = 0.9
cos ϕ = 0.7
10
0
9
9.1
9.2
9.3
t0
9.4
9.5
9.6
tZC
Time (ms)
Considering Figure 22., we can see that the load current is always inferior to a linearly
decreasing current beginning at (iH, t0) point and ending at (0, tZC). Furthermore, the
temperature elevation due to a rectangular power pulse is always superior to the one due to
a decreasing triangular power pulse of same average value (see References, 3.).
So, a pessimistic way to calculate the junction temperature is to simplify the clamping losses
shape by a constant power pulse of Vcl.IH/2 value and tZC-t0 time long. The energy absorbed
by the die during a clamping event (ECL) depends on two ACS parameters (Vcl and IH) and
on the clamping duration:
Equation C3
E CL =
C.2
1
Vcl IH (t ZC - t 0 )
2
Transient maximum junction temperature
The clamping time is given by Equation C1, which gives way to the following one.
Equation C4
t ZC - t 0
⎤
L ⎡
R
ln⎢1 +
iH ⎥
R ⎣ Vcl + E - Vac ⎦
Neglecting the on-state dissipated power in front of clamping dissipated power, the junction
temperature rise at the end of the clamping phase is:
Equation C5
∆Tj = Zth( t ZC - t 0 ) ⋅
20/23
1
Vcl IH
2
AN1172
How to calculate the junction temperature during clamping periods
Figure 23. shows the maximum ∆Tj reached for different load RMS currents and power
factors. Calculations are similar whatever the package is (TO92, DIL20, SOT223), because
in such a range of times, the Zth is only due to the die area.
Note that ∆Tj first increases. On this curve part, the load peak current is lower than the iH
level (taken equal to its worst value: 60 mA). So, when the load RMS current increases, the
turned-off current increases too. When the load peak current becomes higher than iH, ∆Tj
decreases because of the load series inductance decrease (here the turn-off current is
constant and equals iH).
Figure 23. Supplementary temperature rise at clamping depending on load nature
(for ACS402-5SB4 or ACS108-5SX)
60
45
∆Tj (°C)
cos ϕ =0.1
cos ϕ =0.7
30
cos ϕ =0.9
15
cos ϕ =0.98
0
0.1
0.2
0.3
0.4
0.5
IRMS (A)
It can be concluded that, if the junction temperature was 110° C before turn-off, the
maximum transient temperature can reach 160° C. As these events last less than one ms
(refer to Figure 22.), such junction temperatures can be permitted.
C.3
Repetitive clampings
To evaluate heating due to repetitive clampings, Equation C6 can be used, assuming that
the clampings occur at a constant period T and that the conduction losses can be neglected
in front of the previous ones.
Equation C6
∆Trep =
⎡t - t
⎤
t - t ⎞
1
⎛
Vcl IH ⋅ ⎢ ZC 0 Rth + ⎜1 - ZC 0 ⎟ Zth(T + t ZC - t 0 ) - Zth(T ) + Zth( t ZC - t 0 )⎥
2
T ⎠
⎝
⎣ T
⎦
In practice T (above 1s) is very much higher than the clamping duration. Equation C6 can
then be simplified to the following one.
Equation C7
∆Trep =
t - t
1
Vcl IH ⋅ ZC 0 Rth
2
T
21/23
Revision history
AN1172
Revision history
Table 2.
22/23
Document revision history
Date
Revision
Changes
10-Jun-1999
1
Initial release.
11-May-2006
2
Reformatted to current standard. Figure 1., Figure 6., Figure 17., and
Figure 18. updated.
AN1172
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