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Macromodels User Manual
Preliminary
The macromodels contained in this databook operate with the Pspice and SPice simulators and with the
ELDO simulator.
For most of the macromodels enclosed, no specific precautions are required for use.
They are only valid in the supply voltage and temperature conditions defined for each macromodel.
Macromodelling
A good macromodel is a mathematical model as close as possible to the actual circuit. However, due to
simulation time problems, it must be composed of simple mathematical equations.
Placed in an assembly to perform and validate an application, it must not obstruct rapid convergence of
the system. Consequently, in order to satisfy requirements both for convergence speed and compliance
with the actual circuit, we have considered and allowed for a certain number of important parameters.
List of the parameters taken into consideration in the macromodels
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
❑
Input Offset Voltage
(generally equal to “0")
Input Bias Current
(for bipolar input stages)
Open-loop Gain
Frequency at Unity Gain
Gain Bandwidth
Gain Margin
Phase Margin
(limited to 70°C)
Positive or Negative Supply Rejection Ratio
Slew Rate ±
Settling Time at 0.1%
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Output Impedance
Output Current
Supply Current
Input Capacitance
Examples of effects not taken into consideration in the macromodels operational amplifier files
❑
❑
❑
❑
❑
❑
The input offset voltage statistic due to the great variety in each circuit
The temperature effect on the parametric values
Input offset current
Input noise current
And some specific parameters such as distorsion, crosstalk ...
Input noise voltage
March 2002
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Macromodels User Manual
Operational Amplifier Macromodel File
The file of an operational amplifier macromodel takes the form of a subcircuit (.subckt) followed by the
name of the macromodelled circuit or the name of the original family and then by the number of the pins
(1 3 2 4 5 6) with the meaning below:
❑ 1 Negative input
❑ 3 Output
❑ 2 Positive input
❑ 4 VCC+ Positive supply
❑ 5 VCC- Negative supply
❑ 6 Standby input (for specific circuit)
Further to this, we find the list of elementary components making up the macromodel.
Example:
* Input Stage
CIP 2 5 1.0 E-12
CIN 1 5 1.0 E-12 ...
etc... cf TS902 macromodel table
Followed or preceded by simple component models such as diodes and transistors.
Example:
. model MDTH D Is = 1E-8 KF = 6,657412e+01 ...
Macromodel Component
Prefix Definition
Prefix
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Example of Nodal Assignment
4
Definition
c
Capacitor
d
Diode
e
Voltage controlled by voltage source
f
Current controlled by current source
g
Voltage controlled by current source
h
Current controlled by voltage source
r
Resistor
v
Independent voltage source
I
Independent current source
VCC
Negative Input
1
3
Positive Input
2
6
5
VCC
Standby
Out
Macromodels User Manual
Schematic Example
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Macromodels User Manual
To check the relative accuracy of the subcircuit compared to the real operational amplifier we have used
the circuit configuration as you can see on the following figures.
Figure 1 : Gain on Phase versus Frequency
Figure 4 : Overshoot
R2
VCC
VCC
R1
RL
RL
VO
+V6
Vi
CL
-V5
VO
Vi
CL
V5 and V6 (around 100mV)
VCC
VCC
Figure 2 : Transfer Function and DC Output
VCC
VCC
+V2
-V1
Figure 5 : Ios+ / Ios- - Dual Supply
+10mV
RL
Vi
Vi
I OS
-10mV
VO
V1 and V2 (mV)
CL
VCC
VCC
Figure 3 : Slew Rate
VCC
RL
VO
+V4
Vi
CL
-V3
V3 and V4 (V)
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VCC
Macromodels User Manual
Figure 5 bis : Single Supply
VCC
VCC
VCC
I source
ε<0
ε>0
I sink
Figure 6 : Input Noise Voltage
5kΩ
VCC
50Ω
VO
VCC
Example: TS902
ELECTRICAL CHARACTERISTICS
VCC+ = 5V, V CC- = 0V, RL, C L connected to VCC/2, Standby OFF, Tamb = 25°C (unless otherwise specified)
Symbol
Conditions
Vio
Value
Unit
0
mV
Avd
RL = 10kΩ
30
V/mV
ICC
No load, per operator
230
µA
Vicm
-0.2 to 5.2
V
VOH
RL = 10kΩ
4.95
V
VOL
RL = 10kΩ
50
mV
mA
Isink
VO = 10V
60
Isource
VO = 0V
60
mA
GBP
RL = 10kΩ, CL = 100pF
0.8
MHz
SR
RL = 10kΩ, CL = 100pF
0.8
V/µs
φm
RL = 10kΩ, CL = 100pF
30
Degrees
VSTBY = 0V
500
nA
ICC STBY
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Macromodels User Manual
The macromodel file must end with
.ENDS
For each macromodel we give a table in which we define the conditions in which the models have been
validated as well as the main validation results.
Comparator Macromodel File
The file of a comparator macromodel takes the form of a subcircuit (.subckt) followed by the name of the
macromodelled circuit or the name of the original family.
This is followed by the number of the pins (1 3 2 4 5) with the meaning below :
❑ 1 Negative Input
❑ 3 Output
❑ 2 Positive Input
❑ 4 VCC+ Positive supply
❑ 5 VCC- Negative supply
Further to this, we find the list of elementary components making up the macromodel.
Example:
* Input Stage
CIP 2 5 1.0 E-12
Schematic Example
VNUL
OUT
FCN
FCP
VIP
VOP
RG1
DINR
CPS
DOP
RIP
V+
FIBP
EIP
DIP
RIN
RIS
EIN
DIN
VOFP
RBOUT
VFIBN
DSTOP
VOFN
DON
CIN
IPOL
REOUT
FIN
DINN
CIP
RCEOUT
EOUT
FIP
RG2
VON
RSOUT
HSTOP
VIN
VSTOP
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Macromodels User Manual
To check the relative accuracy of the subcircuit compared to the real comparator we have used the circuit
configuration as you can see in the following figures.
Figure 1 : Input Bias and Supply Current
Configuration
Figure 4 : Response Time in Overdrive
VCC
VCC
RL
Vi
Vi =
VO
VO
VCC
Vi
VCC + VCC
CL
t
2
-100mV
VCC
overdrive
VCC
Figure 2 : Maximum ISINK Current and ISOURCE
Current when the Output is at a High
Level
Figure 4 bis : Response Time in TTL
VCC
+2V
VCC
VCC + VCC
-2V
2
RL
1.4V
I
VO
VCC + VCC
VO
2
VCC
Vi
3V
CL
VCC
VCC
Figure 3 : Low Level Output Voltage
VCC
VO
VID = +1V
VCC + VCC
I OL
VCC
VOL
2
VCC
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Macromodels User Manual
GLOSSARY
INPUT BIAS CURRENT
The difference between input and output currents.
Note: This is sometimes referred to as quiescent current.
COMMON-MODE INPUT VOLTAGE: (Vic)
The average of the two input voltage.
COMMON-MODE INPUT VOLTAGE RANGE: (Vicm)
The range of the common-mode input voltage where the amplifier works as well as possible.
COMMON-MODE REJECTION RATIO: (CMR)
The ratio of differential amplification to common-mode voltage amplification.
Note: this is measured by determining the ratio of the specified range of input common-mode voltage
to the variation of the input offset voltage.
DIFFERENTIAL INPUT RESISTANCE: (rid)
The small-signal resistance between the two ungrounded input terminals.
CROSSTALK ALTERATION: (VO1/VO2)
The ratio of the change in output voltage of a driver channel to the resulting change in output voltage of
another channel.
DIFFERENTIAL INPUT VOLTAGE: (Vid)
The difference of the voltage between the non-inverting input and the inverting input.
DIFFERENTIAL INPUT VOLTAGE RANGE: (Vid)
The range of voltage between the two input terminals than we can put without damage for the circuit.
DIFFERENTIAL VOLTAGE AMPLIFICATION: (Avd)
The ratio of the change in output voltage to the change in differential input voltage producing it.
DYNAMIC IMPEDANCE: (ZKA)
The quotient of a change in voltage across the voltage reference and the corresponding change in current
through the voltage reference when it is biased for regulation.
EQUIVALENT INPUT NOISE CURRENT: (In)
The current of an ideal current source (having an internal impedance equal to zero) in series with the input
terminals of the circuit that represents the part of the internally generated noise that can properly be represented by a current source.
EQUIVALENT INPUT NOISE VOLTAGE: (en)
The voltage of an ideal voltage source (having an internal impedance equal to zero) in series with the input terminals of the circuit that represents the part of the internally generated noise that can properly be
represented by a voltage source).
GAIN MARGIN: (Am)
The reciprocal of the open-loop voltage amplification at the lowest frequency at which the open-loop
phase shift is such that the output is in phase with the inverting-input.
HIGH LEVEL OUTPUT CURRENT: (IOH)
The current into an output with input condition applied that, according to the product specification, will establish a high level at the output.
HIGH LEVEL OUTPUT VOLTAGE: (VOH)
The voltage at an output with input condition applied that according to the product specification will establish a high level at the output.
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INPUT BIAS CURRENT: (Iib)
The average of the currents into the two input terminals with the output at 0V.
INPUT CAPACITANCE: (Ci)
The capacitance between the input terminals with either input grounded.
INPUT OFFSET CURRENT: (Iio)
The difference between the currents into the two input terminals with the output at 0V.
INPUT OFFSET VOLTAGE: (Vio)
the DC voltage that must be applied between the input terminals to force the quiescent DC output voltage
to zero or other level, if specified.
INPUT RESISTANCE: (ri)
The resistance between the input terminals with either input grounded.
INPUT VOLTAGE RANGE: (Vi)
The range of voltage than we can apply to the input without damaging for the device.
LARGE SIGNAL VOLTAGE AMPLIFICATION: (AV)
The ratio of the peak to peak output voltage surving to the change in input voltage required to drive the
output.
LOW LEVEL OUTPUT CURRENT: (IOL)
The current into an output with input conditions applied that according to the product specification will establish a low level at the output.
MAXIMUM PEAK TO PEAK OUTPUT VOLTAGE SWING: (VOPP)
The maximum peak to peak output voltage that can be obtained without waveform clipping when the quiescent DC output voltage is zero.
OUTPUT IMPEDANCE: (Zo)
The small signal impedance between the output terminal and ground.
OUTPUT RESISTANCE: (ro)
The resistance between the output terminal and ground.
PHASE MARGIN: (φm)
The absolute value of the open-loop phase shift between the output and the inverting input at the frequency at which the modulus of the open-loop amplification is unity.
RESPONSE TIME
The interval between the application of an input step function and the instant the output crosses the logic
threshold voltage.
RISE TIME: (tr)
The time required for an output voltage step to change from 10% to 90% of its final value.
SHORT-CIRCUIT OUTPUT CURRENT: (Ios)
The maximum output current available from the amplifier with the output shorted to ground, to either supply, or to specified point.
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SLEW-RATE: (SR)
The average time rate of change of the closed-loop amplifier output voltage for a step signal input.
STANDBY CURRENT: (Istb)
The current flowing through the standby terminal when it is on.
SUPPLY CURRENT : (ICC)
The current into the VCC+ or VCC- terminal of our integrated circuit.
SUPPLY VOLTAGE REJECTION RATIO: (SVR) (∆VCC / ∆Vio )
The absolute value of the ratio of the change in supply voltage ot the change in input offset voltage.
TOTAL POWER DISSIPATION: (PD)
The total DC power supplied to the device less any power delivered from the device to a load.
SETTLING TIME
The time between a step function change of the input signal level and the instant at which the magnitude
of the output signal reaches for the last time a specified level range (± Σ) containing the final output signal
level.
UNITY GAIN BANDWIDTH
The range of frequencies within which the open-loop voltage amplification is operated than unity.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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