ANP007

ANP007
Application Note
AP2001 Dual Buck Converter
Contents
1.
AP2001 Specifications
1.1 Features
1.2 General Description
1.3 Pin Assignments
1.4 Pin Descriptions
1.5 Block Diagram
1.6 Absolute Maximum Ratings
2.
Hardware
2.1
2.2
2.3
2.4
2.5
2.6
3.
Introduction
Typical Application
Input / Output Connections
Schematic
Board of Materials
Board Layout
Design Procedure
3.1 Introduction
3.2 Operating Specifications
3.3 Design Procedures
3.3.1
Selection of the Buck Inductor (L)
3.3.2
Selection of the Output Capacitor (Cout)
3.3.3
Selection of Power Switch (MOSFET)
3.3.4
Selection of Power Rectifier (D)
3.3.5
Selection of the Input Capacitor (Cin)
4.
Voltage Monitor by AP434
This application note contains new product information. Diodes, Inc. reserves the rights to modify the product specification without notice. No liability is
assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
1/12
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ANP007
Application Note
AP2001 Dual Buck Converter
1.
AP2001 Specifications
1.1 Features
- Dual PWM Control Circuitry
- Operating Voltage can be up to 50V
- Adjustable Dead Time Control (DTC)
- Under Voltage Lockout (UVLO) Protection
- Short Circuit Protection (SCP)
- Variable Oscillator Frequency...... 500Khz Max.
- 2.5V Voltage Reference Output
- 16-pin PDIP and SOP Packages
1.2 General Description
The AP2001 integrates Pulse-Width-Modulation (PWM) control circuit into a single chip, mainly designed
for power-supply regulator. All the functions include an on-chip 2.5V reference output, two error amplifiers, an
adjustable oscillator, two dead-time comparators, UVLO, SCP, DTC circuitry, and dual common-emitter (CE)
output transistor circuits. Recommend the output CE transistors as pre-driver for driving externally. The DTC
can provide from 0% to 100%. Switching frequency can be adjustable by trimming RT and CT. During low
VCC situation, the UVLO makes sure that the outputs are off until the internal circuit is operating normally.
1.3 Pin Assignments
( Top View )
CT
1
16
RT
EA1+
EA1FB1
2
15
3
14
4
13
5
12
DTC1
OUT1
GND
6
11
7
10
8
9
REF
SCP
EA2+
EA2FB2
DTC2
OUT2
VCC
PDIP/SOP
2/12
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AP2001 Dual Buck Converter
1.4 Pin Descriptions
Name
Description
CT
Timing Capacitor
RT
Timing Resistor
EA+
Error Amplifier Input (+)
EA -
Error Amplifier Input (-)
FB
Feedback Loop Compensation
DTC
Dead Time Control
OUT
Pre-driver Output
GND
Ground
VCC
Supply Voltage
SCP
Short Circuit Protection
REF
Voltage Reference
1.5 Block Diagram
V CC
SCP
RT
Bandgap
Reference
REF
CT
DTC1
Oscillator
MAX.500KH
z
+
+
-
EA1 +
EA1 -
OUT1
VREF
Error Amplifier 1
PWM Amplifier 1
170K
FB1
1.18V
UVLO
+
+
R
R
S
EA2+
+
+
EA2 Error Amplifier 2
OUT2
PWM Amplifier 2
FB2
GND
DTC2
3/12
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AP2001 Dual Buck Converter
1.6 Absolute Maximum Ratings
Symbol
Rating
Unit
Supply Voltage
40
V
VI
Amplifier Input Voltage
20
V
VO
Collector Output Voltage
40
V
Io
Collector Output Current
21
mA
VCC
TOP
TST
TLEAD
Parameter
Operating Temperature Range
Storage Temperature Range
Lead Temperature 1.6 mm (1/16 inch) from Case for 10
Seconds
-20 to +85
o
-65 to +150
o
260
o
C
C
C
2. Hardware
2.1 Introduction
The dual-buck demo board supply two constant dc output voltages that are 3.3V and 5V. This board can
supply output power up to 15W for buck1 output (5V / 3A) and up to 10W for buck2 output (3.3V / 3A). Using
a dc input voltage of 10.8 V to 13.2 V, full load efficiency is up to 86 percent. This type of converter converts
an unregulated input voltage to two regulated output voltages that are always lower than the input voltage.
The control method used in the board is a fixed frequency, variable on-time pulse-width-modulation (PWM).
The feedback method used is voltage-mode control. Other features of the board include undervoltage lockout
(UVLO), short-circuit protection (SCP), and adjustable dead time control (DTC).
4/12
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AP2001 Dual Buck Converter
2.2 Typical Application
The AP2001 may operate in either the CCM (Continuous Conduction Mode) or the DCM (Discontinuous
Conduction Mode). The following applications are designed for CCM (Continuous Conduction Mode)
operation. That is, the inductor current is not allowed to fall to zero. To compare the disadvantage and
advantage for CCM and DCM, the main disadvantage of CCM is the inherent stability problems (caused by
the right-half-plane zero and the double pole in the small-signal control to output voltage transfer function).
However, the main disadvantage of DCM that peak currents of switch and diode are larger than CCM when
converting. Using power switch and output diode with larger current and power dissipation ratings should
solve this issue of large peak current. The designer has to use larger output capacitors, and take more effort
on EMI/RFI solution also. The designer could make a choice for each mode. For a low loading current, DCM
is preferred for buck. If the load current requirement is high, CCM is preferred for buck. Figure 1 shows the
basic buck topology. When the switch SW is turned on, energy is stored in the inductor L and it has constant
voltage “VL = VI – VO”. The inductor current iL ramps up at a slope determined by the input voltage. Diode D is
off during this period. Once the switch, SW, turns off, diode D starts to conduct and the energy stored in the
inductor is released to the load. The current in the inductor ramps down at a slope determined by the
difference between the input and output voltages.
iS
VS
SW
Vi
L
iD
VD
IO
VL
iL
iC
C
D
RL
VO
Figure 1. Typical Buck Converter Topology
5/12
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AP2001 Dual Buck Converter
2.3 Input / Output Connections
Vin = 12V (10.8 ~ 13.2V)
VO1 = 5V / 3A
VO2 = 3.3V /
3A
Figure 3. I/O Connections
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AP2001 Dual Buck Converter
2.4 Schematic
Figure 4. 2_Buck Demo Board Schematic
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AP2001 Dual Buck Converter
2.5 Board of Materials
No
Value
Qty
Part
Reference
Description
1 Open
2 1uF
1
10
3 10nF
2
C1 C5
C2 C6 C7
C10 C11 C12
C13 C14 C15
C16
C3 C4
4 1uF
1
C8
5 470pF
1
C9
6 B340
7 470uF
2
3
8 CON2
9 33uH/3A
3
1
D1 D2
EC1 EC2
EC3
J1 J2 J3
L1 L2
2P PCB Terminal Block
TOROID COILS 33uH 3A
10 PMOS_SOP8 2
Q1 Q4
P-Channel MOSFET -30V -3A↑
11 MMBT4401
2
Q3 Q6
NPN BJT 40V 0.6A SOT-23
12 MMBT4403
2
Q2 Q5
PNP BJT -40V -0.6A SOT-23
13 470
1
R1
Chip Resistance 470 1/8W ±10% J 0805
14 47K
2
R2 R11
Chip Resistance 47K 1/8W ±10% J 0805
15 0
4
Chip Resistance 0 1/8W ±10% J 0805
16 15K
1
R3 R4 R13
R14
R5
17 4.7K
5
18 33K
4
Chip Resistance 4.7K 1/8W ±10% J
0805
Chip Resistance 33K 1/8W ±10% J 0805
19 8.2K
1
R6 R9 R10
R12 R18
R7 R8 R16
R17
R15
20 5.6K
1
R19
21 TBD
1
R20
Chip Resistance 8.2K 1/8W ±10% J
0805
Chip Resistance 5.6K 1/8W ±10% J
0805
To be Defined (5K ~ 50K)
22 200K
1
R21
Chip Resistance 22K 1/8W ±10% J 0805
23 AP2001
1
U1
Monolithic Dual Channel PWM Controller
Manufactu
rers
Don't Install
Ceramic Chip CAP. 1uF 25V ±10% K
X7R 0805
Philips
Philips
Ceramic Chip CAP. 10nF 25V ±10% K
X7R 0805
Ceramic Chip CAP. 1uF 25V ±10% K
X7R 0805
Ceramic Chip CAP. 470pF 25V ±10% K
X7R 0805
Schottky Diode 3A 40V
Electrolysis Capacitors
Philips
Chip Resistance 15K 1/8W ±10% J 0805
Part
Number
Philips
Philips
DIODES
B340A
DINKLE
Star
Electronics
CET
APEC
ROHM
DIODES
ROHM
DIODES
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Yageo (RL
Series)
Anachip
ELK508V-02P
CEM4435
AP4435M
SST2222A
MMBT4401
SST2907A
MMBT4403
AP2001S
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AP2001 Dual Buck Converter
2.6 Board Layout
Board size is 80mm(W) x 50mm(L)
Figure 5. Silkscreen layer
Figure 6. Top layer
Figure 7. Bottom layer
9/12
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Application Note
AP2001 Dual Buck Converter
3. Design Procedure
3.1 Introduction
The AP2001 integrated circuit is a dual PWM controller. It operates over a wide input voltage
range. This, together with its low cost, makes it a very popular choice for use in a PWM controller. This
section will describe the AP2001 to design procedure. The operation and the design of the dual-buck
converter will also be discussed in detail.
3.2 Operating Specifications
Specification
Min
Typ
Max
Units
Input Voltage Range
10.8
12
13.2
V
Output Buck1 Voltage Range
5
V
Output Buck2 Voltage Range
3.3
V
Output Current (Buck1) Range
0.3
3
A
Output Current (Buck2) Range
0.3
3
A
Operating Frequency
180
200
Output Ripple
220
50
Efficiency
KHz
mV
86
%
Table 1. Operating Specifications
3.3 Design Procedures
This section describes the steps to design a continuous-mode buck and boost converter, and
explains how to construct basic power conversion circuits including the design of the control chip
functions and the basic loop. A switching frequency of 200 kHz was chosen.
Example calculations accompany the design equations. Since this is a fixed output converter, all
example calculations apply to the converter when output voltage is 3.3V/5V and input voltage set to 12 V,
unless specified otherwise. The first quantity to be determined is the converter to the duty cycle value.
Duty ratio D =
Vo + Vd
Vin –
Vds(sat)
=
Ton
Ts
, 0≤D≤1
Assuming the commutating diode forward voltage Vd = 0.5 V and the power switch on voltage
Vds(sat) = 0.1V, the duty cycle for Vo = 3.3V and Vin = 10.8, 12, 13.2 is 0.36, 0.32, 0.29 respectively; the
duty cycle for Vo = 5V and Vin = 10.8, 12, 13.2 is 0.51, 0.46 ,0.42 respectively.
10/12
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3.3.1
Selection of the Buck Inductor (L)
A buck converter uses a single-stage LC filter. Choose an inductor to maintain continuous-mode
operation down to 10 percent (Io(min)) of the rated output load:
ΔIL = 2 x 10% x Io = 2 x 0.1 x 3 = 0.6A (For 5V and 3.3V)
The inductor “L” value is:
L≥
(Vin - Vds(sat) – Vo) x Dmin
ΔIL x fs
=
L≥
(Vin - Vds(sat) – Vo) x Dmin
ΔIL x fs
=
(13.2 – 0.1 – 3.3) x 0.29
0.6 x (200 x 10^3)
(13.2 – 0.1 – 5) x 0.42
0.6 x (200 x 10^3)
= 23.7μH For 3.3V
= 28.4μH For 5V
So we can choose 33μH for output voltage “3.3V” and “5V”.
3.3.2 Selection of the Output Capacitor (Cout)
Assuming that all of the inductor ripple current flows through the capacitor and the effective series
resistance (ESR) is zero, the capacitance needed is:
Cout ≤
ΔIL
8 x fs x ΔVo
=
0.6
8 x (200 x 10^3) x 0.05
= 7.5μF
Assuming the capacitance is very large, the ESR needed to limit the ripple to 50 mV is:
ESR ≤
ΔVo
=
ΔIo
0.05
0.6
= 0.083Ω
The output filter capacitor should be rated at least ten times the calculated capacitance and 30–50
percent lower than the calculated ESR. This design used a 470μF/25V OS-Con capacitor in parallel with
a ceramic to reduce ESR.
3.3.3
Selection of the Power Switch (MOSFET)
Based on the preliminary estimate, RDS(on) should be less than 0.10 V ÷ 3A = 33mΩ. The
CEM4435 (CET) is a -30V p-channel MOSFET with RDS(on) = 35mΩ. Power dissipation (conduction +
switching losses) can be estimated as:
PMOSFET = Io^2 x Rds(on) x Dmax + [0.5 x Vin x Io x (tr + tf) x fs]
Assuming total switching time (tr + tf) is 150 ns, a 55°C maximum ambient temperature, and
thermal impedance RθJA = 50°C/W, thus:
PMOSFET = (3 x 3 x 0.035 x 0.36) + [0.5 x 12 x 3 x (0.15 x 10^(-6)) x (200 x 10^3) = 0.65W
TJ = TA+ (RθJA x PMOSFET) = 55 + (50 x 0.65) = 87.5°C……………………………………(For 3.3V)
PMOSFET = (3 x 3 x 0.035 x 0.51) + [0.5 x 12 x 3 x (0.15 x 10^(-6)) x (200 x 10^3) = 0.7W
TJ = TA+ (RθJA x PMOSFET) = 55 + (50 x 0.7) = 90°C…………………………………………(For 5V)
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3.3.4
Selection of the Rectifier (D)
The catch rectifier conducts during the time interval when the MOSFET is off. The B340 (DIODES)
is a 3A, 40V Schottky Rectifier in an SMC power surface-mount package. The power dissipation is:
PD = Io x Vd x (1 – Dmin) = 3 x 0.5 x (1 – 0.29) = 1.065W…………………………………(For 3.3V)
PD = Io x Vd x (1 – Dmin) = 3 x 0.5 x (1 – 0.42) = 0.87W…………………………………..(For 5V)
Assuming a 55°C maximum ambient temperature, and thermal impedance RθJA = 15°C/W , thus:
TJ = TA+ (RθJA x PD) = 55 + (15 x 1.065) = 70.975°C…………………………………….. (For 3.3V)
TJ = TA+ (RθJA x PD) = 55 + (15 x 0.87) = 68.05°C……………………………………….. (For 5V)
3.3.5
Selection of the Input Capacitor (Cin)
The RMS current rating of the input capacitor can be calculated from the following formula. The
capacitor manufacturers data sheet must be checked to assure that this current rating is not exceeded.
Iin(rms) = 2√[D x (Io(max) + Io(min)) x (Io(max) - Io(min)) + (ΔIL^2)/3] = √[0.36 x (3 + 0.3) x (3 – 0.3) +
0.36/3] = 2 x 1.8A = 3.6A
This capacitor should be located close to the IC using short leads and the voltage rating should be
approximately two times the maximum input voltage. We select input capacitor value “470uF/25V”.
4.
Voltage Monitor by AP434
In some applications, the output voltage is concerned to be too high to damage the IC. To avoid the
IC being damaged, comparing output voltage with a reference could monitor the output voltage. AP434
is a monolithic IC that includes one independent OP-Amp and another OP-Amp, which the non-inverting
input is wired to a fixed voltage reference. AP434 data sheet provides the low cost and space saving of
voltage monitoring function.
Written by Cheng-Yu Chen (陳政佑)
12/12
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