T1180P6 Datasheet

T1180P6
www.vishay.com
Vishay Semiconductors
Silicon PIN Photodiode
FEATURES
• Package type: chip
• Package form: single chip
• Dimensions (L x W x H in mm): 0.67 x 0.3 x 0.28
• Radiant sensitive area (in mm2): 0.055
• Peak sensitivity wavelength: 810 nm
• High photo sensitivity
• Suitable for visible light and near infrared
radiation
A
• Fast response times
• Angle of half sensitivity: ϕ = ± 60°
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
T1180P6 is a high speed and high sensitive PIN photodiode
chip with 0.055 mm2 sensitive area detecting visible and
near infrared radiation. Anode is the bond pad on top.
APPLICATIONS
• High speed photo detector
GENERAL INFORMATION
The datasheet is based on Vishay optoelectronics sample testing under certain predetermined and assumed conditions, and is
provided for illustration purpose only. Customers are encouraged to perform testing in actual proposed packaged and used
conditions. Vishay optoelectronics die products are tested using Vishay optoelectronics based quality assurance procedures
and are manufactured using Vishay optoelectronics established processes. Estimates such as those described and set forth in
this datasheet for semiconductor die will vary depending on a number of packaging, handling, use, and other factors. Therefore
sold die may not perform on an equivalent basis to standard package products.
PRODUCT SUMMARY
Ira (μA)
ϕ (deg)
λ0.5 (nm)
0.59
± 60
590 to 1010
PACKAGING
REMARKS
PACKAGE FORM
Wafer sawn on foil with disco frame
MOQ: 330 000 pcs
Chip
COMPONENT
T1180P6
Note
• Test conditions see table “Basic Characteristics”
ORDERING INFORMATION
ORDERING CODE
T1180P6-SD-F
Note
• MOQ: minimum order quantity
ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
SYMBOL
VALUE
Reverse voltage
VR
60
V
Junction temperature
Tj
100
°C
Operating temperature range
Tamb
-40 to +100
°C
Storage temperature range
Tstg1
-40 to +100
°C
Storage temperature range on foil
Tstg2
-40 to +50
°C
Rev. 1.2, 07-Dec-15
TEST CONDITION
UNIT
Document Number: 84246
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
T1180P6
www.vishay.com
Vishay Semiconductors
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
TYP.
MAX.
UNIT
Breakdown voltage
IR = 100 μA, E = 0
V(BR)
60
-
-
V
Reverse dark current
Diode capacitance
Reverse light current
VR = 10 V, E = 0
Iro
-
<1
3
nA
VR = 0 V, f = 1 MHz, E = 0
CD
-
1.7
-
pF
VR = 3 V, f = 1 MHz, E = 0
CD
-
1.1
-
pF
Ee = 1 mW/cm2, λ = 890 nm, VR = 5 V
Ira
-
0.67
-
μA
Ee = 1 mW/cm2, λ = 950 nm, VR = 5 V
Ira
-
0.59
-
μA
ϕ
-
± 60
-
deg
Angle of half sensitivity
Wavelength of peak sensitivity
Range of spectral bandwidth
Rise time
VR = 5 V, RL = 1 kΩ, λ = 830 nm
Fall time
Rise time
VR = 5 V, RL = 1 kΩ, λ = 950 nm
Fall time
λp
-
810
-
nm
λ0.5
-
590 to 1010
-
nm
tr
-
530
-
ns
tf
-
170
-
ns
tr
-
1480
-
ns
tf
-
590
-
ns
Note
• The measurements are based on samples of die which are mounted on a TO18-header without resin coating
BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
f = 1 MHz
1.6
Cp - Capacitance (pF)
S(λ)rel - Relative Spectral Sensitivity
1.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.1
1
10
100
VR - Reverse Voltage (V)
Fig. 1 - Diode Capacitance vs. Reverse Voltage
Rev. 1.2, 07-Dec-15
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
400
500
600
700
800
900 1000 1100
λ - Wavelength (nm)
Fig. 2 - Relative Spectral Sensitivity vs.
Wavelength without Resin Coating
Document Number: 84246
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
T1180P6
www.vishay.com
Vishay Semiconductors
DIMENSIONS in millimeters
0.13
Orientation of
wafer flat
Technical drawings
according to DIN
specification.
Sensitive area
0.5
*(0.67)
Dimensions in mm
Not indicated tolerances ± 0.005
Opt. active area: 0.055 mm2
Metallization
0.15
Bonding restricted to this area
in order to avoid damage
of adjacent structures
0.1
0.08
Bonding area: 80 μm x 80 μm
Thickness: 280 μm ± 15 μm
Bonding area
Drawing-No.: 9.000-5117.01-4
Issue: 4; 23.10.2013
0.08
0.1
*(0.3)
* only for information:
dimension of sawn die under consideration of 30 μm saw kerf
MECHANICAL DIMENSIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Length of chip edge (x-direction)
PARAMETER
Lx
-
0.3
-
mm
Length of chip edge (y-direction)
Ly
-
0.67
-
Sensitive area
AS
mm
mm2
0.055
Wafer diameter
D
-
150
-
mm
Die height
H
0.265
0.28
0.295
mm
-
0.08 x 0.08
-
mm2
Bond pad anode
Rev. 1.2, 07-Dec-15
Document Number: 84246
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
T1180P6
www.vishay.com
Vishay Semiconductors
ADDITIONAL INFORMATION
Frontside metallization, anode
Backside metallization, cathode
Dicing
Die bonding technology
AlSi
NiV-Ag
Sawing
Epoxy bonding
Note
• All chips are checked in accordance with the Vishay Semiconductor, specification of visual inspection FVOV6870.
The visual inspection shall be made in accordance with the “specification of visual inspection as referenced”. The visual inspection of chip
backside is performed with stereo microscope with incident light and 40x to 80x magnification.
The quality inspection (final visual inspection) is performed by production. An additional visual inspection step as special release procedure
by QM is not installed.
HANDLING AND STORAGE CONDITIONS
• The hermetically sealed shipment lots shall be opened in temperature and moisture controlled cleanroom environment only.
It is mandatory to follow the rules for disposition of material that can be hazardous for humans and environment.
• Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as
defined in MIL-HDBK-263.
• Singulated die are not to be handled with tweezers. A vacuum wand with non metallic ESD protected tip should be used.
PACKING
Chips are fixed on adhesive foil. Upon request the foils can be mounted on plastic frame or disco frame. For shipment, the
wafers are arranged to stacks and hermetically sealed in plastic bags to ensure protection against environmental influence
(humidity and contamination).
Use for recycling reliable operators only. We can help getting in touch with your nearest sales office. By agreement we will take
back packing material, if it is sorted. You will have to bear the costs of transport. We will invoice you for any costs incurred for
packing material that is returned unsorted or which we are not obliged to accept.
Rev. 1.2, 07-Dec-15
Document Number: 84246
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Revision: 02-Oct-12
1
Document Number: 91000