EFM32HG110 Rev. B Errata

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EFM32HG110 Errata, Chip Rev. B
F64/F32
This document describes errata for the latest revision of EFM32HG110 devices.
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1 Errata
This document contains information on the errata of the latest revision of this device. For errata on older revisions, please refer to the errata history for the
device. The device data sheet explains how to identify chip revisions, either from package markings or electronically.
In addition to the errata noted below, the errata for the ARM Cortex-M0+ r0p1 (www.arm.com) also applies to this device.
1.1 Chip revision B
Table 1.1. Erratas
ID
Title/Problem
Effect
Fix/Workaround
IDAC_E101
IDAC output current degradation
Due to an undefined shut-down state of the IDAC, powered
devices that do not use the IDAC continuously might experience some degradation in the current output over the lifetime
of the device. The degradation is very small when the device
is used at room temperature, but the output current will fall
well outside specs if the device is exposed to higher temperatures for longer periods of time.
If the IDAC output current stability is crucial to the application, the IDAC should never be completely disabled while the
device is powered. Leaving the IDAC enabled in the lowest
output code setting with duty-cycling enabled consumes ~50
nA extra current and eliminates the problem.
The PCNT Pulse Width Filter does not work as intended.
Do not use the pulse width filter, i.e. ensure FILT = 0 in
PCNTn_CTRL.
The current output of the IDAC might
degrade over time.
PCNT_E102
PCNT Pulse Width Filtering does
not work
1.2 Older Revisions
Erratas for older revisions can be found at the Silicon Laboratories homepage:
www.silabs.com/32bit-errata
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2 Revision History
2.1 Revision 1.00
January 6th, 2016
Moved to revision B.
Removed preliminary.
2.2 Revision 0.93
October 5th, 2015
Added RMU_E101.
2.3 Revision 0.92
May 11th, 2015
Added PKG_E101.
2.4 Revision 0.91
May 1st, 2015
2.5 Revision 0.90
March 16th, 2015
2.6 Revision 0.01
November 20th, 2014
Initial preliminary release.
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A Disclaimer and Trademarks
A.1 Disclaimer
Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system
and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory
sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples
described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product
information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon
Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright
licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific
written consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails,
can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications.
Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or
chemical weapons, or missiles capable of delivering such weapons.
A.2 Trademark Information
Silicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS®, EFM, EFM32, EFR, Energy Micro, Energy Micro
logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZMac®, EZRadio®, EZRadioPRO®, DSPLL®,
ISOmodem®, Precision32®, ProSLIC®, SiPHY®, USBXpress® and others are trademarks or registered trademarks of Silicon Laboratories Inc. ARM,
CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other
products or brand names mentioned herein are trademarks of their respective holders.
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B Contact Information
Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701
Please visit the Silicon Labs Technical Support web page:
http://www.silabs.com/support/pages/contacttechnicalsupport.aspx
and register to submit a technical support request.
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Table of Contents
1. Errata .......................................................................................................................................................................................................................................
1.1. Chip revision B .................................................................................................................................................................................................................
1.2. Older Revisions ................................................................................................................................................................................................................
2. Revision History ..........................................................................................................................................................................................................................
2.1. Revision 1.00 ...................................................................................................................................................................................................................
2.2. Revision 0.93 ...................................................................................................................................................................................................................
2.3. Revision 0.92 ...................................................................................................................................................................................................................
2.4. Revision 0.91 ...................................................................................................................................................................................................................
2.5. Revision 0.90 ...................................................................................................................................................................................................................
2.6. Revision 0.01 ...................................................................................................................................................................................................................
A. Disclaimer and Trademarks ..........................................................................................................................................................................................................
A.1. Disclaimer .......................................................................................................................................................................................................................
A.2. Trademark Information .......................................................................................................................................................................................................
B. Contact Information .....................................................................................................................................................................................................................
B.1. .....................................................................................................................................................................................................................................
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List of Tables
1.1. Erratas .................................................................................................................................................................................................................................... 2
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