LT3011 - 50mA, 3V to 80V Low Dropout Micropower Linear Regulator with PWRGD

LT3011
50mA, 3V to 80V Low
Dropout Micropower Linear
Regulator with PWRGD
DESCRIPTION
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
n
n
Wide Input Voltage Range: 3V to 80V
Low Quiescent Current: 46μA
Low Dropout Voltage: 300mV
Output Current: 50mA
PWRGD Flag with Programmable Delay
No Protection Diodes Needed
Adjustable Output from 1.24V to 60V
1μA Quiescent Current in Shutdown
Stable with 1μF Output Capacitor
Stable with Ceramic, Tantalum, and Aluminum
Capacitors
Reverse-Battery Protection
No Reverse Current Flow from Output to Input
Thermal Limiting
Thermally Enhanced 12-Lead MSOP and
10-Pin (3mm × 3mm) DFN Packages
APPLICATIONS
n
n
n
n
The LT®3011 is a high voltage, micropower, low dropout
linear regulator. The device is capable of supplying 50mA of
output current with a dropout voltage of 300mV. Designed
for use in battery-powered high voltage systems, the low
quiescent current (46μA operating and 1μA in shutdown)
is well controlled in dropout, making the LT3011 an ideal
choice.
The LT3011 includes a PWRGD flag to indicate output
regulation. The delay between regulated output level and
flag indication is programmable with a single capacitor.
The LT3011 also has the ability to operate with very small
output capacitors; it is stable with only 1μF on the output.
Small ceramic capacitors can be used without the addition
of any series resistance (ESR) as is common with other
regulators. Internal protection circuitry includes reversebattery protection, current limiting, thermal limiting, and
reverse current protection.
The LT3011 features an adjustable output with a 1.24V
reference voltage. The device is available in the thermally
enhanced 12-lead MSOP and the low profile (0.75mm)
10-pin (3mm × 3mm) DFN package, both providing excellent thermal characteristics.
Low Current High Voltage Regulators
Regulator for Battery-Powered Systems
Telecom Applications
Automotive Applications
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Dropout Voltage
5V Supply with Shutdown
VIN
3V TO
80V
1μF
1.6M
OUT
LT3011
SHDN
PWRGD
POWER GOOD
GND
750k
ADJ
CT
VOUT
5V
50mA
1μF
249k
1000pF
VSHDN
<0.3V
>2.0V
OUTPUT
OFF
ON
300
DROPOUT VOLTAGE (mV)
IN
350
250
200
150
100
3011 TA01
50
0
0
10
20
30
40
OUTPUT CURRENT (mA)
50
3011 TA02
3011f
1
LT3011
ABSOLUTE MAXIMUM RATINGS
(Note 1)
IN Pin Voltage .........................................................±80V
OUT Pin Voltage ......................................................±60V
Input-to-Output Differential Voltage ........................±80V
ADJ Pin Voltage ........................................................±7V
SHDN Pin Voltage ...................................................±80V
CT Pin Voltage .................................................. 7V, –0.5V
PWRGD Pin Voltage ....................................... 80V, –0.5V
Output Short-Circuit Duration .......................... Indefinite
Storage Temperature Range................... –65°C to 150°C
Operating Junction Temperature
(Notes 3, 10, 11)
LT3011E, LT3011I .............................. –40°C to 125°C
LT3011H ............................................ –40°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSE Package Only ............................................ 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
OUT
1
10 IN
ADJ
2
9 NC
GND
3
NC
4
7 NC
PWRGD
5
6 CT
11
NC
OUT
ADJ
GND
NC
PWRGD
8 SHDN
1
2
3
4
5
6
13
12
11
10
9
8
7
NC
IN
NC
SHDN
NC
CT
MSE PACKAGE
12-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 43°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 150°C, θJA = 40°C/W, θJC = 16°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3011EDD#PBF
LT3011EDD#TRPBF
LDKQ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3011IDD#PBF
LT3011IDD#TRPBF
LDKQ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3011EMSE#PBF
LT3011EMSE#TRPBF
3011
12-Lead Plastic MSOP
–40°C to 125°C
LT3011HMSE#PBF
LT3011HMSE#TRPBF
3011
12-Lead Plastic MSOP
–40°C to 150°C
LT3011IMSE#PBF
LT3011IMSE#TRPBF
3011
12-Lead Plastic MSOP
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3011EDD
LT3011EDD#TR
LDKQ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3011IDD
LT3011IDD#TR
LDKQ
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3011EMSE
LT3011EMSE#TR
3011
12-Lead Plastic MSOP
–40°C to 125°C
LT3011HMSE
LT3011HMSE#TR
3011
12-Lead Plastic MSOP
–40°C to 150°C
LT3011IMSE
LT3011IMSE#TR
3011
12-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3011f
2
LT3011
ELECTRICAL CHARACTERISTICS
(LT3011E, LT3011I)
The l denotes the specifications which apply over the –40°C to 125°C operating temperature range, otherwise specifications are TJ = 25°C.
PARAMETER
CONDITIONS
Minimum Input Voltage
ILOAD = 50mA
ADJ Pin Voltage (Notes 2, 3)
VIN = 3V, ILOAD = 1mA
4V < VIN < 80V, 1mA < ILOAD < 50mA
l
Line Regulation (Note 2)
ΔVIN = 3V to 80V, ILOAD = 1mA
l
Load Regulation (Note 2)
VIN = 4V, ΔILOAD = 1mA to 50mA
VIN = 4V, ΔILOAD = 1mA to 50mA
l
Dropout Voltage
VIN = VOUT(NOMINAL) (Notes 4, 5)
ILOAD = 1mA
ILOAD = 1mA
l
ILOAD = 10mA
ILOAD = 10mA
l
ILOAD = 50mA
ILOAD = 50mA
l
GND Pin Current
VIN = VOUT(NOMINAL)
(Notes 4, 6)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
l
l
l
l
Output Voltage Noise
COUT = 10μF, ILOAD = 50mA, BW = 10Hz to 100kHz, VOUT = 1.24V
ADJ Pin Bias Current
(Note 7 )
Shutdown Threshold
VOUT = Off to On
VOUT = On to Off
SHDN Pin Current (Note 8)
VSHDN = 0V
VSHDN = 6V
Quiescent Current in Shutdown
VIN = 6V, VSHDN = 0V
PWRGD Trip Point
% of Nominal Output Voltage, Output Rising
PWRGD Trip Point Hysteresis
% of Nominal Output Voltage
PWRGD Output Low Voltage
IPWRGD = 50μA
MIN
TYP
2.8
4
V
1.228
1.215
1.24
1.24
1.252
1.265
V
V
1
12
mV
6
15
25
mV
mV
100
150
190
mV
mV
200
260
350
mV
mV
300
370
550
mV
mV
46
105
410
1.9
90
200
700
3.3
μA
μA
μA
mA
l
100
l
l
l
0.3
85
UNITS
μVRMS
30
100
nA
1.3
1.1
2
V
V
0.5
0.1
2
0.5
μA
μA
1
5
μA
90
94
%
1.1
l
l
CT Pin Charging Current
MAX
CT Pin Voltage Differential
VCT(PWRGD High) – VCT(PWRGD Low)
Ripple Rejection
VIN = 7V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 50mA
Current Limit
VIN = 7V, VOUT = 0V
VIN = 4V, ΔVOUT = –0.1V (Note 2)
l
Input Reverse Leakage Current
VIN = –80V, VOUT = 0V
l
Reverse Output Current (Note 9)
VOUT = 1.24V, VIN < 1.24V (Note 2)
65
%
140
250
mV
3
6
μA
1.67
V
85
dB
140
mA
mA
60
8
6
mA
15
μA
ELECTRICAL CHARACTERISTICS
(LT3011H)
The l denotes the specifications which apply over the –40°C to 150°C operating temperature range, otherwise specifications are TJ = 25°C.
PARAMETER
CONDITIONS
MIN
Minimum Input Voltage
ILOAD = 50mA
l
ADJ Pin Voltage (Notes 2, 3)
VIN = 3V, ILOAD = 1mA
4V < VIN < 80V, 1mA < ILOAD < 50mA
l
Line Regulation (Note 2)
ΔVIN = 3V to 80V, ILOAD = 1mA
l
Load Regulation (Note 2)
VIN = 4V, ΔILOAD = 1mA to 50mA
VIN = 4V, ΔILOAD = 1mA to 50mA
l
1.228
1.215
TYP
MAX
UNITS
2.8
4
V
1.24
1.24
1.252
1.265
V
V
1
12
mV
6
15
25
mV
mV
3011f
3
LT3011
ELECTRICAL CHARACTERISTICS
(LT3011H)
The l denotes the specifications which apply over the –40°C to 150°C operating temperature range, otherwise specifications are at TJ = 25°C.
PARAMETER
CONDITIONS
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 4, 5)
ILOAD = 1mA
ILOAD = 1mA
l
ILOAD = 10mA
ILOAD = 10mA
l
ILOAD = 50mA
ILOAD = 50mA
l
GND Pin Current
VIN = VOUT(NOMINAL)
(Notes 4, 6)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
l
l
l
l
Output Voltage Noise
COUT = 10μF, ILOAD = 50mA, BW = 10Hz to 100kHz, VOUT = 1.24V
ADJ Pin Bias Current
(Note 7)
Shutdown Threshold
MIN
SHDN Pin Current (Note 8)
VSHDN = 0V
VSHDN = 6V
Quiescent Current in Shutdown
VIN = 6V, VSHDN = 0V
PWRGD Trip Point
% of Nominal Output Voltage, Output Rising
PWRGD Trip Point Hysteresis
% of Nominal Output Voltage
PWRGD Output Low Voltage
IPWRGD = 50μA
l
0.3
85
UNITS
150
220
mV
mV
200
260
380
mV
mV
300
370
575
mV
mV
46
105
410
1.9
125
225
750
3.5
μA
μA
μA
mA
μVRMS
30
100
nA
1.3
1.1
2
V
V
0.5
0.1
2
0.5
μA
μA
1
5
μA
90
95
%
1.1
l
l
CT Pin Charging Current
CT Pin Voltage Differential
VCT(PWRGD High) – VCT(PWRGD Low)
Ripple Rejection
VIN = 7V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 50mA
Current Limit
VIN = 7V, VOUT = 0V
VIN = 4V, ΔVOUT = –0.1V (Note 2)
l
Input Reverse Leakage Current
VIN = –80V, VOUT = 0V
l
Reverse Output Current (Note 9)
VOUT = 1.24V, VIN < 1.24V (Note 2)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3011 is tested and specified for these conditions with the
ADJ pin connected to the OUT pin.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT3011
is tested and specified for these conditions with an external resistor
divider (249k bottom, 409k top) for an output voltage of 3.3V. The external
resistor divider will add a 5μA DC load on the output.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to (VIN – VDROPOUT).
Note 6: GND pin current is tested with VIN = VOUT(NOMINAL) and a current
source load. This means the device is tested while operating close to its
MAX
100
100
l
l
VOUT = Off to On
VOUT = On to Off
TYP
65
%
140
250
mV
3
6
μA
1.67
V
85
dB
140
mA
mA
60
8
6
mA
15
μA
dropout region. This is the worst-case GND pin current. The GND pin
current will decrease slightly at higher input voltages.
Note 7: ADJ pin bias current flows into the ADJ pin.
Note 8: SHDN pin current flows out of the SHDN pin.
Note 9: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 10: The LT3011 regulators are tested and specified under pulse
load conditions such that TJ ≅ TA. The LT3011E regulators are 100%
tested at TA = 25°C. Performance of the LT3011E over the full –40°C
to 125°C operating junction temperature range is assured by design,
characterization and correlation with statistical process controls. The
LT3011I regulators are guaranteed over the full –40°C to 125°C operating
junction temperature range. The LT3011H is tested to the LT3011H
Electrical Characteristics table at 150°C operating junction temperature.
High junction temperatures degrade operating lifetimes. Operating lifetime
is derated at junction temperatures greater than 125°C.
Note 11: This IC includes overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperature will
exceed 125°C (LT3011E/LT3011I) or 150°C (LT3011H) when overtemperature
protection is active. Continuous operation above the specified maximum
operating junction temperature may impair device reliability.
3011f
4
LT3011
TYPICAL PERFORMANCE CHARACTERISTICS
Dropout Voltage
Guaranteed Dropout Voltage
400
600
350
= TEST POINTS
350
300
TJ 25oC
200
150
100
400
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
Dropout Voltage
400
500
TJ 125oC
250
TJ = 25°C, unless otherwise noted.
TJ b 125oC
300
TJ b 25oC
200
100
50
0
10
0
20
30
250
IL = 10mA
200
150
IL = 1mA
100
50
0
50
40
IL = 50mA
300
0
5
OUTPUT CURRENT (mA)
0
–50 –25
10 15 20 25 30 35 40 45 50
OUTPUT CURRENT (mA)
0
3011 G02
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G01
3011 G03
Quiescent Current
VIN = 6V
RL = ∞
IL = 0
70
Quiescent Current
80
TJ = 25°C
70 RL = d
IL = 1mA
1.248
1.246
VSHDN = VIN
60
ADJ PIN VOLTAGE (V)
QUIESCENT CURRENT (μA)
ADJ Pin Voltage
1.250
50
40
30
20
QUIESCENT CURRENT (μA)
80
1.244
1.242
1.240
1.238
1.236
1.234
10
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
VSHDN = VIN
50
40
30
20
10
1.232
VSHDN = GND
60
1.230
–50 –25
0
0
0
25 50 75 100 125 150
TEMPERATURE (°C)
1
2
3
4 5 6 7
INPUT VOLTAGE (V)
3011 G04
GND Pin Current
RL = 49.6Ω
IL = 25mA*
1.0
0.8
RL = 124Ω
IL = 10mA*
0.6
0.4
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
TJ = 25°C
*FOR VOUT = 1.24V
1.4
1.2
1.0
0.8
0.6
0.4
RL = 1.24k, IL = 1mA*
0.2
1.4
1.6
SHDN PIN THRESHOLD (V)
1.2
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
1.4
0
1.6
VIN = VOUT(NOMINAL) +1V
1.8 TJ = 25°C
RL = 24.8Ω
IL = 50mA*
1.6
9
10
3011 G07
0
1.2
1.0
0.8
0.6
0.4
0.2
0.2
8
10
SHDN Pin Threshold
GND Pin Current vs IOUT
2.0
1.8
9
3011 G06
3011 G05
2.0
8
0
5
10 15 20 25 30 35 40 45 50
OUTPUT CURRENT (mA)
3011 G08
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G09
3011f
5
LT3011
TYPICAL PERFORMANCE CHARACTERISTICS
SHDN Pin Current
SHDN Pin Current
0.6
0.28
TJ = 25°C
CURRENT FLOWS
0.24 OUT OF SHDN PIN
0.16
0.12
0.08
ADJ PIN BIAS CURRENT (nA)
0.20
ADJ Pin Bias Current
120
VSHDN = 0V
CURRENT FLOWS
OUT OF SHDN PIN
0.5
SHDN PIN CURRENT (μA)
SHDN PIN CURRENT (μA)
TJ = 25°C, unless otherwise noted.
0.4
0.3
0.2
0.1
0.04
0
1
0.5
1.5
2
2.5
3
3.5 4
SHDN PIN VOLTAGE (V)
4.5
5
80
60
40
20
0
–50 –25
0
100
0
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
3011 G11
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G12
3011 G10
180
93
92
OUTPUT
RISING
90
89
OUTPUT
FALLING
88
87
86
85
–50 –25
0
IPWRGD = 50μA
160
140
120
100
80
60
40
0
1.0
1.0
0.8
0.6
0.4
VCT(LOW)
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G16
25 50 75 100 125 150
TEMPERATURE (°C)
Current Limit
200
180
160
CURRENT LIMIT (mA)
1.2
0
3011 G15
140
0
1.5
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
VOUT = 0V
TJ = 25°C
160
CURRENT LIMIT (mA)
CT COMPARATOR THRESHOLD (V)
VCT(HIGH)
1.4
0
–50 –25
2.0
Current Limit
180
1.6
0.2
2.5
3011 G14
CT Comparator Threshold
1.8
3.0
0.5
20
3011 G13
2.0
PWRGD TRIPPED HIGH
3.5
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
4.0
CT CHARGING CURRENT (μA)
94
91
CT Charging Current
PWRGD Output Low Voltage
200
PWRGD OUTPUT LOW VOLTAGE (mV)
PWRGD TRIP POINT (% OF OUTPUT VOLTAGE)
PWRGD Trip Point
95
120
100
80
60
140
120
100
80
60
40
40
20
20
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
3011 G17
VIN = 7V
VOUT = 0V
0
–50 –25 0
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G18
3011f
6
LT3011
TYPICAL PERFORMANCE CHARACTERISTICS
Reverse Output Current
Reverse Output Current
140
70
ADJ PIN CLAMP
(SEE APPLICATIONS
INFORMATION)
100
80
60
TJ = 25°C
VIN = 0V
CURRENT FLOWS
INTO OUTPUT PIN
VOUT = VADJ
40
20
0
0
1
2
3 4 5 6 7
OUTPUT VOLTAGE (V)
8
VIN = 0V
VOUT = VADJ = 1.24V
VIN = 7V + 0.5VP-P RIPPLE AT f = 120Hz
88 IL = 50mA
VOUT = 1.24V
86
60
50
40
30
20
84
82
80
78
76
74
10
72
0
–50 –25
10
9
Input Ripple Rejection
90
RIPPLE REJECTION (dB)
REVERSE OUTPUT CURRENT (μA)
80
REVERSE OUTPUT CURRENT (μA)
160
120
TJ = 25°C, unless otherwise noted.
0
3011 G19
70
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
3011 G20
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G21
Input Ripple Rejection
Minimum Input Voltage
4.0
100
VIN = 7V + 50mVRMS RIPPLE
90 IL = 50mA, VOUT = 1.24V
RIPPLE REJECTION (dB)
COUT = 10μF
CERAMIC
60
50
40
COUT = 1μF
CERAMIC
30
20
–2
3.0
LOAD REGULATION (mV)
MINIMUM INPUT VOLTAGE (V)
3.5
80
70
Load Regulation
0
IL = 50mA
2.5
2.0
1.5
1.0
0
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
–4
–6
–8
–10
0.5
10
ΔIL = 1mA TO 50mA
VOUT = 1.24V
0
–50 –25
0
–12
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G23
0
25 50 75 100 125 150
TEMPERATURE (°C)
3011 G24
3011 G22
Output Noise Spectral Density
Output Noise (10Hz to 100kHz)
1
OUTPUT VOLTAGE
DEVIATION (V)
VOUT = 1.24V
COUT = 1μF
IL = 50mA
WORST-CASE NOISE
VOUT = 1.24V
COUT = 1μF
IL = 50mA
Transient Response
0.3
VOUT
100μV/DIV
0.1
0.2
0.1
0
–0.1
–0.2
0.01
1ms/DIV
0.001
10
100
1k
10k
FREQUENCY (Hz)
100k
3011 G26
LOAD
CURRENT (mA)
OUTPUT NOISE SPECTRAL
DENSITY (μV/ Hz)
10
50
25
0
VIN = 6V
VOUT SET FOR 5V
CIN = 1μF CERAMIC
COUT = 1μF CERAMIC
ΔILOAD = 1mA TO 50mA
0 100 200 300 400 500 600 700 800 900 1000
TIME (μs)
3011 G27
3011 G25
3011f
7
LT3011
PIN FUNCTIONS
(DFN/MSOP)
OUT (Pin 1/Pin 2): Output. The output supplies power to
the load. A minimum output capacitor of 1μF is required
to prevent oscillations. Larger capacitors will be required
for applications with large transient loads to limit peak
voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
ADJ (Pin 2/Pin 3): Adjust. This is the input to the error
amplifier. This pin is internally clamped to ±7V. It has a
bias current of 30nA which flows into the pin (see the
curve labeled ADJ Pin Bias Current vs Temperature in the
Typical Performance Characteristics section). The ADJ
pin voltage is 1.24V referenced to ground, and the output
voltage range is 1.24V to 60V.
GND (Pins 3, 11/Pins 4, 13): Ground. The exposed backside of the package (Pin 11/Pin 13) is an electrical connection for GND. As such, to ensure optimum device operation and thermal performance, the Exposed Pad must be
connected directly to Pin 3/Pin 4 on the PC board.
NC (Pins 4, 7, 9/Pins 1, 5, 8, 10, 12): No Connection.
These pins have no internal connection. Connecting NC
pins to a copper area for heat dissipation provides a small
improvement in thermal performance.
PWRGD (Pin 5/Pin 6): Power Good. The PWRGD flag is
an open-collector flag to indicate that the output voltage
has increased above 90% of the nominal output voltage.
There is no internal pull-up on this pin; a pull-up resistor
must be used. The PWRGD pin will change state from an
open-collector pull-down to high impedance after both
the output is above 90% of the nominal voltage and the
capacitor on the CT pin has charged through a 1.67V differential. The maximum pull-down current of the PWRGD
pin in the low state is 50μA.
CT (Pin 6/Pin 7): Timing Capacitor. The CT pin allows the
use of a small capacitor to delay the timing between the
point where the output crosses the PWRGD threshold and
the PWRGD flag changes to a high impedance state. Current out of this pin during the charging phase is 3μA. The
voltage difference between the PWRGD low and PWRGD
high states is 1.67V (see the Applications Information
section).
SHDN (Pin 8/Pin 9): Shutdown. The SHDN pin is used
to put the LT3011 into a low power shutdown state. The
output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or open-collector
logic with a pull-up resistor. The pull-up resistor is only
required to supply the pull-up current of the open-collector gate, normally several microamperes. If unused, the
SHDN pin must be tied to a logic high or VIN.
IN (Pin 10/Pin 11): Input. Power is supplied to the device
through the IN pin. A bypass capacitor is required on this
pin if the device is more than six inches away from the
main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to
include a bypass capacitor in battery-powered circuits. A
bypass capacitor in the range of 1μF to 10μF is sufficient.
The LT3011 is designed to withstand reverse voltages
on the IN pin with respect to ground and the OUT pin. In
the case of a reverse input voltage, which can occur if a
battery is plugged in backwards, the LT3011 will act as if
there is a diode in series with its input. There will be no
reverse current flow into the LT3011 and no reverse voltage will appear at the load. The device will protect both
itself and the load.
Exposed Pad (Pin 11/Pin 13): Ground. The Exposed Pad
must be soldered to the PCB.
3011f
8
LT3011
APPLICATIONS INFORMATION
The LT3011 is a 50mA high voltage/low dropout regulator
with micropower quiescent current and shutdown. The
device is capable of supplying 50mA at a dropout voltage of
300mV. The low operating quiescent current (46μA) drops
to 1μA in shutdown. In addition to low quiescent current,
the LT3011 incorporates several protection features which
make it ideal for use in battery-powered systems. The
device is protected against both reverse input and reverse
output voltages. In battery backup applications where the
output can be held up by a backup battery when the input
is pulled to ground, the LT3011 acts like it has a diode in
series with its output and prevents reverse current flow.
fications for output voltages greater than 1.24V will be
proportional to the ratio of the desired output voltage to
1.24V; (VOUT/1.24V). For example, load regulation for an
output current change of 1mA to 50mA is –6mV (typical)
at VOUT = 1.24V. At VOUT = 12V, load regulation is:
12V
• – 6 mV = – 58mV
1 . 24V
Output Capacitance and Transient Response
The LT3011 is designed to be stable with a wide range
of output capacitors. The ESR of the output capacitor
affects stability, most notably with small capacitors. A
minimum output capacitor of 1μF with an ESR of 3Ω or
less is recommended to prevent oscillations. The LT3011
is a micropower device and output transient response
will be a function of output capacitance. Larger values
of output capacitance decrease the peak deviations and
provide improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3011, will increase the
effective output capacitor value.
Adjustable Operation
The LT3011 has an output voltage range of 1.24V to 60V. The
output voltage is set by the ratio of two external resistors as
shown in Figure 1. The device servos the output to maintain
the voltage at the adjust pin at 1.24V referenced to ground.
The current in R1 is then equal to 1.24V/R1 and the current
in R2 is the current in R1 plus the ADJ pin bias current.
The ADJ pin bias current, 30nA at 25°C, flows through
R2 into the ADJ pin. The output voltage can be calculated
using the formula in Figure 1. The value of R1 should be
less than 250k to minimize errors in the output voltage
caused by the ADJ pin bias current. Note that in shutdown
the output is turned off and the divider current will be zero.
The adjustable device is tested and specified with the
ADJ pin tied to the OUT pin and a 5μA DC load (unless
otherwise specified) for an output voltage of 1.24V. Speci-
VOUT = VADJ 1 + R2 + (IADJ)(R2)
R1
VADJ = 1.24V
IADJ = 30nA AT 25oC
OUTPUT RANGE = 1.24V TO 60V
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
IN
VIN
OUT
LT3011
R2
+
VOUT
ADJ
GND
R1
3011 F01
Figure 1. Adjustable Operation
3011f
9
LT3011
APPLICATIONS INFORMATION
in a small package, but they tend to have strong voltage
and temperature coefficients, as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be significant enough
to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, similar to the way piezoelectric accelerometer or microphone
works. For a ceramic capacitor, the stress can be induced
by vibrations in the system or thermal transients.
20
PWRGD Flag and Timing Capacitor Delay
The PWRGD flag is used to indicate that the ADJ pin voltage is within 10% of the regulated voltage. The PWRGD
pin is an open-collector output, capable of sinking 50μA
of current when the ADJ pin voltage is low. There is no
internal pull-up on the PWRGD pin; an external pull-up
resistor must be used. When the ADJ pin rises to within
10% of its final reference value, a delay timer is started.
At the end of this delay, programmed by the value of the
capacitor on the CT pin, the PWRGD pin switches to a high
impedance and is pulled up to a logic level by an external
pull-up resistor.
To calculate the capacitor value on the CT pin, use the
following formula:
ICT • t DELAY
C TIME =
VCT(HIGH) − VCT (LOW)
Figure 4 shows a block diagram of the PWRGD circuit. At
start-up, the timing capacitor is discharged and the PWRGD
pin will be held low. As the output voltage increases and
the ADJ pin crosses the 90% threshold, the JK flipflop is
reset, and the 3μA current source begins to charge the
timing capacitor. Once the voltage on the CT pin reaches
the VCT(HIGH) threshold (approximately 1.7V at 25°C), the
capacitor voltage is clamped and the PWRGD pin is set to
a high impedance state.
40
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10MF
20
X5R
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
0
–20
–40
–60
Y5V
–80
–100
0
X5R
–20
–40
Y5V
–60
–80
0
2
4
8
6
10 12
DC BIAS VOLTAGE (V)
14
16
3011 F02
Figure 2. Ceramic Capacitor DC Bias Characteristics
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10MF
–100
50
25
75
–50 –25
0
TEMPERATURE (oC)
100
125
3011 F03
Figure 3. Ceramic Capacitor Temperature Characteristics
3011f
10
LT3011
APPLICATIONS INFORMATION
During normal operation, an internal glitch filter will ignore
short transients (<15μs). Longer transients below the 90%
threshold will reset the JK flip-flop. This flip-flop ensures
that the capacitor on the CT pin is quickly discharged all
the way to the VCT(LOW) threshold before restarting the
time delay. This provides a consistent time delay after the
ADJ pin is within 10% of the regulated voltage before the
PWRGD pin switches to high impedance.
Thermal Considerations
The power handling capability of the device will be limited by
the maximum rated junction temperature (125°C, LT3011E/
LT3011I or 150°C, LT3011H). The power dissipated by the
device will be made up of two components:
1. Output current multiplied by the input/output voltage
differential: IOUT • (VIN – VOUT) and,
2. GND pin current multiplied by the input voltage:
IGND • VIN
The GND pin current is found by examining the GND pin
current curves in the Typical Performance Characteristics
section. Power dissipation will be equal to the sum of the
two components listed above.
The LT3011 series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C (LT3011E/ LT3011I) or 150°C
(LT3011H) must not be exceeded. It is important to give
careful consideration to all sources of thermal resistance
from junction to ambient. Additional heat sources mounted
nearby must also be considered.
ICT 3μA
CT
ADJ
+
J
K
+
–
VCT(HIGH)
– VBE
(z1.1V)
Q
–
VREF • 90%
PWRGD
VCT(LOW)
z0.1V
3011 F04
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. MSOP Measured Thermal Resistance
COPPER AREA
TOPSIDE
BACKSIDE
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm
2500 sq mm
52°C/W
1000 sq mm 2500 sq mm
2500 sq mm
54°C/W
225 sq mm
2500 sq mm
2500 sq mm
58°C/W
100 sq mm
2500 sq mm
2500 sq mm
64°C/W
Table 2. DFN Measured Thermal Resistance
COPPER AREA
TOPSIDE
BACKSIDE
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm
2500 sq mm
52°C/W
1000 sq mm 2500 sq mm
2500 sq mm
54°C/W
225 sq mm
2500 sq mm
2500 sq mm
58°C/W
100 sq mm
2500 sq mm
2500 sq mm
64°C/W
The thermal resistance junction-to-case (θJC), measured
at the Exposed Pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage differentials and maximum load current is not practical due
to thermal limitations. Transient operation at high input/
output differentials is possible. The approximate thermal
time-constant for a 2500sq mm 3/32" FR-4 board, with
maximum topside and backside area for one ounce copper, is three seconds. This time-constant will increase as
more thermal mass is added (i.e., vias, larger board and
other components).
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is significantly less
than the thermal time constant of the device and board.
Figure 4. PWRGD Circuit Block Diagram
3011f
11
LT3011
APPLICATIONS INFORMATION
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input voltage range of 24V to 30V, an output current range of 0mA
to 50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
IOUT(MAX) • (VIN(MAX) – VOUT) + (IGND • VIN(MAX))
Where:
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3,
and 1% for P4.
PEFF = 76%(0.23W) + 19%(2.20W) + 4%(0.35W)
+ 1%(3.42W) = 0.64W
With a thermal resistance in the range of 52°C/W to 64°C/W,
this translates to a junction temperature rise above ambient of 33°C to 41°C.
IOUT(MAX) = 50mA
High Temperature Operation
VIN(MAX) = 30V
Care must be taken when designing LT3011 applications to
operate at high ambient temperatures. The LT3011 works
at elevated temperatures but erratic operation can occur
due to unforeseen variations in external components. Some
tantalum capacitors are available for high temperature
operation, but ESR is often several ohms; capacitor ESR
above 3Ω is unsuitable for use with the LT3011. Ceramic
capacitor manufacturers (Murata, AVX, TDK and Vishay
Vitramon at this writing) now offer ceramic capacitors that
are rated to 150°C using an X8R dielectric. Device instability
will occur if the output capacitor value and ESR are outside
design limits at elevated temperature and operating DC
voltage bias (see information on capacitor characteristics
under Output Capacitance and Transient Response). Check
each passive component for absolute value and voltage
ratings over the operating temperature range.
IGND at (IOUT = 50mA, VIN = 30V) = 1mA
So:
P = 50mA • (30V – 5V) + (1mA • 30V) = 1.28W
The thermal resistance will be in the range of 52°C/W to
64°C/W depending on the copper area. So, the junction
temperature rise above ambient will be approximately
equal to:
1.28W • 58°C/W = 74°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
TJMAX = 50°C + 74°C = 124°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms (max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambient? Using a 500ms period (well under the time-constant
of the board), power dissipation is as follow:
P1 (48VIN, 5mA load) = 5mA • (48V – 5V)
+ (200μA • 48V) = 0.23W
P2 (48VIN, 50mA load) = 50mA • (48V – 5V)
+ (1mA • 48V) = 2.20W
P3 (72VIN, 5mA load) = 5mA (72V – 5V)
+ (200μA • 72V) = 0.35W
P1 (72VIN, 50mA load) = 50mA (72V – 5V)
+ (1mA • 72V) = 3.42W
Leakage in capacitors, or from solder flux left after insufficient board cleaning, adversely affects the low quiescent current operation. Consider junction temperature
increase due to power dissipation in both the junction
and nearby components to ensure maximum specifications are not violated for the LT3011E/LT3011H/LT3011I
or external components.
Protection Features
The LT3011 incorporates several protection features which
make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input
voltages, and reverse voltages from output-to-input.
3011f
12
LT3011
APPLICATIONS INFORMATION
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C
(LT3011E/LT3011I) or 150°C (LT3011H).
The input of the device will withstand reverse voltages
of 80V. Current flow into the device will be limited to less
than 6mA (typically less than 100μA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backwards.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open-circuit or grounded, the ADJ
pin will act like an open-circuit when pulled below ground,
and like a large resistor (typically 100k) in series with a
diode when pulled above ground. If the input is powered by
a voltage source, pulling the ADJ pin below the reference
voltage will cause the device to try and force the current
limit out of the output. This will cause the output to go to
an unregulated high voltage. Pulling the ADJ pin above the
reference voltage will turn off all output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp voltage if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pin is divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open-circuit. Current flow back into the output will follow
the curve shown in Figure 5. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the regulator output, this current will be reduced depending on the
size of the resistor divider.
When the IN pin of the LT3011 is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current will typically drop to less than 2μA. This can happen
if the input of the LT3011 is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
REVERSE OUTPUT CURRENT (μA)
160
140
ADJ PIN CLAMP
(SEE ABOVE)
120
100
80
60
TJ = 25°C
VIN = 0V
CURRENT FLOWS
INTO OUTPUT PIN
VOUT = VADJ
40
20
0
0
1
2
3 4 5 6 7
OUTPUT VOLTAGE (V)
8
9
10
3011 F05
Figure 5. Reverse Output Current
3011f
13
LT3011
TYPICAL APPLICATIONS
5V Buck Converter with Low Current Keep Alive Backup
D2
D1N914
6
4
C3
4.7MF
100V
CERAMIC 15
14
BOOST
VIN
SW
2
VOUT
5V
1A/250mA
D1
10MQ060N
LT1766
SHDN
Buck Converter
Efficiency vs Load Current
L1†
15MH
BIAS
SYNC
FB
GND
100
10
R1
15.4k
12
R2
4.99k
VC
VOUT = 5V
L = 68MH
VIN = 10V
90
C1
100MF 10V
SOLID
TANTALUM
EFFICIENCY (%)
VIN
5.5V*
TO 60V
C2
0.33MF
+
VIN = 42V
80
70
1, 8, 9, 16 11
CC
1nF
60
50
10
OPERATING
CURRENT
IN
OUT
1
3011 TA03
LT3011
100k
8
5
LOW HIGH
SHDN
ADJ
PWRGD
GND
3, 11
750k * FOR INPUT VOLTAGES BELOW 7.5V,
SOME RESTRICTIONS MAY APPLY
†
INCREASE L1 TO 30MH FOR LOAD
CURRENTS ABOVE 0.6A AND TO
249k 60MH ABOVE 1A.
2
CT
6
0
0.25
0.75
1.00
0.50
LOAD CURRENT (A)
1.25
3011 TA04
LT3011 PIN NUMBERS ARE FOR
THE DD PACKAGE.
1000pF
LT3011 Automotive Application
VIN
12V
(FUTURE 42V)
IN
+
1MF
NO PROTECTION
DIODE NEEDED!
OUT
LT3011
SHDN
750k
1MF
ADJ
GND
LOAD: CLOCK,
SECURITY SYSTEM
ETC
249k
OFF ON
LT3011 Telecom Application
VIN
48V
(72V TRANSIENT)
IN
1MF
OUT
LT3011
SHDN
ADJ
GND
OFF ON
750k NO PROTECTION
DIODE NEEDED!
+
1MF
LOAD:
SYSTEM MONITOR
ETC
–
BACKUP
BATTERY
249k
3011 TA05
3011f
14
LT3011
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.38
± 0.10
R = 0.115
TYP
6
10
5
1
0.675 ±0.05
3.50 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
0.25 ± 0.05
1.65 ± 0.10
(2 SIDES)
(DD) DFN 1103
0.50
BSC
2.38 ±0.05
(2 SIDES)
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION
OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS
OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
MSE Package
12-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev B)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 p 0.102
(.112 p .004)
5.23
(.206)
MIN
2.845 p 0.102
(.112 p .004)
0.889 p 0.127
(.035 p .005)
6
1
1.651 p 0.102 3.20 – 3.45
(.065 p .004) (.126 – .136)
0.12 REF
12
0.65
0.42 p 0.038
(.0256)
(.0165 p .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 p 0.102
(.159 p .004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
7
NO MEASUREMENT PURPOSE
0.406 p 0.076
(.016 p .003)
REF
12 11 10 9 8 7
DETAIL “A”
0o – 6o TYP
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1 2 3 4 5 6
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.86
(.034)
REF
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE12) 0608 REV B
3011f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT3011
TYPICAL APPLICATION
Constant Brightness for Indicator LED over Wide Input Voltage Range
RETURN
IN
1MF
OUT
LT3011
SHDN
OFF ON
GND
–48V CAN VARY
FROM –4V TO –80V
–48V
ILED = 1.24V/RSET
1MF
ADJ
RSET
3011 TA06
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1121/
LT1121HV
LT1676
VIN: 4.2V to 30V/36V, VOUT(MIN) = 3.75V, VDO = 0.42V, IQ = 30μA, ISD = 16μA,
Reverse Battery Protection, SOT-223, S8 and Z Packages
VIN: 7.4V to 60V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 2.5μA, S8 Package
150mA, Micropower, LDO
LT1761
60V, 440mA (IOUT), 100kHz, High
Efficiency Step-Down DC/DC Converter
100mA, Low Noise Micropower, LDO
LT1762
150mA, Low Noise Micropower, LDO
LT1763
500mA, Low Noise Micropower, LDO
LT1764/
LT1764A
3A, Low Noise, Fast Transient Response,
LDO
LT1766
60V, 1.2A (IOUT), 200kHz, High Efficiency
Step-Down DC/DC Converter
40V, 550mA (IOUT), 200kHz, High
Efficiency Step-Down DC/DC Converter
60V, 1.2A (IOUT), 500kHz, High Efficiency
Step-Down DC/DC Converter
300mA, Low Noise Micropower, LDO
LT1776
LT1956
LT1962
LT1963/
LT1963A
LT1965
LT3009
LT3010/
LT3010H
LT3012/
LT3012H
LT3013/
LT3013H
LT3014/HV
LT3080/
LT3080-1
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 20μA, ISD <1μA,
Low Noise < 20μVRMS, Stable with 1μF Ceramic Capacitors, ThinSOTTM Package
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 25μA, ISD <1μA,
Low Noise < 20μVRMS, MS8 Package
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 30μA, ISD <1μA,
Low Noise < 20μVRMS, S8 Package
VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1μA,
Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors,
DD and TO220-5 Packages
VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP-16/E Package
VIN: 7.4V to 40V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 30μA, N8 and S8 Packages
VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP-16/E Package
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30μA, ISD <1μA,
Low Noise < 20μVRMS, MS8 Package
1.5A, Low Noise, Fast Transient Response, VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1μA,
Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors,
LDO
DD, TO220-5, S0T-223 and S8 Packages
1.1A, Low Noise, Low Dropout Linear
310mV Dropout Voltage, Low Noise = 40μVRMS, VIN: 1.8V to 20V,
VOUT: 1.2V to 19.5V, Stable with Ceramic Capacitors, TO-220, DDPak,
Regulator
MSOP and 3mm × 3mm DFN Packages
20mA, 3μA IQ Micropower LDO
280mV Dropout Voltage, Low IQ = 3μA, VIN: 1.6V to 20V, ThinSOT and SC-70 Packages
50mA, 3V to 80V, Low Noise Micropower VIN: 3V to 8V, VOUT(MIN) = 1.275V, VDO = 0.3V, IQ = 30μA, ISD = 1μA,
Low Noise < 100μVRMS, MS8E Package, H Grade = +140°C TJMAX
LDO
250mA, 4V to 80V, Low Dropout
VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 40μA, ISD <1μA,
Micropower Linear Regulator
TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C TJMAX
250mA, 4V to 80V, Low Dropout
VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 65μA, ISD <1μA,
Micropower Linear Regulator
TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C TJMAX, PWRGD Flag
20mA, 3V to 80V, Low Dropout
VIN: 3V to 80V (100V for 2ms, HV Version), VOUT: 1.22V to 60V, VDO = 0.35V,
IQ = 7μA, ISD <1μA, ThinSOT and 3mm × 3mm DFN-8 Packages
Micropower Linear Regulator
1.1A, Parallelable, Low Noise, Low
300mV Dropout Voltage (2-Supply Operation), Low Noise = 40μVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, Current-Based Reference with One Resistor VOUT Set; Directly
Dropout Linear Regulator
Parallelable (No Op Amp Required), Stable with Ceramic Capacitors, TO-220, SOT-223,
MSOP and 3mm × 3mm DFN Packages; LT3080-1 Features an Integrated Ballast Resistor
ThinSOT is a trademark of Linear Technology Corporation.
3011f
16 Linear Technology Corporation
LT 0808 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008