BLE112 DataSheet

BLE112
DATA SHEET
Thursday, 10 December 2015
Version 1.48
Disclaimer
Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers
using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific
device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories
reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy
or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or
express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written
consent of Silicon Laboratories. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result
in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be
used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.
Trademark Information
Silicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS®, EFM, EFM32, EFR, Energy Micro, Energy Micro logo and combinations
thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZMac®, EZRadio®, EZRadioPRO®, DSPLL®, ISOmodem ®, Precision32®, ProSLIC®, SiPHY®,
USBXpress® and others are trademarks or registered trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM
Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.
Silicon Labs
VERSION HISTORY
Version
Comment
1.0
Certification information updated. Layout guide for BLE112-N added.
1.1
RF pin dimensions added
1.11
Absolute maximum supply corrected
1.2
Certification information updated
1.21
Current consumption added
1.22
Current consumption profiles added
1.23
Typo corrected on table 2
1.24
UART chapter, I/O Ports chapter, DC characteristics
1.25
Updated product codes
1.26
Note about P1_0 and P1_1 in chapter 2.1
1.27
Design check list, peripheral pull-up/pull-down requirements
1.28
Updating “Alternate” configuration table for clarity
1.29
Absolute maximum ratings: all supply nets must have the same voltage.
Opamp and comparator removed from the peripherals table.
1.3
MIC Japan information updated
1.4
Updated contact information
1.41
CE info updated
1.42
TXP vs HW config added
1.43
Peripheral mapping table: analog comparator added
1.44
Product codes updates
1.45
CE info updated
1.46
Layout examples added
1.47
Contact info updated
Silicon Labs
1.48
Updated op-amp description
Silicon Labs
TABLE OF CONTENTS
1
BLE112 Product numbering ..........................................................................................................................7
2
Pinout and Terminal Description ...................................................................................................................8
2.1
I/O Ports .............................................................................................................................................. 11
2.2
UART ................................................................................................................................................... 11
2.3
Electrical Characteristics ..................................................................................................................... 12
2.4
Absolute Maximum Ratings ................................................................................................................ 12
2.5
Recommended Operating Conditions ................................................................................................. 12
2.6
DC Characteristics .............................................................................................................................. 12
2.7
Current Consumption .......................................................................................................................... 13
2.8
RF Characteristics ............................................................................................................................... 14
2.8.1
TX Power vs HW Configuration ................................................................................................... 14
2.8.2
Antenna characteristics ................................................................................................................ 14
3
Physical Dimensions .................................................................................................................................. 17
4
Power-On Reset and Brownout Detector ................................................................................................... 19
5
Design Guidelines ...................................................................................................................................... 20
5.1
General Design Guidelines ................................................................................................................. 20
5.2
Layout Guide Lines ............................................................................................................................. 21
5.3
BLE112-A Layout Guide ..................................................................................................................... 21
5.4
BLE112-N Layout Guide ..................................................................................................................... 22
5.5
Design Check List ............................................................................................................................... 24
6
Soldering Recommendations ..................................................................................................................... 25
7
Block diagram ............................................................................................................................................. 26
8
Certifications ............................................................................................................................................... 29
8.1
Bluetooth ............................................................................................................................................. 29
8.2
FCC and IC ......................................................................................................................................... 29
8.2.1
9
FCC et IC ..................................................................................................................................... 30
8.3
CE ....................................................................................................................................................... 32
8.4
MIC Japan ........................................................................................................................................... 32
8.5
KCC (Korea) ........................................................................................................................................ 32
8.6
Qualified Antenna Types for BLE112-E and BLE112-N ..................................................................... 32
Contact Information .................................................................................................................................... 33
Silicon Labs
BLE112 Bluetooth® low energy single mode module
DESCRIPTION
BLE112, Bluetooth low energy single mode
module is a single mode device targeted for
low power sensors and accessories.
KEY FEATURES:
BLE112 offers all Bluetooth low energy
features: radio, stack, profiles and application
space for customer applications, so no
external processor is needed. The module also
provides flexible hardware interfaces to
connect sensors, simple user interfaces or
even displays directly to the module.
BLE112 can be powered directly with a
standard 3V coin cell batteries or pair of AAA
batteries. In lowest power sleep mode it
consumes only 400nA and will wake up in few
hundred microseconds.
APPLICATIONS:





Heart rate sensors

Pedometers

Watches

Blood pressure and glucose meters

Bluetooth v.4.0, single mode compliant
o
Supports master and slave
modes
o
4+ simultaneous connection
in master mode
Integrated Bluetooth low energy stack
o
GAP, GATT, L2CAP, SMP
o
Bluetooth low energy profiles
Radio performance
o
TX power: +3dBm to -23dBm
o
RX sensitivity: -85dBm to 91dBm
Ultra low current consumption
o
Transmit: 27mA (0dBm)
o
Sleep mode 3: 0.4uA

Programmable 8051 processor for
embedding full applications
Weight scales

Bluetooth qualified

Key fobs

CE qualified

Households
devices

Modular certification for FCC, IC and
KCC

Security tags


Wireless keys (keyless go)
MIC Japan compatibility fully tested
with ARIB STD-T66

Proximity sensors

HID keyboards and mice

Indoor GPS broadcasting devices
sensors
and
collector
Silicon Labs
1 BLE112 Product numbering
Product code
Description
BLE112-A-v1
BLE112 with integrated chip antenna and software version 1.0
BLE112-E-v1
BLE112 with U.FL connector and software version 1.0
Silicon Labs
Page 7 of 33
Pinout and Terminal Description
1 GND
2 AVDD
RF 31
RFGND 32
2
3 AVDD
4 P2_2
5 P2_1
GND 30
6 P2_0
7 P1_7
RESET 29
P0_0 28
8 P1_6
P0_1 27
9 VDD_USB
P0_2 26
21 GND
20 DVDD
P0_6 22
19 P0_7
P0_5 23
13 P1_5
18 P1_0
12 USB-
17 P1_1
P0_4 24
16 P1_2
11 USB+
15 P1_3
P0_3 25
14 P1_4
10 GND
Figure 1: BLE112
RESET
PIN
NUMBER
29
PAD TYPE
Active low reset.
1, 10, 21,
30
GND
RF
31
RF (*
RFGND
32
GND
DVDD
AVDD
VDD_USB
20
2, 3
9
Supply voltage
Supply voltage
Supply voltage
GND
DESCRIPTION
GND
RF output/input for BLE112-N. With
BLE112-A and BLE112-E do not
connect.
RF ground. Connected to GND internally in
the module. With BLE112-A and BLE112-E
leave floating or connect to a solid GND
plane.
Supply voltage 2V - 3.6V
Supply voltage 2V - 3.6V
Supply voltage 2V - 3.6V
*) RF pin is not connected in BLE112-A and BLE112-E. To use RF pin with BLE112-B please see the design
guide.
Table 1: Supply and RF Terminal Descriptions
Silicon Labs
Page 8 of 33
PIN
PIN NAME PIN TYPE
NUMBER
DESCRIPTION
4
P2_2
Digital I/O
Configurable I/O port, See table 3
5
P2_1
Digital I/O
Configurable I/O port, See table 3
6
7
8
11
12
13
14
15
16
P2_0
P1_7
P1_6
USB+
USBP1_5
P1_4
P1_3
P1_2
Digital
Digital
Digital
USB+
USBDigital
Digital
Digital
Digital
17
P1_1
Digital I/O
18
P1_0
Digital I/O
19
22
23
24
25
26
27
28
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
Digital
Digital
Digital
Digital
Digital
Digital
Digital
Digital
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Configurable I/O
Configurable I/O
Configurable I/O
USB data plus
USB data minus
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
table 3
Configurable I/O
table 3
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
Configurable I/O
port, See table 3
port, See table 3
port, See table 3
port, See table 3
port, See table 3
port, See table 3
port, See table 3
port with 20mA driving capability, See
port with 20mA driving capability, See
port,
port,
port,
port,
port,
port,
port,
port,
See
See
See
See
See
See
See
See
table
table
table
table
table
table
table
table
3
3
3
3
3
3
3
3
Table 2: Terminal Descriptions
*) BLE112 is configurable as either SPI master or SPI slave
Silicon Labs
Page 9 of 33
PERIPHERAL /
FUNCTION
Analog Comparator
ADC
USART 0 SPI (**
USART 0 UART
USART 1 SPI (**
USART 1 UART
TIMER 1
TIMER 3
TIMER 4
P0
5
4
3
2
1
0
+
A7 A6 A5 A4 A3 A2 A1 A0
7
6
C
Alt.1
P1
7
6
3
2
1
0
2
P2
1
HARDWARE.XML Example (*
0
SS MO MI
<usart channel="0" mode="spi_master" alternate="1" ...
MO MI
C
SS
<usart channel="0" mode="spi_master" alternate="2" ...
RT CT TX RX
Alt.1
<usart channel="0" mode="uart" alternate="1" ...
TX RX RT CT
Alt.2
MI MO C
Alt.1
<usart channel="0" mode="uart" alternate="2" ...
SS
<usart channel="1" mode="spi_master" alternate="1" ...
MI MO C
Alt.2
SS
<usart channel="1" mode="spi_master" alternate="2" ...
RX TX RT CT
Alt.1
<usart channel="1" mode="uart" alternate="1" ...
RX TX RT CT
Alt.2
4
Alt.1
3
3
2
1
<usart channel="1" mode="uart" alternate="2" ...
0
<timer index="1" alternate="1" ...
4
0
1
Alt.1
Alt.2
4
(***
(***
Alt.2
Alt.2
5
1
1
2
<timer index="1" alternate="2" ...
0
<timer index="3" alternate="1" ...
0
<timer index="3" alternate="2" ...
1
Alt.1
0
<timer index="4" alternate="1" ...
0
Alt.2
DEBUG
OBSSEL
<timer index="4" alternate="2" ...
DC DD
5
4
3
2
1
0
*) Refer to Profile Toolkit Developer Guide for detailed settings
**) SS is the slave select signal when BLE113 is set as SPI slave. When set as SPI master, any available I/O can be used as chip select signal of
BLE113
***) The analog comparator and the ADC will be turned on automatically when taken in use and the configuration is done using API (Application
Programming Interface). Refer to Bluetooth Smart Software API Reference
Table 3:Peripheral I/O Pin Mapping
Silicon Labs
Page 10 of 33
2.1 I/O Ports
Each I/O port, except pins P1_0 and P1_1, can be configured as an input with either internal pull-up or pulldown, or tri-state. Pull-down or pull-up can only be configured to whole port, not individual pins. Unused I/O
pins should have defined level and not be floating. To avoid excessive leakage current P1_0 and P1_1 must
be configured either as outputs or as inputs using external pull-up or pull-down resistors. See the Profile
Toolkit developer guide for more information about the configuration. During reset the I/O pins are configured
as inputs with pull-ups. P1_0 and P1_1 are inputs but do not have pull-up or pull-down.
The pins configured as peripheral I/O signals do not have pull-up/pull-down capability, even if the peripheral
function is an input. In power modes PM1, PM2, and PM3, the I/O pins retain the I/O mode and output value
(if applicable) that was set when PM1/PM2/PM3 was entered. All the IO’s set as input must have an external
pull-up or pull-down resistor to avoid excessive leakage current.
2.2 UART
UART baud rate can be configured up 2 Mbps. See the Profile Toolkit developer guide for more information.
Following table lists commonly used baud rates for BLE112
Baud rate (bps)
Error (%)
2400
0.14
4800
0.14
9600
0.14
14 400
0.03
19 200
0.14
28 800
0.03
38 400
0.14
57 600
0.03
76 800
0.14
115 200
0.03
230 400
0.03
Table 4: Commonly used baud rates for BLE112
Silicon Labs
Page 11 of 33
2.3 Electrical Characteristics
2.4 Absolute Maximum Ratings
Note: These are absolute maximum ratings beyond which the module can be permanently damaged. These are not
maximum operating conditions. The maximum recommended operating conditions are in the table 6.
Rating
Storage Temperature
Min
-40
Max
85
Unit
°C
AVDD,DVDD, VDD_USB (*
-0.3
3.9
V
VSS-0.4
VDD+0.4
V
Max
85
3.6
Unit
°C
V
Other Terminal Voltages
*) All supply nets must have the same voltage
Table 5: Absolute Maximum Ratings
2.5 Recommended Operating Conditions
Rating
Operating Temperature Range
AVDD, DVDD, VDD_USB (*
Min
-40
2.0
*) Supply voltage noise should be less than 10mVpp. Excessive noise at the supply voltage will reduce the RF
performance.
Table 6: Recommended Operating Conditions
2.6 DC Characteristics
Parameter
Logic-0 input voltage
Logic-1 input voltage
Logic-0 input current
Logic-1 input current
I/O pin pull-up and pull-down resistors
Logic-0 output volatge, 4 mA pins
Logic-1 output voltage, 4 mA pins
Test Conditions
Min
Input equals 0V
Input equals VDD
2.5
-50
-50
Typ
Max
Unit
0.5
V
V
nA
nA
kΩ
V
V
50
50
20
Output load 4 mA
Outoput load 4 mA
0.5
2.4
For detailed I/O terminal characteristic and timings refer to the CC2540 datasheet available in
(http://www.ti.com/lit/ds/symlink/cc2540.pdf)
Silicon Labs
Page 12 of 33
2.7 Current Consumption
Power mode
Active mode TX 2 dBm
Active mode TX -2 dBm
Active mode TX -6 dBm
Active mode RX
Power mode 1
Power mode 2
Power mode 3
Min
Typ
Max
36
30
28
25
Unit
mA
mA
mA
mA
uA
uA
uA
235
0.9
0.4
Table 7: Current consumption of BLE112
36 mA
25 mA
0.9 uA
(Power mode 2)
7.6 mA
7.6 mA
0.9uA
(Power mode 2)
500 us
3.8 ms
Figure 2: Typical current consumption profile during advertising in slave mode
36 mA
25 mA
7.6 mA
0.9 uA
(Power mode 2)
7.6 mA
0.9 uA
(Power mode 2)
500 us
Figure 3: Typical current consumption profile during data connection in slave mode
Silicon Labs
Page 13 of 33
2.8 RF Characteristics
2.8.1 TX Power vs HW Configuration
Figure 4: TXP vs HW Configuration
2.8.2 Antenna characteristics
The antenna radiation pattern is depends on the mother board layout. Following characteristics are measured
from a test board based on the layout guide given in chapter 5.3.

Efficiency 33% (-4.8 dB)

Peak gain 0 dBi
Silicon Labs
Page 14 of 33
Figure 5: Radiation pattern of BLE112, top view
Figure 6: Radiation pattern of BLE112, front view
Silicon Labs
Page 15 of 33
Figure 7: Radiation pattern of BLE112, side view
Silicon Labs
Page 16 of 33
3 Physical Dimensions
Figure 8: Physical dimensions and pinout (top view)
Figure 9: Dimensions for the RF pin
Silicon Labs
Page 17 of 33
12.05 mm
Antenna
18.10 mm
U.fl
Figure 10: Physical dimensions (top view)
2.3 mm
2.1 mm
18.1 mm
Figure 11: Physical dimensions (side view)
Figure 12: Recommended land pattern for BLE112-A and BLE112-E
Silicon Labs
Page 18 of 33
4 Power-On Reset and Brownout Detector
BLE112 includes a power-on reset (POR), providing correct initialization during device power on. It also
includes a brownout detector (BOD) operating on the regulated 1.8-V digital power supply only. The BOD
protects the memory contents during supply voltage variations which cause the regulated 1.8-V power to drop
below the minimum level required by digital logic, flash memory, and SRAM. When power is initially applied,
the POR and BOD hold the device in the reset state until the supply voltage rises above the power-on-reset
and brownout voltages.
Silicon Labs
Page 19 of 33
5 Design Guidelines
5.1 General Design Guidelines
BLE112 can be used directly with a coin cell battery. Due to relatively high internal resistance of a coin cell
battery it is recommended to place a 100uF capacitor in parallel with the battery. The internal resistance of a
coin cell
battery is initially 5in the range of 10 ohms
but the resistance
increases rapidly
as the capacity is1 used.
6
4
3
2
Basically the higher the value of the capacitor the higher is the effective capacity of the battery and thus the
longer the life time for the application. The minimum value for the capacitor depends on the end application
and the maximum transmit power used. The leakage current of a 100uF capacitor is in the range of 0.5 uA to
3 uA and generally ceramic capacitors have lower leakage current than tantalum or aluminum electrolytic
capacitors.
REVISION RECORD
L TR
D
ECO NO:
APPROVED:
DATE:
D
Optionally TI’s TPS62730 can be used to reduce the current consumption during TX/RX and data processing
stages. TPS62730 is an ultra low power DC/DC converter with by-pass mode and will reduce the current
consumption during transmission nominally by ~20% when using 3V coin cell battery.
A ferrite bead is recommended to be used to filter any excessive noise in the power supply lines to guarantee
the radio performance.
C
C
OPTIONAL DC/DC
VBAT
2 V...3 V3 _ SW
MOD2
6
VIN
2 .2 u F/1 0 V/X5 R
TPS62730
GN D
ON/BYP
P1 _ 7 /DCDC
6
P2 _ 2
P2 _ 1
C3
STAT
1
1 u F/1 6 V/X5 R
C1 1
BLE112-A
1
2
3
4
5
6
7
8
9
10
11
12
13
2
4
5
C1 5
1 0 0 u F/6 .3 V/X5 R
4
2 .2 µH± 2 0 % , 1 3 0 m A, 0 .4 3 o h m
SW
VOUT
C1 0
L1
5
U5
3
P1 _ 7 /DCDC
2 .2 u F/1 0 V/X5 R
1
GND
AVDD
AVDD
P2_2
P2_1
P2_0
P1_7
P1_6
DVDD_USB
GND
USB+
USBP1_5
1
P2 _ 2
GND
RESET
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
30
29
28
27
26
25
24
23
22
1
2
4
5
6
P2 _ 1
REVI SI O N RECO RD
LTR
ECO NO :
APPRO VED:
910
HEADER_ 2 X5 _ SM D_ 1 .2 7 M M
PROGRAMMING INTERFACE
14
15
16
17
18
19
20
21
1 u F/1 6 V/X5 R
2
3
78
RESET_ N
RESET_ N
P1_4
P1_3
P1_2
P1_1
P1_0
P0:7
D VD D
GN D
C6
U4
BATTERYHOLDER_SMD_CR2032
J1
3
2
D
C5
1 u F/1 6 V/X5 R
B
B
Figure 13: Example schematic for BLE112 with a coin cell battery
MCP1700T- 3302E/ T
CO N- MI NI USB- SO CKET- SMD
P1
L4
FB 1kohm
2
C 32
2. 2uF/ 10V / X 5R
VO UT
GN D
VI N
1
C 31
3
2. 2uF/ 10V / X 5R
1
2
3
4
5
0. 47uF/ 6. 3V / X 5R
9
8
7
6
C
VBUS
DD+
NC
G ND
C 20
J10
MO D3
C7
1uF/ 16V/ X5R
A
DRAWN:DATED:
C9
BLE112- A
G ND
AVDD
AVDD
P2_2
P2_1
P2_0
P1_7
P1_6
DVDD_USB
G ND
USB+
PR
USB-A
P1_5
COM PANY:
30
G ND
29
RESET
28
P0_0
27
P0_1
26
P0_2
25
P0_3
24
P0_4
23
1 2 .0 4 .2
0
1
1
P0_5
22
P0_6
A
RESET
TITL E:
BLE112 Evaluation Board
P 1_4
P 1_3
P 1_2
P 1_1
P 1_0
P 0: 7
DV DD
GN D
1uF/ 16V/ X5R
1
2
3
4
5
6
7
8
9
10
11
12
13
CHECKED:
DATED:
CODE:
-
14
15
16
17
18
19
20
21
QUAL ITY CONTROL :DATED:
REL EASED:
SIZE:
DRAWING NO:
-C1.0
REV:
-
DATED:
C8
SCAL E:
SHEET:
1OF3
2
1uF/ 16V/ X5R
R15
1
1. 5K, 50V, 0. 063W
B
R13
1
2
33R, 50V, 0. 063W
R14
1
2
33R, 50V, 0. 063W
C127
47pF/ 50V/ C0G
C128
47pF/ 50V/ C0G
Figure 14: Example schematic for BLE112 with USB
CO MPANY:
A
TI TLE:
BLE112 Evaluation Board
DRAWN: DATED:
P RA
CHECKED:
12.04.2011
DATED:
CO DE:
--
Silicon Labs
Q UALI TY CO NTRO L: DATED:
RELEASED:
-
SI ZE:
DRAWI NG NO :
C-1.0
DATED:
SCALE:
Page 20 of 33
SHEET:
23
O
F
•
path for the return current is cut
MIC input
– Place LC filtering and DC coupling capacitors symmetrically as close to
pins as possible
–5.2 Place
biasing
LayoutMIC
Guide
Lines resistors symmetrically as close to microhone as pos
–Use Make
sure that the bias trace does not cross separated GND regions (D
good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog
signal
traces. If using
vias current
separated byis
max
3 mmIftothis
avoid is
emission
AGND)
so overlapping
that theground
pathplanes
for use
thestitching
return
cut.
not possibl
from the edges of the PCB. Connect all the GND pins directly to a solid GND plane and make sure that there
notimpedance
separate
GND
regions
but keep
one
solidtraces
GND
plane.
is a low
path for
the return
current following
the signal
and supply
all the
way from start to
the end.
–A good
Keep
the trace as short as possible
practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to
supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This
arrangement will make sure that any return current follows the forward current as close as possible and any
loops are minimized.
Recommended PCB layer configuration
Signals
GND
Power
Signals
Figure 15: Typical 4-layer PCB construction
Overlapping GND layers without
GND stitching vias
Overlapping GND layers with
GND stitching vias shielding the
RF energy
Figure 16: Use of stitching vias to avoid emissions from the edges of the PCB
5.3 BLE112-A Layout Guide
For optimal performance of the antenna place the module at the corner of the PCB as shown in the Figure 17.
Do not place any metal (traces, components, battery etc.) within the clearance area of the antenna. Connect
all the GND pins directly to a solid GND plane. Place the GND vias as close to the GND pins as possible. Use
good layout practices to avoid any excessive noise coupling to signal lines or supply voltage lines. Avoid
placing plastic or any other dielectric material closer than 5 mm from the antenna. Any dielectric closer than 5
mm from the antenna will detune the antenna to lower frequencies.
Silicon Labs
Page 21 of 33
T
Figure 17: Recommended layout for BLE112-A
Copper clearance area
Copper clearance area
Figure 18: Layout examples for BLE112
5.4 BLE112-N Layout Guide
Use 50 ohm transmission line to trace the signal from RF pin to an external RF connector. Figure 19 shows a
layout example for BLE112-N with an external SMA connector.
Silicon Labs
Page 22 of 33
Board edge
GND contact for the
RF trace
50 ohm trace
GND stitching vias
separated by max 3 mm
SMA connector
Figure 19: Example layout for BLE112-N
A transmission line impedance calculator, such as TX-Line made by AWR, can be used to approximate the
dimensions for the 50 ohm transmission line. Figure 20 shows an example for two different 50 ohm
transmission lines.
Silicon Labs
Page 23 of 33
CPW Ground
W = 0.15 mm G = 0.25 mm
RF GROUND
Prepreg, εr = 3.7
RF GROUND
h = 0.076 mm
RF GROUND
FR4, εr = 4.6
GND stitching vias
MICROSTRIP
W = 1.8 mm
FR4, εr = 4.6
h = 1 mm
RF GROUND
Figure 20: Example cross section of two different 50 ohm transmission line
5.5 Design Check List

Antenna is placed at the edge of a PCB, preferably to a corner

Antenna has sufficient clearance area around it and it is not covered by metal

All the GND pins are connected to a solid GND plane

All the IOs are in a known state and there are no leakage paths from the IOs
o UART and SPI inputs must have external pull-up or pull-down
o P1_0 and P1_1 must have either external pull-up or pull-down or configured as output

TX power is set not higher than required for each application

By-pass capacitor (47 uF… 100uF) is placed parallel with a coin cell battery to compensate the high
series resistance of a coin cell

Current test point is placed to measure the sleep current
Silicon Labs
Page 24 of 33
6 Soldering Recommendations
BLE112 is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is
dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and
particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations.
Bluegiga Technologies will give following recommendations for soldering the module to ensure reliable solder
joint and operation of the module after soldering. Since the profile used is process and layout dependent, the
optimum profile should be studied case by case. Thus following recommendation should be taken as a
starting point guide.
-
Refer to technical documentations of particular solder paste for profile configurations
-
Avoid using more than one flow.
-
Reliability of the solder joint and self-alignment of the component are dependent on the solder volume.
Minimum of 150m stencil thickness is recommended.
-
Aperture size of the stencil should be 1:1 with the pad size.
-
A low residue, “no clean” solder paste should be used due to low mounted height of the component.
Silicon Labs
Page 25 of 33
7 Block diagram
BLE112 is based on TI’s CC2540 chip. Embedded 32 MHz and 32.678 kHz crystals are used for clock
generation. Matched balun and low pass filter provide optimal radio performance with extremely low spurious
emissions. Small ceramic chip antenna gives good radiation efficiency even when the module is used in
layouts with very limited space.
32 MHz
XTAL
32.768
kHz XTAL
Clock
2V – 3.6V
Reset
Voltage regulator
CC2540
Reset
Debug interface
Power-on reset
SRAM
8051 CPU core and memory arbitrator
Flash
Analog comparator
I/O controller
I/O
IRQ controller
DMA
OPAMP
Radio arbiter
Radio registers
Link layer engine
SRAM
ADC
Demodulator
Synth
Modulator
USB
USART 0
USART 1
TIMER 1
Receive
Frequency
synthetisizer
Transmit
TIMER 2
TIMER 3
Balun +
LPF
TIMER 4
Ant
Figure 21: Simplified block diagram of BLE112
CPU and Memory
The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access buses (SFR,
DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit.
The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the physical
memories and all peripherals through the SFR bus. The memory arbiter has four memory-access points,
access of which can map to one of three physical memories: an SRAM, flash memory, and XREG/SFR
registers. It is responsible for performing arbitration and sequencing between simultaneous memory accesses
to the same physical memory.
The SFR bus is a common bus that connects all hardware peripherals to the memory arbiter. The SFR bus
also provides access to the radio registers in the radio register bank, even though these are indeed mapped
into XDATA memory space.
Silicon Labs
Page 26 of 33
The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is
an ultralow-power SRAM that retains its contents even when the digital part is powered off (power modes 2
and 3).
The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device,
and maps into the CODE and XDATA memory spaces.
Peripherals
Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise
programming.
A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA
memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode,
addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that
can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs,
timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data
transfers between a single SFR or XREG address and flash/SRAM.
Each CC2540 contains a unique 48-bit IEEE address that can be used as the public device address for a
Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth
specification.
The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which
is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the
device is in a sleep mode (power modes 1 and 2) by bringing the CC2540 back to the active mode.
The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging.
Through this debug interface, it is possible to erase or program the entire flash memory, control which
oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core,
set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible
to perform in-circuit debugging and external flash programming elegantly.
The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral
modules control certain pins or whether they are under software control, and if so, whether each pin is
configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral
that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various
applications.
The sleep timer is an ultra low power timer that uses an external 32.768-kHz crystal oscillator. The sleep timer
runs continuously in all operating modes except power mode 3. Typical applications of this timer are as a realtime counter or as a wake-up timer to exit power modes 1 or 2.
A built-in watchdog timer allows the CC2540 to reset itself if the firmware hangs. When enabled by software,
the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out.
Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit
period value, and five individually programmable counter/capture channels, each with a 16-bit compare value.
Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input
signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is
ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction.
Timer 2 is a 40-bit timer used by the Bluetooth low energy stack. It has a 16-bit counter with a configurable
timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have
transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is
received/transmitted or the exact time at which transmission ends. There are two 16-bit timer-compare
registers and two 24-bit overflow-compare registers that can be used to give exact timing for start of RX or TX
to the radio or general interrupts.
Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable
prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of
the counter channels can be used as PWM output.
Silicon Labs
Page 27 of 33
USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double
buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex
applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers
free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly
instead of using some oversampling scheme, and are thus well-suited for high data rates.
The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with
128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware
support for CCM.
The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz,
respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The
inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a
single-ended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC
can automate the process of periodic sampling or conversion over a sequence of channels.
The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog
signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator
output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin
interrupt.
RF front end
RF front end includes combined matched balun and low pass filter, and ceramic chip antenna with matching
network. Optimal matching combined with effective low pass filter provides extremely low in-band spurious
emissions and harmonics. Optionally as a module assembly variant RF can be traced either to an embedded
u.fl connector or to the RF pin of the module.
Silicon Labs
Page 28 of 33
8 Certifications
BLE112 is compliant to the following specifications.
8.1 Bluetooth
BLE112 Bluetooth low energy module is Bluetooth qualified and listed as a controller subsystem and it is
Bluetooth compliant to the following profiles of the core spec version v.4.0:

RF PHY

HCI

LL
The maximum antenna gain specified for BLE112 is 2.3 dBi. Bluetooth qualification is valid for any antenna
with gain less than 2.3 dBi.
8.2 FCC and IC
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) this device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that may
cause undesired operation.
FCC RF Radiation Exposure Statement:
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End
users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter
must not be co-located or operating in conjunction with any other antenna or transmitter.
IC Statements:
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the
following two conditions: (1) this device may not cause interference, and (2) this device must accept any
interference, including interference that may cause undesired operation of the device.
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and
maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio
interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically
radiated power (e.i.r.p.) is not more than that necessary for successful communication.
If detachable antennas are used:
This radio transmitter (identify the device by certification number, or model number ifCategory II) has been
approved by Industry Canada to operate with the antenna types listed below with the maximum permissible
Silicon Labs
Page 29 of 33
gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list,
having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this
device. See Table 8 for the approved antennas for BLE112.
OEM Responsibilities to comply with FCC and Industry Canada Regulations
The BLE112 module has been certified for integration into products only by OEM integrators under the
following condition:

The transmitter module must not be co-located or operating in conjunction with any other antenna or
transmitter.
As long as the condition above is met, further transmitter testing will not be required. However, the OEM
integrator is still responsible for testing their end-product for any additional compliance requirements required
with this module installed (for example, digital device emissions, PC peripheral requirements, etc.).
IMPORTANT NOTE: In the event that these conditions can not be met (for certain configurations or colocation with another transmitter), then the FCC and Industry Canada authorizations are no longer considered
valid and the FCC ID and IC Certification Number can not be used on the final product. In these
circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the
transmitter) and obtaining a separate FCC and Industry Canada authorization.
End Product Labeling
The BLE112 module is labeled with its own FCC ID and IC Certification Number. If the FCC ID and IC
Certification Number are not visible when the module is installed inside another device, then the outside of the
device into which the module is installed must also display a label referring to the enclosed module. In that
case, the final end product must be labeled in a visible area with the following:
“Contains Transmitter Module FCC ID: QOQBLE112”
“Contains Transmitter Module IC: 5123A-BGTBLE112”
or
“Contains FCC ID: QOQBLE112
“Contains IC: 5123A-BGTBLE112”
The OEM of the BLE112 module must only use the approved antenna(s) listed in Table 8, which have been
certified with this module.
The OEM integrator has to be aware not to provide information to the end user regarding how to install or
remove this RF module or change RF related parameters in the user manual of the end product.
8.2.1 FCC et IC
Déclaration d’IC :
Ce dispositif est conforme aux normes RSS exemptes de licence d’Industrie Canada. Son fonctionnement est
assujetti aux deux conditions suivantes : (1) ce dispositif ne doit pas provoquer de perturbation et (2) ce
Silicon Labs
Page 30 of 33
dispositif doit accepter toute perturbation, y compris les perturbations qui peuvent entraîner un fonctionnement
non désiré du dispositif.
Selon les réglementations d’Industrie Canada, cet émetteur radio ne doit fonctionner qu’avec une antenne
d’une typologie spécifique et d’un gain maximum (ou inférieur) approuvé pour l’émetteur par Industrie
Canada. Pour réduire les éventuelles perturbations radioélectriques nuisibles à d’autres utilisateurs, le type
d’antenne et son gain doivent être choisis de manière à ce que la puissance isotrope rayonnée équivalente
(P.I.R.E.) n’excède pas les valeurs nécessaires pour obtenir une communication convenable.
Si des antennes amovibles sont utilisées :
Cet émetteur radio (identifier le dispositif à l’aide de son numéro de certification ou de son numéro de modèle
s’il appartient à la Catégorie II) a été approuvé par Industrie Canada pour fonctionner avec les types
d’antenne énumérés ci-dessous, avec le gain admissible maximum et l’impédance d’antenne requise pour
chaque type d’antenne indiqué. Les types d’antennes qui ne figurent pas dans cette liste ont un gain supérieur
au gain maximum indiqué pour ce type ; il est donc strictement défendu de les utiliser avec ce dispositif.
Consulter le tableau 8 pour découvrir les antennes approuvées pour BLE112.
Responsabilités des OEM quant à la conformité avec les réglementations de FCC et d’Industrie
Canada
Le module BLE112 a été certifié pour être intégré à des produits fabriqués uniquement par les intégrateurs
OEM dans les conditions suivantes :Le module de l’émetteur ne doit pas être situé près d’une autre antenne
ou d’un autre émetteur ni ou fonctionner conjointement avec ceux-ci.
Dans la mesure où cette condition est observée, il ne sera pas nécessaire de soumettre l’émetteur à des
essais supplémentaires. Cependant, l’intégrateur OEM est chargé de tester son produit final pour s’assurer
qu’il respecte toutes les autres exigences de conformité requises avec ce module installé (par exemple :
émissions du dispositif numérique, exigences périphériques de l’ordinateur, etc.).
REMARQUE IMPORTANTE : En cas d’inobservance de ces conditions (en ce qui concerne certaines
configurations ou l’emplacement du dispositif à proximité d’un autre émetteur), les autorisations de FCC et
d’Industrie Canada ne seront plus considérées valables et l’identification de FCC et le numéro de certification
d’IC ne pourront pas être utilisés sur le produit final. Dans ces cas, l’intégrateur OEM sera chargé d’évaluer à
nouveau le produit final (y compris l’émetteur) et d’obtenir une autorisation indépendante de FCC et
d’Industrie Canada.
Étiquetage du produit final
Le module BLE112 est étiqueté avec sa propre identification FCC et son propre numéro de certification IC. Si
l’identification FCC et le numéro de certification IC ne sont pas visibles lorsque le module est installé à
l’intérieur d’un autre dispositif, la partie externe du dispositif dans lequel le module est installé devra
également présenter une étiquette faisant référence au module inclus. Dans ce cas, le produit final devra être
étiqueté sur une zone visible avec les informations suivantes :
« Contient module émetteur identification FCC : QOQBLE112 »
« Contient module émetteur IC : 5123A-BGTBLE112 »
ou
« Contient identification FCC : QOQBLE112 »
« Contient IC : 5123A-BGTBLE112 »
Silicon Labs
Page 31 of 33
L’OEM du module BLE112 ne doit utiliser que la ou les antennes approuvées énumérées dans le tableau 8,
qui ont été certifiées avec ce module.
Dans le guide d’utilisation du produit final, l’intégrateur OEM doit s’abstenir de fournir des informations à
l’utilisateur final portant sur les procédures à suivre pour installer ou retirer ce module RF ou pour changer les
paramètres RF.
8.3 CE
BLE112 is in conformity with the essential requirements and other relevant requirements of the R&TTE
Directive (1999/5/EC). The official DoC is available at www.bluegiga.com
8.4 MIC Japan
BLE112 has type approval with certification ID R 209- J00046
8.5 KCC (Korea)
BLE112 is KCC certified with following certification numbers
BLE112-A: KCC-CRM-BGT-BLE112-A
BLE112-E: KCC-CRM-BGT-BLE112-E
BLE112-N: KCC-CRM-BGT-BLE112-N
8.6 Qualified Antenna Types for BLE112-E and BLE112-N
This device has been designed to operate with a standard 2.14 dBi dipole antenna. Any antenna of the same
type and the same or less gain can be used without additional application to FCC. Table 8 lists approved
antennas for BLE112. Any approved antenna listed in table 8 can be used directly with BLE112 without any
additional approval. Any antenna not listed in table 8 can be used with BLE112 as long as detailed information
from that particular antenna is provided to Bluegiga for approval. Specification of each antenna used with
BLE112 will be filed by Bluegiga. Please, contact [email protected] for more information.
Item
1
2
3
4
5
Manufacturer
Pulse
Linx Technologies Inc
EAD
Antenova
Litecon
Manufacturers part number
W1030
ANT-2.4-CW-CT-SMA
EA-79A
B4844/B6090
CAR-ATR-187-001
Measure
d Gain
(dBi)
1
1.3
0.4
1.4
0.8
Specifie
d Gain
(dBi)
2 dBi
2 dBi
2 dBi
2 dBi
2 dBi
Measure Total
Efficiency (%)
70 - 80
77
60
76 - 82
60 - 70
Table 8: Approved Antennas For BLE112-E and BLE112-N
Silicon Labs
Page 32 of 33
9 Contact Information
Sales:
www.bluegiga.com
Technical Support:
www.bluegiga.com/support
Orders:
[email protected]
WWW:
www.bluegiga.com
SILICON LABS
Phone: +1 877.444.3032
400 West Cesar Chavez
Austin, TX 78701 USA
FINLAND OFFICE
Phone: +358 9 435 5060
Fax: +358 9 435 50660
Sinikalliontie 5A, 5th floor
02630 Espoo, Finland
Silicon Labs
Page 33 of 33
Similar pages