Data Sheet

DISCRETE SEMICONDUCTORS
DATA SHEET
BSP220
P-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
FEATURES
QUICK REFERENCE DATA
• Low RDS(on)
SYMBOL
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
P-channel enhancement mode
vertical D-MOS transistor in a
miniature SOT223 envelope and
intended for use in relay, high-speed
and line transformer drivers.
PINNING - SOT223
PIN
PARAMETER
CONDITIONS
gate
2
drain
3
source
−VDS
drain-source voltage
200
V
drain current
DC value
225
mA
RDS(on)
drain-source on-resistance
−ID = 200 mA
−VGS = 10 V
12
Ω
−VGS(th)
gate-source threshold
voltage
2.8
V
PIN CONFIGURATION
4
handbook, halfpage
d
g
1
Top view
2
3
s
MAM121
drain
Fig.1 Simplified outline and symbol.
April 1995
MAX. UNIT
−ID
DESCRIPTION
1
4
BSP220
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
−VDS
drain-source voltage
−
200
V
±VGSO
gate-source voltage
open drain
−
20
V
−ID
drain current
DC value
−
225
mA
−IDM
drain current
peak value
−
600
mA
Ptot
total power dissipation
up to Tamb = 25 °C (note 1)
−
1.5
W
Tstg
storage temperature range
−65
150
°C
Tj
junction temperature
−
150
°C
Note
1. Device mounted on an epoxy printed-circuit board 40 x 40 x 1.5 mm; mounting pad for the drain lead minimum 6 cm2.
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
from junction to ambient (note 1)
VALUE
83.3
UNIT
K/W
Note
1. Device mounted on an epoxy printed-circuit board 40 x 40 x 1.5 mm; mounting pad for the drain lead minimum 6 cm2.
April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
−V(BR)DSS
drain-source breakdown voltage
−ID = 10 µA
VGS = 0
200
−
−
V
−IDSS
drain-source leakage current
−VDS = 160 V
VGS = 0
−
−
1
µA
±IGSS
gate-source leakage current
±VGS = 20 V
VDS = 0
−
−
100
nA
−VGS(th)
gate-source threshold voltage
−ID = 1 mA
VGS = VDS
0.8
−
2.8
V
RDS(on)
drain-source on-resistance
−ID = 200 mA
−VGS = 10 V
−
10
12
Ω
 Yfs
transfer admittance
−ID = 200 mA
−VDS = 25 V
100
200
−
mS
Ciss
input capacitance
−VDS = 25 V
VGS = 0
f = 1 MHz
−
65
90
pF
Coss
output capacitance
−VDS = 25 V
VGS = 0
f = 1 MHz
−
20
30
pF
Crss
feedback capacitance
−VDS = 25 V
VGS = 0
f = 1 MHz
−
6
15
pF
Switching times (see Figs 2 and 3)
ton
turn-on time
−ID = 250 mA
−VDD = 50 V
−VGS = 0 to 10 V
−
5
20
ns
toff
turn-off time
−ID = 250 mA
−VDD = 50 V
−VGS = 0 to 10 V
−
20
30
ns
April 1995
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
VDD = −50 V
handbook, halfpage
BSP220
handbook, halfpage
10 %
INPUT
90 %
10 %
0V
ID
−10 V
OUTPUT
50 Ω
90 %
MBB689
ton
toff
MBB690
Fig.2 Switching time test circuit.
handbook,
Fig.3 Input and output waveforms.
MBB693
2
MDA706
−1
VGS = −10 V
handbook, halfpage
Ptot
(W)
1.6
ID
(A)
−0.8
1.2
−0.6
0.8
−0.4
−6 V
−5 V
−4 V
−0.2
0.4
−3 V
0
0
50
100
0
150
200
Tamb (°C)
0
−10
−15
−20
−25
VDS (V)
Fig.5 Typical output characteristics; Tj = 25 °C.
Fig.4 Power derating curve.
April 1995
−5
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
MDA707
−1
BSP220
−103
handbook, halfpage
handbook, halfpage
ID
(A)
−0.8
MDA708
VGS = −10 V
−5 V
ID
(mA)
−4 V
−0.6
−102
−0.4
−0.2
0
−2
0
−4
−6
−10
−8
−10
VGS (V)
Typical transfer characteristic; −VDS = 10 V;
Tj = 25 °C.
Fig.6
8
Fig.7
16
12
20
24
28
RDSon (Ω)
Typical on-resistance as a function of drain
current; Tj = 25 °C.
MDA734
160
MDA710
2.5
handbook, halfpage
handbook, halfpage
C
(pF)
k
2
120
1.5
80
Ciss
1
40
0.5
Coss
Crss
0
0
−5
−10
−15
0
−50
−20
−25
VDS (V)
Fig.9
Fig.8
April 1995
Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25 °C.
0
50
100
Tj (°C)
Temperature coefficient of drain-source
on-resistance;
R DS ( on ) at T j
k = ---------------------------------------------- ;
R DS ( on ) at 25 °C
typical RDS(on) at −200 mA/−10 V.
6
150
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
MDA711
1.1
handbook, halfpage
k
1
0.9
0.8
0.7
−50
0
50
100
Tj (°C)
150
Fig.10 Temperature coefficient of gate-source
threshold voltage;
V GS ( th ) at T j
k = --------------------------------------------- ;
V GS ( th ) at 25 °C
typical -VGS(th) at -1 mA.
April 1995
7
BSP220
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
96-11-11
97-02-28
SOT223
April 1995
EUROPEAN
PROJECTION
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP220
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
10
BSP220
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
11
BSP220
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SCA54
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137107/00/01/pp12
Date of release: April 1995
Document order number:
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