MP100 Offline Inductor-less Regulator For Low Power Applications The Future of Analog IC Technology DESCRIPTION FEATURES The MP100 is a compact, inductor-less, goodefficiency, off-line regulator. It steps down the AC line voltage to an adjustable DC output. It is a simple solution to provide a bias voltage to ICs in off-line applications. Its integrated smartcontrol system uses AC line power only when necessary, thus minimizing device losses to achieve good efficiency. This device can help system designs meet new standby power specifications. • • • • • • • • The MP100 provides various protections, such as over-current protection, short-circuit protection, VD over-voltage protection, VD under-voltage lockout, and thermal shutdown. • • The MP100 is available in a SOIC8E package. Universal AC Input (85VAC-to-305VAC) Smart Control to Maximize Efficiency Adjustable Output Voltage from 1.5V to 15V Low Component Count and Cost Thermal Shutdown Protection Short-Circuit Protection Provide Power-Good Signal No Bulk Capacitor Required APPLICATIONS • Wall Switches and Dimmers AC/DC Power Supply for Wireless System, like ZigBee,Z-Wave and so on Standby Power for General Off-Line Applications All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Output Power vs. VIN Full Bridge Rectifier 600 POUT(mW) 500 VOUT=12V 400 300 VOUT=5V 200 100 0 VOUT=3.3V 80 110 140 170 200 230 260 290 320 VIN(V) MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 1 MP100 – OFFLINE INDUCTOR-LESS REGULATOR ORDERING INFORMATION Part Number * Package Top Marking MP100GN SOIC8E MP100 * For Tape & Reel, add suffix –Z (e.g. MP100GN–Z); PACKAGE REFERENCE TOP VIEW PG 1 8 VIN GND 2 7 NC FB 3 6 VB VOUT 4 5 VD EXPOSED PAD ON BACKSIDE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN ................................................. -1V to 750V VOUT ............................................ -0.3V to 30V VB,VD .......................................... -0.3V to 35V FB .............................................. -0.3V to 6.5V PG ................................................ -0.3V to 14V (2) Continuous Power Dissipation (TA = +25°C) SOIC8E.....................................................2.5W Junction Temperature.............................. 150°C Lead Temperature ................................... 260°C Storage Temperature............... -55°C to +150°C SOIC8E ..................................50 ...... 10 ...°C/W Recommended Operating Conditions (3) (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. 50/60Hz AC RMS Voltage ............. 85V to 305V VB ,VD .............................................. 8V to 30V Operating Junction Temp. (TJ) -40°C to +125°C MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 2 MP100 – OFFLINE INDUCTOR-LESS REGULATOR ELECTRICAL CHARACTERISTICS TA = +25°C, unless otherwise noted. Parameter Input Voltage Supply (Pin VIN) Input Voltage Symbol Min Typ VIN Input Supply Quiescent Current IINQS Input Voltage Threshold Fast Input Voltage Threshold Fast Hysteresis Input Voltage Threshold Slow Input Voltage Threshold Slow Hysteresis MOSFET ON Resistance Energy Store Section (Pin VD) VD Peak-Voltage Limit VD UVLO Output Enable VD Threshold Active Bleeder VD Threshold off Hysteresis Bleeder Current Adjustable Output Voltage (Pin VOUT) Vo Regulated Voltage Output Current Limit VTHVINFAST VTHVINFASTHYS VTHVINSLOW VTHVINSLOWHYS Rdson VD=30V, VIN=60V,No Load 32 Vo IOLMT (5) (7) (8) V 20 μA 38 V V V V 27 32 2 9.5 VIN=20V 27 6.3 13.2 13.2 Ω 32.5 7.4 17.5 17.5 V V V V V μA 12.4 270 V mA 1.3 240 VD=30V,Io=40mA 11.5 120 VD=15V to 30V, Io=100μA VD=30V, Io=100μA to 40mA Io=40mA Io=40mA f=10Hz to 60kHz, VD=20V,CVD=1μF, COUT=4.7μF 12 0.08 % 0.75 1.069 V mA <60 dB TOTP 160 °C THYS 20 °C PSRR Over-Temperature–Protection Threshold Over-Temperature–Protection Threshold Hysteresis Output Voltage Feedback (Pin FB) Reference Voltage Power-Good Signal (Pin PG) Power-Good Pull Down Current Power-Good Threshold Power-Good Hysteresis Power-Good Delay 700 % VDROP IG Power-Supply Ripple Rejection Unit 0.06 (6) Dropout Voltage Ground Pin Current Max 3.5 VDLMT VDUVLO VDTHOUT VDTHBLEEDER VDTHOUTHYS IBLEED Line Regulation Load Regulation Conditions VREF 1.204 IPG VTHPG VHYSPG τDELAYPG 1.235 1.266 1.77 1 170 1.239 65 235 280 V mA V mV μs Notes: 5) Line Regulation = VOUT ⎡ V ⎣ ⎤ IN(MAX ) ⎦ − VOUT ⎡ V ⎣ ⎤ IN(MIN) ⎦ VOUT(NORM) 6) Load Regulation = VOUT ⎡I ⎤ ⎣ OUT (MAX) ⎦ − VOUT⎡I × 100 (% ) ⎤ ⎣ OUT(MIN) ⎦ VOUT(NORM) ×100 (%) 7) The dropout voltage is defined as VIN-VOUT 8) Guarantee by design MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 3 MP100 – OFFLINE INDUCTOR-LESS REGULATOR TYPICAL CHARACTERISTICS VIN=230VAC, VOUT=12V, IOUT=10mA, CVD=220μF/35V, TA=+25°C, unless otherwise noted. 14 1.236 36 35 10 1.235 1.235 8 1.235 6 1.235 4 1.235 1.235 -50 -25 0 0 -50 -25 25 50 75 100 125 150 Input Voltage Threshold Slow vs. Temperature 30.0 Ground Pin Current vs. Load Current 1.2 12.6 0.8 12.2 0.6 12.0 0 10 20 30 11.4 -50 -25 40 IG (mA) 100 12.6 0 25 50 75 100 125 150 -50 Unstable Range 12.4 -60 -70 12.2 10 12 Bd OUTPUT VOLTAGE (V) 0 Region of Stable Cout ESR vs. Load Current Output Voltage vs. Output Load Stable Range 11.8 -80 -90 -100 11.6 11.4 11.8 11.6 0.2 25 50 75 100 125 150 0 25 50 75 100 125 150 Output Voltage vs. Temperature 12.4 0.4 0 32 1.0 28.5 28.0 -50 -25 33 30 -50 -25 0 25 50 75 100 125 150 29.5 29.0 34 31 2 1.235 VOUT (V) VREF (V) Input Voltage Threshold Fast vs. Temperature 12 1.236 VTHVINSLOW (V) Input Supply Quiescent Current vs. Temperature VTHVINFAST (V) 1.236 Reference Voltage vs. Temperature 0 5 10 15 20 25 30 LOAD CURRENT (mA) MP100 Rev. 1.04 1/23/2014 35 1 0 10 20 30 40 -110 10 20 50100200 5001k 2k 5k 10k 20k 60k LOAD CURRENT (mA) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. Hz 4 MP100 – OFFLINE INDUCTOR-LESS REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN=230VAC, VOUT=12V, IOUT=10mA, CVD=220μF/35V, TA=+25°C, unless otherwise noted. Input Power Start up Input Power Shut down Steady State VIN 100V/div. VIN 100V/div. VIN 100V/div. VD 5V/div. VOUT 5V/div. IIN 1A/div. VD 5V/div. VOUT 5V/div. IIN 1A/div. VD 5V/div. VOUT 5V/div. IIN 1A/div. Over Current Protection Entry Over Current Protection Recovery Short Circuit Protection Entry VIN 100V/div. VIN 100V/div. VIN 100V/div. VD 5V/div. VOUT 5V/div. IOUT 100mA/div. VD 5V/div. VOUT 5V/div. IOUT 100mA/div. VD 5V/div. VOUT 5V/div. IOUT 200mA/div. Short Circuit Protection Recovery VIN 100V/div. VD 5V/div. VOUT 5V/div. IOUT 200mA/div. MP100 Rev. 1.04 1/23/2014 Output Voltage Ripple Load Transient VOUT 10mV/div. VOUT 10mV/div. IOUT 10mA/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 5 MP100 – OFFLINE INDUCTOR-LESS REGULATOR PIN FUNCTIONS Pin # Name 1 PG 2 GND 3 FB 4 Description Power Good. Requires an external pull-up resistor because it is an open drain. When VOUT reaches 80% of its normal output voltage, PG goes high after a 200µs delay. Ground. Output Voltage Feedback. Connect to a capacitor to VOUT to improve low dropout stability. Connect to the tap of a resistor divider to adjust the output voltage. VOUT Output Voltage. 5 VD Energy Storage. Connect to GND with a capacitor to buffer energy for the low drop-out stage. 6 VB Connect with VD directly. 7 NC Not Connected. 8 Exposed Pad VIN Input Voltage Supply. Provides energy when the voltage falls within the charging window. Not Connected. Connect to a large copper surface connected to GND to enhance thermal dissipation. MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 6 MP100 – OFFLINE INDUCTOR-LESS REGULATOR BLOCK DIAGRAM Power Management PG VIN Charging Window Power Good Circuit Main Device Active Bleeder GND Thermal Protection VD OVP FB Output Current Limit VOUT Output Current Sense VB Regulator VD Figure 1: Functional Block Diagram MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 7 MP100 – OFFLINE INDUCTOR-LESS REGULATOR OPERATION MP100 employs a smart inductor-less regulator design (patent pending) to charge the VD capacitor (C1 in Figure 4) from the offline AC input, and then to deliver the stored energy to the load with a stable output voltage. When VIN is less than its 35V threshold, VD can be charged up by up to 1.8A input current. An internal LDO regulates VOUT to 12V and can supply up to 10mA load when VIN is between 85VAC and 305VAC. The proprietary design allows the universal AC input to efficiently power the IC directly. will continue until the output short condition ceases. Startup During the startup, the internal switch connected between VIN and VB turns on when the input voltage is within its charging window (typically below 35V), thus gradually charging the VD voltage. The LDO will not resume with a softstart until the VD voltage reaches 15.3V. Thermal Shutdown Protection Accurate temperature protection prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 160°C, the whole chip shuts down. When the temperature falls below its lower threshold of 140°C, the chip is enabled again. Active Bleeder Circuit The input voltage may not enter its charging window during normal operation due to parasitic capacitance from VIN to GND. An active bleeder circuit is enabled to pull down the VIN voltage whenever the VD voltage falls below 14V to guarantee that the output gets enough energy from the input ports. In addition, when the power supply shuts down, the active bleeder circuit discharges the energy stored in the parasitic capacitor to ensure that the circuit can restart easily. Power-Good The MP100 integrates a power-good circuit to signal that the output meets the controller IC’s requirements. It is an open drain structure and requires a pull-up resistor to VOUT. During start up, the VOUT voltage rises smoothly. When it reaches 80% of its normal value, the power-good signal goes high after a 200µs delay to indicate a normal output. Over-Current Protection The VD and VOUT voltages will drop simultaneously if the output current exceeds its normal value. When the VD voltage falls to 6.8V, the second stage LDO shuts down immediately. Then the input voltage charges VD to 15.3V to enable the LDO. Due to the output current limit circuit, the maximum current is typically limited to 150mA. VD Over-Voltage Protection The VD capacitor provides energy for the output load. If the voltage of VD exceeds 30V, the internal switch between VIN and VB turns off immediately to prevent the VD voltage from rising too high, which can damage the LDO stage. Short-Circuit Protection The output current is limited to 150mA if the output is shorted to ground, which also decreases the VD voltage. When VD drops below 6.8V, LDO turns off. The input voltage then gradually charges VD up to 15.3V to enable the LDO. When LDO turns on, the output current drops the VD voltage to 6.8V again. This process MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 8 MP100 – OFFLINE INDUCTOR-LESS REGULATOR APPLICATION INFORMATION COMPONENT SELECTION τ s is 20ms for a half-wave rectifier, and 10ms for The output voltage is set to 12V by internal large feedback resistors. Adjust VOUT by choosing appropriate external feedback resistors. The recommended output voltage is between 1.5V and 15V. If PG is used, then the maximum output voltage must be limited to 14V due to the maximum rating of PG. Defining the upper and lower feedback resistors as RUP and RLW respectively (refer to the picture in Typical Application section): RUP VOUT = RLW × ( − 1) 1.235 For the external resistors to dominate over the internal resistors, select relatively small values of RUP and RLW compared to the internal resistors. However, to minimize the load consumption, avoid very small external resistors. For most applications, choose RLW=10.2kΩ. To accurately set the output voltage, select an RUP that can counter the internal upper-feedback resistor value of 1MΩ. The table below lists typical resistor values for different output voltages: Table 1: Resistors Selecting vs. Output Voltage Setting VOUT(V) 1.5 3.3 5 15 RUP(kΩ) 2.21(1%) 16.9(1%) 30.9(1%) 121(1%) RLW(kΩ) 10.2(1%) 10.2(1%) 10.2(1%) 10.2(1%) Selection of VD Capacitor The bypass capacitor on the VD pin needs to be sufficiently large to provide a stable current. Calculate the capacitance (in μF) based on the following equation: CVD = Iload × τs Vripple Where, Iload is the output current (mA); τ s is based on the type of input rectifier—for example, a full-bridge rectifier, Vripple is the voltage ripple on the VD capacitor—normally the ripple is limited to 2V to 3V. For best results, use a small ceramic capacitor and a large aluminum capacitor in parallel. Output Power Capability The maximum input power to the VD capacitor is limited by the fixed charging window. Considering the LDO power loss, the MP100 has a limited maximum output power. The following factors influence the MP100’s maximum output power: the input rectifier (full bridge or half-wave); the VD capacitor connected between VD and GND; the output voltage; and the MP100’s temperature-rise requirement, which is relative to the different application environments. VIN V IN V AC V AC GND GND Full Bridge Rectifier Half-wave Rectifier Figure 2 depicts the relationship between the maximum output power and the VIN voltage when the output voltage is 12V, 5V and 3.3V, respectively. The plots account for both full bridge and half-wave rectifiers, The temperature rise of MP100 is less than 60°C on the test board in 25°C room temperature test. POUT (mW) Setting the Output Voltage 550 500 Full Bridge Rectifier, VOUT=12V Full Bridge Rectifier, VOUT=5V 450 Half-Wave Rectifier, VOUT=12V 400 350 Full Bridge Rectifier, VOUT=3.3V 300 Half-Wave Rectifier, VOUT=5V 250 200 150 100 50 Half-Wave Rectifier, VOUT=3.3V 0 80 110 140 170 200 230 260 290 320 VIN (V) Figure 2: Output Power vs. Input Voltage MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 9 MP100 – OFFLINE INDUCTOR-LESS REGULATOR The maximum output capability can be roughly estimated by following equation: less than 10. R1 can be used to adjust the switch speed of external MOS. 2 × C VD × Ipeak × fline × (VTHVIN − VDMIN ) × Vo Line Transformer MP100 can work well when connected to AC line or programmable AC source. But when using an isolation transformer or a variable transformer as source, because of the high inductance of the transformer (usually in the mH’s), high voltage spikes occur when MP100 turns off the internal switch connected between VIN and VB, which may damage the IC. An X- capacitor must be installed before the rectifier to guarantee the reliability of the system. Po _ max = Ipeak + 2 × 2π × Cvd × Vin × fline Where, CVD ( F) is the capacitance connected to VD; Ipeak (A) is the input peak current at full load, which can be estimated by following equation: Ipeak = 1.25 − 0.036 × VDMIN ; fline (Hz) is the rectified line frequency; VTHVIN (V) is the input voltage threshold to shut down the internal switch connected between VIN and VB, typically it is 35V; VDMIN (V) is the minimum voltage of VD to maintain the output voltage, usually; it can be got by following equation: ⎧V + 1 VDMIN = ⎨ o ⎩ 6.8V if VDMIN > 6.8V if VDMIN ≤ 6.8V Vo (V) is the output voltage; Vin (V) is the RMS value of input voltage; To get more output power, MP100 can be paralleled. Figure 6 shows how it is implemented. More MP100 can be paralleled in the same way to get the output power need. Another way to get more output power is using an external MOSFET to charge the capacitor connected between VD and GND. Figure 7 shows an example. To prevent the thermal damage of external MOS when VD is shorted to GND directly, PTC (Positive Temperature Coefficient) is used which should be placed as close as to the external MOS to detect the temperature. When the temperature of external MOS reaches certain value, the resistor of PTC will increase sharply to pull down the gate voltage and shut down the external MOS. To guarantee its normal start up and steady state operation, R3/R2 should be more than 4.5. At the same time, R3/R2 should not be too high to get better thermal protection; generally it should be MP100 Rev. 1.04 1/23/2014 EMI An appropriate X-capacitor should be connected between the input ports to guarantee the circuit can meet EMI requirements. Figure 3 shows the recommended X-capacitor values to pass EMI in different applications. 1.4 1.2 1 1 0.8 0.68 0.6 0.47 0.4 0.22 0.2 0 0.22 0 5 0.22 10 0.22 0.22 15 20 25 1 0.8 0.6 0.47 0.4 0.2 0 0 0.22 0.22 0.22 0.22 2.5 5 0.33 0.22 7.5 0.22 10 12.5 Figure 3: X Cap Value Required in Different Application www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 10 MP100 – OFFLINE INDUCTOR-LESS REGULATOR Surge Since there is no capacitor to absorb AC line transients, MOV should be used to protect the IC to survive the transient test. With 750V switch integrated, MP100 can pass 1kV surge test with an appropriate MOV connected between the line input ports. PCB Layout Guide PCB layout is very important to achieve good regulation, ripple rejection, transient response and thermal performance. It is highly recommended to duplicate EVB layout for optimum performance. Top Layer VB PG FB VD GND Vout If change is necessary, please follow these guidelines and take Figure 4 for reference. 1) Minimize the loop area formed by positive output of rectifier, VIN, VB and GND. R2 2) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. VIN 3) Output capacitor should be put close to the output terminal. R3 R1 4) Connect the exposed pad with GND to a large copper area to improve thermal performance and long-term reliability L Bottom Layer RF1 BD1 N U1 1 8 VIN PG 4 VOUT 7 NC MP100 6 3 VB FB 5 VD GND C1 2 GND R1 C2 VOUT Figure 4: PCB Layout GND Design Example Below is a design example following the application guidelines for the specifications: R2 C3 C4 R3 Table 2: Design Example VIN VOUT IOUT 85V to 305V 12V 10mA The detailed application schematic is shown in Figure 5. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device application, please refer to the related Evaluation Board Datasheets. MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 11 MP100 – OFFLINE INDUCTOR-LESS REGULATOR TYPICAL APPLICATION CIRCUITS L RF1 10/1W 85~305VAC CX1 470nF 305 VAC R5 100k U1 1 BD1 MB6S 8 VIN PG VOUT 4 Vout 7 NC 6 N 5 C2 470 pF 50V MP100 VB FB 3 R4 10.2k 1% VD GND 2 C1 220 µF/35V R3 90.9k 1% C3 4.7µF 50V 12V/10mA GND GND Figure 5: Typical Application L RF1 10/1W 85~305VAC N CX1 1µF 305VAC BD1 MB6S R5 100k U1 1 8 VIN PG VOUT 4 7 NC 6 MP100 VB FB 3 C2 470pF 50V R3 30.9k 1% R4 10.2k 1% 5 VD GND 2 C1 220 µF/35V Vout C3 4.7µF 50V 5V/40mA GND GND U2 1 8 VIN PG VOUT 4 7 NC 6 MP100 VB FB 3 5 VD GND 2 GND Figure 6: Paralleled Application MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 12 MP100 – OFFLINE INDUCTOR-LESS REGULATOR TYPICAL APPLICATION CIRCUITS (continued) L RF1 10/1W 85~305VAC N CX1 1µF 305VAC R6 100k U1 1 BD1 MB6S 8 VIN PG VOUT 4 7 NC Q1 STD3NK60ZT4 600 V/2.4A R1 10k R2 1k 6 PTC 5 C1 220µF 35V R3 5.1k MP100 VB FB 3 Vout C2 470pF 50V VD GND R4 16.9k 1% R5 10.2k 1% C3 4.7µF 50V C4 0.1µF 50V 3.3V/70mA 2 GND GND Figure 7: External MOSFET Connected Application MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 13 MP100 – OFFLINE INDUCTOR-LESS REGULATOR FLOW CHART Start N VIN<35V Y Turn Off Internal Switch Turn On Internal Switch Monitor VD Y N TSD= Logic High N VD<6.8V VD>15.3V N VD>30V N VD<14V N Y Y Thermal Monitor Y Y Turn Off LDO Turn On LDO Turn Off Active Bleeder Circuit Turn On Active Bleeder Circuit Monitor Output Current Monitor VFB Iomax<=150mA VFB=1V Y N OCP,SCP&OTP is auto restart PG=Logic High MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 14 MP100 – OFFLINE INDUCTOR-LESS REGULATOR SIGNAL EVOLUTION IN THE PRESENCE OF FAULTS Unplug from main input Start up VD VDTHOUT Normal Over current operation occures Over temperature occures VDTHOUT -1.3V VDUVLO LDO ON VOUT Bleeder Switch On Off Fault Flag Normal operation MP100 Rev. 1.04 1/23/2014 Normal operationOCP/SCP Fault Occurs Here Normal operation OTP Fault Occurs Here www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. Normal operation 15 MP100 – OFFLINE INDUCTOR-LESS REGULATOR PACKAGE INFORMATION SOIC8E 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.138(3.51) RECOMMENDED LAND PATTERN 0.213(5.40) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP100 Rev. 1.04 1/23/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 16