IRF60B217 Data Sheet (229 KB, EN)

IR MOSFET
StrongIRFET™
IRF60B217
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
D
9.0m
60A
TO-220AB
IRF60B217
D
Drain
Standard Pack
Form
Quantity
Tube
50
S
Source
Orderable Part Number
IRF60B217
60
30
ID = 36A
25
50
20
TJ = 125°C
15
10
TJ = 25°C
5
0
4
8
12
16
40
30
20
10
20
V GS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
max
S
D
G
ID , Drain Current (A)
RDS(on), Drain-to -Source On Resistance ( m)
TO-220
7.3m
ID
G
Gate
IRF60B217
RDS(on) typ.
S
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
RoHS Compliant, Halogen-Free
Package Type
60V
G





Base part number
VDSS
0
25
50
75
100
125
150
175
TC , CaseTemperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
2016– 01-05
IRF60B217
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
TJ
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Max.
60
42
225
83
0.56
± 20
-55 to + 175 Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics 85
EAS (Thermally limited)
Single Pulse Avalanche Energy 
124
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
See Fig 15, 16, 23a, 23b
EAR
Repetitive Avalanche Energy 
Thermal Resistance Symbol
Parameter
Typ.
Max.
Junction-to-Case 
–––
1.8
RJC
Case-to-Sink, Flat Greased Surface
RCS
0.50
–––
Junction-to-Ambient 
RJA
–––
62
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Min. Typ. Max.
60
––– –––
––– 0.047 –––
–––
7.3
9.0
–––
9.0
–––
2.1 –––
3.7
––– –––
1.0
––– ––– 150
––– ––– 100
––– ––– -100
–––
2.0
–––
Units
A W
W/°C
V
°C mJ
A
mJ
Units
°C/W Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA 
VGS = 10V, ID = 36A 
m
VGS = 6.0V, ID = 18A 
V
VDS = VGS, ID = 50µA
VDS =40 V, VGS = 0V
µA
VDS =40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.131mH, RG = 50, IAS = 36A, VGS =10V.
ISD  36A, di/dt  630A/µs, VDD  V(BR)DSS, TJ  175°C.
Pulse width  400µs; duty cycle  2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 16A, VGS =10V.
2
2016– 01-05
IRF60B217
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
150
–––
–––
–––
–––
–––
–––
Typ.
–––
44
12
14
30
8.3
37
td(off)
Turn-Off Delay Time
–––
24
tf
Ciss
Coss
Fall Time
Input Capacitance
Output Capacitance
–––
–––
–––
20
2230
215
Crss
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
140
–––
–––
230
–––
VGS = 0V, VDS = 0V to 48V
–––
295
–––
VGS = 0V, VDS = 0V to 48V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
60
–––
–––
225
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
0.9
1.2
dv/dt
Peak Diode Recovery dv/dt
–––
12
–––
trr
Reverse Recovery Time
–––
26
–––
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
27
24
25
1.7
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID =36A
66
ID = 36A
VDS = 30V
–––
nC VGS = 10V
–––
–––
–––
VDD = 30V
–––
ID = 36A
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
pF VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
Diode Characteristics Symbol
IS
ISM
3
A
V
D
G
S
TJ = 25°C,IS = 36A,VGS = 0V 
V/ns TJ = 175°C,IS = 36A,VDS = 40V
ns
TJ = 25°C
VDD = 51V
TJ = 125°C
IF = 36A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
2016– 01-05
IRF60B217
1000
1000
100
BOTTOM
TOP
10
4.5V
 60µs PULSE WIDTH
Tj = 25°C
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1
100
BOTTOM
4.5V
10
 60µs PULSE WIDTH
Tj = 175°C
1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
1000
100
TJ = 175°C
10
TJ = 25°C
1
V DS = 30V
 60µs PULSE WIDTH
0.1
3.0
4.0
5.0
6.0
7.0
ID = 36A
V GS = 10V
2.0
1.5
1.0
0.5
8.0
-60 -40 -20
V GS, Gate-to-Source Voltage (V)
10000
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 5. Typical Transfer Characteristics
Fig 6. Normalized On-Resistance vs. Temperature
14
V GS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + Cgd, C ds SHORTED
C rss = C gd
C oss = Cds + Cgd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Ciss
1000
Coss
Crss
ID= 36A
12
V DS= 48V
V DS= 30V
V DS= 12V
10
8
6
4
2
0
100
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
0
10
20
30
40
50
60
QG Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
2016– 01-05
IRF60B217
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
100
TJ = 25°C
10
1
100
100µsec
10
1msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1
10msec
0.1
Tc = 25°C
Tj = 175°C
Single Pulse
V GS = 0V
0.01
0.1
0.2
0.4
0.6
0.8
1.0
0.1
1.2
1
10
V DS, Drain-toSource Voltage (V)
V SD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.4
75
Id = 1.0mA
0.3
70
Energy (µJ)
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)
DC
0.2
65
0.1
0.0
60
0
-60 -40 -20 0 20 40 60 80 100120140160180
20
30
40
50
60
V DS, Drain-to-Source Voltage (V)
TJ , Temperature ( °C )
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m )
10
Fig 12. Typical Coss Stored Energy
24.0
V GS = 6.0V
V GS = 7.0V
20.0
V GS = 8.0V
V GS = 10V
16.0
12.0
8.0
4.0
0
40
80
120
160
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
2016– 01-05
IRF60B217
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  Tj = 150°C and
Tstart =25°C (Single Pulse)
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
100
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 36A
80
60
40
20
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav 2016– 01-05
IRF60B217
12
4.0
IF = 24A
V R = 51V
10
TJ = 25°C
TJ = 125°C
3.5
8
3.0
2.5
ID = 250µA
ID = 1.0mA
2.0
ID = 10mA
ID = 1.0A
1.5
IRRM (A)
V GS(th) Gate threshold Voltage (V)
4.5
4
2
1.0
-75 -50 -25
6
0
25
50
75
0
100 125 150 175
0
200
TJ , Temperature ( °C )
600
800
1000
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
140
12
IF = 36A
V R = 51V
10
TJ = 25°C
TJ = 125°C
QRR (nC)
8
IRRM (A)
400
diF /dt (A/µs)
6
120
IF = 24A
V R = 51V
100
TJ = 25°C
TJ = 125°C
80
4
60
2
40
20
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
QRR (nC)
140
120
IF = 36A
V R = 51V
100
TJ = 25°C
TJ = 125°C
80
60
40
20
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
2016– 01-05
IRF60B217
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
2016– 01-05
IRF60B217
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
PART NUM BER
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
2016– 01-05
IRF60B217
Qualification Information† Industrial
(per JEDEC JESD47F) ††
Qualification Level Moisture Sensitivity Level
TO-220
RoHS Compliant
N/A
Yes
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
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10
2016– 01-05