IRL40B212

StrongIRFET™
IRL40B212
IRL40S212
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
D
G
S
TO-220
D2-Pak
ID (Package Limited)
195A
S
G
D2-Pak
IRL40S212
D
Drain
Standard Pack
Form
Quantity
Tube
50
Tape and Reel
800
S
Source
Orderable Part Number
IRL40B212
IRL40S212
300
6
ID = 100A
Limited By Package
250
5
4
T J = 125°C
3
2
200
150
100
50
T J = 25°C
1
0
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On– Resistance vs. Gate Voltage
1
254A
TO-220AB
IRL40B212
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
IRL40B212
IRL40S212
ID (Silicon Limited)
S
D
G
G
Gate
Package Type
40V
1.5m
1.9m
D
Benefits
Optimized for Logic Level Drive
 Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free
 RoHS Compliant, Halogen-Free
Base part number
VDSS
RDS(on) typ.
max
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© 2015 International Rectifier
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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April 27, 2015
IRL40B212/IRL40S212
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Max.
254
179
195
990 *
231
1.5
± 20
Units
A W
W/°C
V
-55 to + 175 Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics EAS (Thermally limited)
342
Single Pulse Avalanche Energy 
790
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
See Fig 15, 16, 23a, 23b
Repetitive Avalanche Energy 
EAR
TSTG
Thermal Resistance Symbol
Parameter
Junction-to-Case 
RJC
Case-to-Sink, Flat Greased Surface
RCS
Junction-to-Ambient 
RJA
Junction-to-Ambient (PCB Mount) 
RJA
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Typ.
–––
0.50
–––
–––
Min.
40
–––
–––
–––
1.0
–––
–––
–––
–––
–––
Typ. Max.
––– –––
0.03 –––
1.5
1.9
1.9
2.4
–––
2.4
–––
1.0
––– 150
––– 100
––– -100
1.6
–––
Max.
0.65
–––
62
40
°C mJ
A
mJ
Units
°C/W Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 2mA 
VGS = 10V, ID = 100A
m
VGS = 4.5V, ID = 50A 
V
VDS = VGS, ID = 150µA
VDS = 40 V, VGS = 0V
µA
VDS = 40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that
current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
 Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.07mH, RG = 50, IAS = 100A, VGS =10V.
 ISD  100A, di/dt  950A/µs, VDD  V(BR)DSS, TJ  175°C.
 Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
 R is measured at TJ approximately 90°C.
 When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 40A, VGS =10V. 
* Pulse drain current is limited at 780A by source bonding technology.
2
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© 2015 International Rectifier
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April 27, 2015
IRL40B212/IRL40S212
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
256
–––
–––
–––
–––
–––
–––
Typ.
–––
91
25
46
45
39
154
td(off)
Turn-Off Delay Time
–––
88
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
–––
–––
–––
84
8320
1050
790
–––
1250
–––
VGS = 0V, VDS = 0V to 32V
–––
1580
–––
VGS = 0V, VDS = 0V to 32V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
254
–––
–––
990*
VSD
Diode Forward Voltage
–––
–––
1.2
dv/dt
Peak Diode Recovery dv/dt
–––
6.0
–––
trr
Reverse Recovery Time
–––
30
–––
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
32
26
28
1.4
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID = 100A
137
ID = 100A
–––
VDS = 20V
nC –––
VGS = 4.5V
–––
–––
VDD = 20V
ID = 30A
–––
ns
–––
RG= 2.7
VGS = 4.5V
–––
–––
–––
–––
VGS = 0V
VDS = 25V
pF ƒ = 1.0MHz, See Fig.7
Diode Characteristics Symbol
IS
ISM
3
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© 2015 International Rectifier
A
V
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
TJ = 25°C,IS = 100A,VGS = 0V 
V/ns TJ = 175°C,IS = 100A,VDS = 40V
ns
TJ = 25°C
VDD = 34V
TJ = 125°C
IF = 100A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
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April 27, 2015
IRL40B212/IRL40S212
1000
1000
BOTTOM
100
3.25V
 60µs PULSE WIDTH
100
 60µs PULSE WIDTH
Tj = 175°C
10
10
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
10
100
Fig 4. Typical Output Characteristics
1000
2.0
T J = 175°C
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
T J = 25°C
VDS = 10V
 60µs PULSE WIDTH
10
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
100000
VGS, Gate-to-Source Voltage (V)
ID = 100A
Ciss
10000
Fig 6. Normalized On-Resistance vs. Temperature
14
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
C, Capacitance (pF)
BOTTOM
3.25V
Tj = 25°C
Coss
Crss
1000
12
VDS= 32V
VDS= 20V
10
VDS= 8V
8
6
4
2
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
6.0V
4.5V
4.0V
3.75V
3.25V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
6.0V
4.5V
4.0V
3.75V
3.25V
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0
50
100
150
200
250
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs.Gate-to-Source Voltage
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IRL40B212/IRL40S212
T J = 25°C
T J = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
VGS = 0V
0.5
1.0
1.5
2.0
1000
100µsec
1msec
100
Limited by Package
10
10msec
1
0.1
2.5
1
10
100
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
50
0.9
Id = 2.0mA
0.8
48
0.7
0.6
46
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
10
0
OPERATION IN THIS AREA
LIMITED BY RDS(on)
44
0.5
0.4
0.3
0.2
42
0.1
40
0.0
-60 -40 -20 0
20 40 60 80 100 120 140 160
-5
T J , Temperature ( °C )
0
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
RDS(on), Drain-to -Source On Resistance ( m )
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
7.0
VGS = 3.5V
VGS = 4.5V
VGS = 6.0V
VGS = 8.0V
VGS = 10V
6.0
5.0
4.0
3.0
2.0
1.0
0
0
20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)
Fig 13. Typical On– Resistance vs. Drain Current
5
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IRL40B212/IRL40S212
1
Thermal Response ( Z thJC )
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
350
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
EAR , Avalanche Energy (mJ)
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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© 2015 International Rectifier
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figure 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav Submit Datasheet Feedback
April 27, 2015
IRL40B212/IRL40S212
9
IF = 60A
V R = 34V
8
2.0
7
TJ = 25°C
TJ = 125°C
6
1.5
ID
ID
ID
ID
1.0
0.5
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
2.5
= 150µA
= 250µA
= 1.0mA
= 1.0A
5
4
3
2
1
0.0
0
-75 -50 -25
0
25
50
75 100 125 150
0
200
T J , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
160
9
IF = 100A
V R = 34V
8
7
IF = 60A
V R = 34V
TJ = 25°C
140
TJ = 25°C
TJ = 125°C
120
QRR (nC)
6
IRRM (A)
400
5
4
3
TJ = 125°C
100
80
60
2
40
1
20
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
160
IF = 100A
V R = 34V
TJ = 25°C
140
QRR (nC)
120
TJ = 125°C
100
80
60
40
20
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRL40B212/IRL40S212
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
tp
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRL40B212/IRL40S212
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
PART NUM BER
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRL40B212/IRL40S212
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
F530S
DATE CODE
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRL40B212/IRL40S212
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
11
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IRL40B212/IRL40S212
Qualification Information† Industrial
(per JEDEC JESD47F) ††
Qualification Level Moisture Sensitivity Level
TO-220
D Pak
MSL1
Yes
RoHS Compliant
†
N/A
2
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
12
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