ChipFET

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ChipFETt
CASE 1206A−03
ISSUE K
8
DATE 19 MAY 2009
1
SCALE 1:1
D
8
7
q
6
L
5
HE
5
6
7
8
4
3
2
1
E
1
2
3
e1
4
b
e
DIM
A
b
c
D
E
e
e1
L
HE
q
c
A
0.05 (0.002)
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 2:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 3:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. COLLECTOR
4. BASE
5. EMITTER
6. COLLECTOR
7. COLLECTOR
8. COLLECTOR
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
MIN
1.00
0.25
0.10
2.95
1.55
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.011
0.014
0.071
0.075
5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
STYLE 6:
STYLE 5:
PIN 1. ANODE
PIN 1. ANODE
2. DRAIN
2. ANODE
3. DRAIN
3. DRAIN
4. GATE
4. DRAIN
5. SOURCE
5. SOURCE
6. DRAIN
6. GATE
7. DRAIN
7. CATHODE
8. CATHODE / DRAIN
8. CATHODE
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
2.032
0.08
xxx MG
G
2.362
0.093
0.65
0.025
PITCH
xxx
= Specific Device Code
M
= Month Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
8X
8X
0.66
0.026
0.457
0.018
mm Ǔ
ǒinches
Basic Style
OPTIONAL SOLDERING FOOTPRINTS ON PAGE 2
DOCUMENT NUMBER:
STATUS:
98AON03078D
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
ChipFET
http://onsemi.com
1
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
3
ChipFETt
CASE 1206A−03
ISSUE K
DATE 19 MAY 2009
ADDITIONAL SOLDERING FOOTPRINTS*
1
2.032
0.08
2.032
0.08
1
4X
0.457
0.018
2X
1.092
0.043
1.727
0.068
2.362
0.093
2.362
0.093
0.65
0.025
PITCH
4X
2X
2X
0.457
0.018
0.66
0.026
mm Ǔ
ǒinches
Styles 1 and 4
2.032
0.08
1.118
0.044
mm Ǔ
ǒinches
Style 2
2.032
0.08
2X
0.66
0.026
1
2X
0.66
0.026
1
1.092
0.043
2X
0.66
0.026
1.092
0.043
2.362
0.093
2.362
0.093
0.65
0.025
PITCH
2X
0.65
0.025
PITCH
1.118
0.044
0.457
0.018
ǒ
mm
inches
1.118
0.044
Ǔ
2X
0.457
0.018
mm Ǔ
ǒinches
Style 5
Style 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
STATUS:
98AON03078D
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
ChipFET
http://onsemi.com
2
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 2 OFXXX
3
DOCUMENT NUMBER:
98AON03078D
PAGE 3 OF 3
ISSUE
REVISION
DATE
F
ADDED STYLE 4. REQ. BY M. SWEADOR.
30 DEC 2004
G
ADDED NOMINAL VALUES. REQ BY HONG XIAO.
18 JUL 2005
H
CHANGED STYLE 3. ADDED STYLE 5. CHANGED DIMENSIONS TO ALL
SOLDERING FOOTPRINTS FOR CONSISTENCY AND ADDED SOLDERING
FOOTPRINT STYLE 5. REQ. BY S. WINSTON.
25 OCT 2006
J
ADDED STYLE 6. REQ. BY S. BRUTCHER.
17 JAN 2008
K
CORRECTED ALL PIN STYLE SOLDERING FOOTPRINT MM PITCH VALUE
FROM 0.635 TO 0.65. REQ. BY E. ROMERO.
19 MAY 2009
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 03K
Case Outline Number:
1206A
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