Standard Peak EMI Reducing Solution

ASM3P2780A
Peak EMI
Reducing Solution
The ASM3P2780A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
Features
• Generates an EMI optimized clock signal at the
output.
• Integrated loop filter components.
The ASM3P2780A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
• Operates with a 3.3 / 2.5V Supply.
• Operating current less than 5mA.
• CMOS design.
• Input frequency range: 30MHz to 50MHz for 2.5V
30MHz to 50MHz for 3.3V
• Generates a 1X low EMI spread spectrum clock of
the input frequency.
• Frequency deviation: ±0.75% (Typ) @ 46MHz Input
Applications
Frequency.
The ASM3P2780A is targeted towards all portable
devices like MP3 players and digital still cameras.
• Available in 6L-TSOP (6L-TSOT-23) Package.
Product Description
Key Specifications
Description
The ASM3P2780A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2780A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2780A allows significant
system cost savings by reducing the number of circuit
board layers, ferrite beads and shielding that are
traditionally required to pass EMI regulations.
Specification
Supply voltages
VDD = 3.3V / 2.5V
Cycle-to-Cycle Jitter
±200pS (Typ)
Output Duty Cycle
45/55%
Modulation Rate Equation
FIN/1280
Frequency Deviation
±0.75 (Typ) @ 46MHz
Block Diagram
VDD
PD
PLL
Modulation
XIN / CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
©2010 SCILLC. All rights reserved.
OCTOBER 2010 – Rev. 2
Publication Order Number:
ASM3P2780/D
ASM3P2780A
Pin Configuration (6L-TSOP Package)
PD 1
XOUT 2
6 VSS
ASM3P2780A
XIN / CLKIN 3
5 ModOUT
4 VDD
Pin Description
Pin#
Pin Name
1
Type
PD
Description
I
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
used.
2
XOUT
O
Crystal connection. If using an external reference, this pin must be left unconnected.
3
XIN / CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
4
VDD
P
Power supply for the entire chip.
5
ModOUT
O
Spread spectrum clock output.
6
VSS
P
Ground connection.
Specifications
Description
Frequency Range
Specification
For 2.5V Supply
30MHz < CLKIN < 50MHz
For 3.3V Supply
Modulation Equation
FIN/1280
Frequency Deviation
±0.75% (Typ) @ 46MHz
Absolute Maximum Ratings
Parameter
Rating
Unit
Voltage on any pin with respect to Ground
-0.5 to +4.6
V
Storage temperature
-65 to +125
°C
Symbol
VDD, VIN
TSTG
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
2
KV
TDV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
VDD
Description
Supply Voltage
Min
Max
Unit
2.375
3.6
V
-40
+85
°C
TA
Operating Temperature (Ambient Temperature)
CL
Load Capacitance
15
pF
CIN
Input Capacitance
7
pF
Rev. 2 | Page 2 of 7 | www.onsemi.com
ASM3P2780A
DC Electrical Characteristics for 2.5V Supply
Parameter
Symbol
VIL
Min
Typ
Max
Unit
V
Input low voltage
VSS-0.3
0.8
VIH
Input high voltage
2.0
VDD+0.3
V
IIL
Input low current
-35
µA
IIH
Input high current
35
µA
IXOL
XOUT output low current (@ 0.6V, VDD = 2.5V)
3
mA
IXOH
XOUT output high current (@ 1.8V, VDD = 2.5V)
3
mA
VOL
Output low voltage (VDD = 2.5 V, IOL = 8mA)
VOH
Output high voltage (VDD = 2.5 V, IOH = 8mA)
0.6
IDD
Static supply current
ICC
Dynamic supply current (2.5V, 46MHz and no load)
VDD
Operating Voltage
1.8
1
10
4.0
2.375
2.5
2
tON
Power-up time (first locked cycle after power-up)
ZOUT
V
V
Output impedance
uA
mA
2.625
V
5
mS
50
Ω
Note: 1. XIN / CLKIN pin and PD pin are pulled low.
2. VDD and XIN / CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics for 2.5V Supply
Parameter
Symbol
CLKIN
ModOUT
fd
Typ
Max
Unit
Input frequency
30
50
MHz
Output frequency
30
50
MHz
Frequency Deviation
Input Frequency = 30MHz
±1.10
Input Frequency = 50MHz
±0.65
%
1
Output rise time (measured from 0.7V to 1.7V)
0.7
1.3
1.6
nS
1
Output fall time (measured from 1.7V to 0.7V)
0.4
0.8
1.0
nS
tLH
tHL
Min
tJC
Jitter (cycle-to-cycle)
tD
Output duty cycle
±200
45
Note: 1. tLH and tHL are measured into a capacitive load of 15pF.
Rev. 2 | Page 3 of 7 | www.onsemi.com
50
pS
55
%
ASM3P2780A
DC Electrical Characteristics for 3.3V Supply
Parameter
Symbol
VIL
Min
Typ
Max
Unit
V
Input low voltage
VSS-0.3
0.8
VIH
Input high voltage
2.0
VDD+0.3
V
IIL
Input low current
-35
µA
IIH
Input high current
35
µA
IXOL
XOUT output low current (@ 0.4V, VDD = 3.3V)
3
mA
IXOH
XOUT output high current (@ 2.5V, VDD = 3.3V)
3
mA
VOL
Output low voltage (VDD = 3.3 V, IOL = 8mA)
VOH
Output high voltage (VDD = 3.3 V, IOH = 8mA)
0.4
IDD
Static supply current
ICC
Dynamic supply current (3.3V, 46MHz and no load)
VDD
Operating Voltage
V
1
10
tON
uA
5.0
2.7
mA
3.3
2
Power-up time (first locked cycle after power-up)
ZOUT
V
2.5
Output impedance
3.6
V
5
mS
45
Ω
Notes: 1. XIN / CLKIN pin and PD pin are pulled low.
2. VDD and XIN / CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics for 3.3V Supply
Symbol
CLKIN
ModOUT
fd
Min
Typ
Max
Unit
Input frequency
30
50
MHz
Output frequency
30
50
MHz
Frequency Deviation
Input Frequency = 30MHz
±1.10
Input Frequency = 50MHz
±0.65
%
1
Output rise time (measured from 0.8 to 2.0V)
0.5
1.1
1.4
nS
1
Output fall time (measured at 2.0V to 0.8V)
0.3
0.8
1.1
nS
tLH
tHL
Parameter
tJC
Jitter (cycle-to-cycle)
tD
Output duty cycle
±200
45
Note: 1. tLH and tHL are measured into a capacitive load of 15pF.
Modulation Profile
Rev. 2 | Page 4 of 7 | www.onsemi.com
50
pS
55
%
ASM3P2780A
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
33MHz
Frequency tolerance
± 50 ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance(CP)
18pF
Shunt capacitance
7pF maximum
ESR
25 Ω
Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
R
Rx
Crystal
CL
CL
CL = 2*(CP – CS),
Where CP = Load capacitance of crystal
CS = Stray capacitance due to CIN, PCB, Trace etc.
Typical Application Schematic
VDD
C1
0.1µF
C2
2.2µF
VDD
ASM3P2780A
ModOUT
VSS
Rev. 2 | Page 5 of 7 | www.onsemi.com
Rs
ModOUT Clock
ASM3P2780A
Package Information
6L-TSOP Package
Dimensions
Symbol
Millimeters
Inches
Min
Max
A
Min
Max
0.04
1.00
A1
0.00
0.004
0.00
0.10
A2
0.033
0.036
0.84
0.90
b
0.012
0.02
0.30
0.50
H
0.005 BSC
0.127 BSC
D
0.114 BSC
2.90 BSC
B
0.06 BSC
1.60 BSC
e
0.0374 BSC
0.950 BSC
C
0.11 BSC
2.80 BSC
L
0.0118
0.02
0.30
0.50
θ
0°
4°
0°
4°
Rev. 2 | Page 6 of 7 | www.onsemi.com
ASM3P2780A
Ordering Information
Part Number
ASM3P2780AF-06OR
Marking
Package Type
Temperature
G4L
6L-TSOP (6L-TSOT-23), TAPE & REEL,
Pb Free
0°C to +70°C
A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free.
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