6 A High-Speed MOSFET Drivers

NCP4420, NCP4429
6 A High-Speed MOSFET
Drivers
MARKING
DIAGRAM
8
SO–8
D SUFFIX
CASE 751
8
1
Latch–Up Protected: Will Withstand 1.5 A Reverse Output Current
Logic Input Will Withstand Negative Swing Up to 5 V
ESD Protected (4 kV)
Matched Rise and Fall Times (25 nsec)
High Peak Output Current (6 A Peak)
Wide Operating Range (4.5 V to 18 V)
High Capacitive Load Drive (10,000 pF)
Short Delay Time (55 nsec Typ)
Logic High Input, any Voltage (2.4 V to VDD)
Low Supply Current with Logic “1’’ Input (450 µA)
Low Output Impedance (2.5 Ω)
Output Voltage Swing to within 25 mV of Ground or VDD
Temperature Range –40°C to +85°C
8
1
1
x
YY, Y
WW
X
Z
CO
August, 2002 – Rev. 1
= Device Number (0 or 9)
= Year
= Work Week
= Assembly ID Code
= Subcontractor ID Code
= Country of Orgin
PIN CONNECTIONS
8–Pin SOIC
VDD
1
INPUT
2
NC
3
GND
4
8
VDD
7
OUTPUT
6
OUTPUT
5
GND
(Top View)
Switch–Mode Power Supplies
Motor Controls
Pulse Transformer Driver
Class D Switching Amplifiers
 Semiconductor Components Industries, LLC, 2002
NCP442x
YYWWXZ
CO
PDIP–8
P SUFFIX
CASE 626
Applications
•
•
•
•
NCP
442x
YWWXZ
1
8
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
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NCP4420D
NCP4429D
The NCP4420/NCP4429 are 6 A (peak), single output, MOSFET
drivers. The NCP4429 is an inverting driver while the NCP4420 is a
non–inverting driver. These drivers are fabricated in CMOS for lower
power and more efficient operation versus bipolar drivers.
Both drivers have TTL–compatible inputs, which can be driven as
high as VDD + 0.3 V or as low as –5 V without upset or damage to the
device. This eliminates the need for external level shifting circuitry
and its associated cost and size. The output swing is rail–to–rail
ensuring better drive voltage margin, especially during power
up/power down sequencing. Propagational delay time is only 55 nsec
(typ.) and the output rise and fall times are only 25 nsec (typ.) into
2500 pF across the useable power supply range.
Unlike other drivers, the NCP4420/NCP4429 are virtually latch–up
proof. They can replace three or more discrete components saving
PCB area, costs and improving overall system reliability.
ORDERING INFORMATION
1
Device
Package
Shipping
NCP4420DR2
Non–Inverting
SO–8
2500 Tape & Reel
NCP4429DR2
Inverting
SO–8
2500 Tape & Reel
NCP4420P
Non–Inverting
PDIP–8
50 Units/Rail
NCP4429P
Inverting
PDIP–8
50 Units/Rail
Publication Order Number:
NCP4420/D
NCP4420, NCP4429
FUNCTIONAL BLOCK DIAGRAM
VDD
500 µA
NCP4429
300 mV
OUTPUT
INPUT
4.7 V
NCP4420
GND
EFFECTIVE
INPUT
C = 38 pF
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
+20
V
–5.0 to VDD
V
Input Current (VIN VDD)
50
mA
Power Dissipation, TA 70°C
SOIC
PDIP
470
730
Derating Factors (To Ambient)
SOIC
PDIP
4.0
8.0
Supply Voltage
Input Voltage
mW
mW/°C
Storage Temperature Range, Tstg
Operating Temperature (Chip)
Operating Temperature Range (Ambient), TA
Lead Temperature (Soldering, 10 sec)
–65 to +150
°C
+150
°C
–40 to +85
°C
+300
°C
*Static–sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses
above those listed under “Absolute Maximum Ratings’’ may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (TA = +25°C with 4.5 V VDD 18 V, unless otherwise specified.)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Logic 1 High Input Voltage
VIH
–
2.4
1.8
–
V
Logic 0 Low Input Voltage
VIL
–
–
1.3
0.8
V
VIN (Max)
–
–5.0
–
VDD +0.3
V
IIN
0 V VIN VDD
–10
–
10
µA
High Output Voltage
VOH
See Figure 1
VDD –0.025
–
–
V
Low Output Voltage
VOL
See Figure 1
–
–
0.025
V
Output Resistance, High
ROH
IOUT = 10 mA,
VDD = 18 V
–
2.1
2.8
Ω
Output Resistance, Low
ROL
IOUT = 10 mA,
VDD = 18 V
–
1.5
2.5
Ω
Input
Input Voltage Range
Input Current
Output
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2
NCP4420, NCP4429
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Peak Output Current
IPK
VDD = 18 V
(See Figure 5)
–
6.0
–
A
Latch–Up Protection
Withstand Reverse Current
IREV
Duty Cycle 2%
t 300 µs
1.5
–
–
A
tR
Figure 1, CL = 2500 pF
–
25
35
nsec
Fall Time
tF
Figure 1, CL = 2500 pF
–
25
35
nsec
Delay Time 1
tD1
Figure 1
–
55
75
nsec
Delay Time 2
tD2
Figure 1
–
55
75
nsec
IS
VIN = 3.0 V
VIN = 0 V
–
–
0.45
55
1.5
150
mA
µA
VDD
–
4.5
–
18
V
Output
Switching Time (Note 1)
Rise Time
Power Supply
Power Supply Current
Operating Input Voltage
1. Switching times guaranteed by design.
ELECTRICAL CHARACTERISTICS (Measured over operating temperature range with 4.5 V VDD 18 V, unless otherwise
specified.)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Logic 1 High Input Voltage
VIH
–
2.4
Logic 0 Low Input Voltage
VIL
–
–
–
–
V
–
0.8
V
VIN (Max)
–
–5.0
–
VDD +0.3
V
IIN
0 V VIN VDD
–10
–
10
µA
VOH
See Figure 1
VDD –0.025
–
–
V
Input
Input Voltage Range
Input Current
Output
High Output Voltage
Low Output Voltage
VOL
See Figure 1
–
–
0.025
V
Output Resistance, High
ROH
IOUT = 10 mA,
VDD = 18 V
–
3.0
5.0
Ω
Output Resistance, Low
ROL
IOUT = 10 mA,
VDD = 18 V
–
2.3
5.0
Ω
Rise Time
tR
Figure 1, CL = 2500 pF
–
32
60
nsec
Fall Time
tF
Figure 1, CL = 2500 pF
–
34
60
nsec
Delay Time 1
tD1
Figure 1
–
50
100
nsec
Delay Time 2
tD2
Figure 1
–
65
100
nsec
IS
VIN = 3.0 V
VIN = 0 V
–
–
0.45
60
3.0
400
mA
µA
VDD
–
4.5
–
18
V
Switching Time (Note 1)
Power Supply
Power Supply Current
Operating Input Voltage
1. Switching times guaranteed by design.
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3
NCP4420, NCP4429
VIL = 18 V
+5 V
1 µF
90%
INPUT
1
8
10%
0V
0.1 µF
0.1 µF
+18 V
tD1
tD2
tF
tR
90%
90%
OUTPUT
INPUT
2
6
7
10%
0V
10%
INPUT: 100 kHz, square wave,
tRISE = tFALL ≤ 10 nS
CL = 2500 pF
NCP4429
4
OUTPUT
5
Figure 1. Switching Time Test Circuit
TYPICAL CHARACTERISTICS
120
100
100
80
CL = 10,000 pF
CL = 10,000 pF
TIME (ns)
TIME (ns)
80
60
CL = 4700 pF
60
40
CL = 4700 pF
20
CL = 220 pF
40
CL = 220 pF
20
0
5
7
9
11
13
0
15
5
7
9
11
13
15
VDD (V)
VDD (V)
Figure 2. Rise Time vs. Supply Voltage
Figure 3. Fall Time vs. Supply Voltage
50
100
80
CL = 2200 pF
VDD = 18 V
40
60
TIME (ns)
TIME (ns)
VDD = 5 V
30
tFALL
20
tRISE
40
VDD = 12 V
VDD = 18 V
20
10
0
–60
–20
20
60
100
10
1000
140
TA (°C)
10,000
CAPACITIVE LOAD (pF)
Figure 4. Rise and Fall Times vs. Temperature
Figure 5. Rise Time vs. Capacitive Load
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4
NCP4420, NCP4429
TYPICAL CHARACTERISTICS
100
65
80
60
DELAY TIME (ns)
TIME (ns)
60
VDD = 5 V
40
VDD = 12 V
VDD = 18 V
20
55
tD2
50
45
tD1
40
10
1000
35
10000
4
6
8
10
12
14
SUPPLY VOLTAGE (V)
CAPACITIVE LOAD (pF)
Figure 6. Fall Time vs. Capacitive Load
18
Figure 7. Propagation Delay Time
vs.Supply Voltage
50
84
VDD = 15 V
SUPPLY CURRENT (mA)
CL = 2200 pF
VDD = 18 V
40
DELAY TIME (ns)
16
tD2
30
tD1
20
10
70
56
42
500 kHz
28
200 kHz
14
20 kHz
0
–60
0
–20
20
60
100
0
140
100
1000
CAPACITIVE LOAD (pF)
TA (°C)
Figure 8. Propagation Delay Time
vs. Temperature
10,000
Figure 9. Supply Current vs. Capacitive Load
1000
5
18 V
100 mA
10 V
100
4
R OUT ( Ω )
SUPPLY CURRENT (mA)
CL = 220 pF
5V
10
0
50 mA
10 mA
3
2
0
100
1000
FREQUENCY (kHz)
10,000
5
7
9
11
13
VDD (V)
Figure 10. Supply Current vs. Frequency
Figure 11. High–State Output Resistance
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5
15
NCP4420, NCP4429
TYPICAL CHARACTERISTICS
2.5
200
LOAD = 2200 pF
DELAY TIME (ns)
R OUT ( Ω )
160
2
100 mA
50 mA
1.5
10 mA
120
INPUT 2.4 V
INPUT 3 V
80
INPUT 5 V
40
INPUT 8 V AND 10 V
1
7
9
11
13
0
15
5
6
8
7
9
VDD (V)
Figure 12. Low–State Output Resistance
3
2
1
0
5
6
7
10
11
VDD (V)
12
13
14
Figure 13. Effect of Input Amplitude
on Propagation Delay
4
CROSSOVER AREA (A• S) x 10–9
5
8
9
10
11
12
SUPPLY VOLTAGE (V)
13
14
Figure 14. Total nA•S Crossover*
* The values on this graph represent the loss
seen by the driver during one complete cycle.
For a single transition, divide the value by 2.
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6
15
15
NCP4420, NCP4429
PACKAGE DIMENSIONS
PDIP–8
P SUFFIX
CASE 626–05
ISSUE K
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
–B–
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
F
–A–
NOTE 2
L
C
J
–T–
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
--10
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
--10
0.030
0.040
N
SEATING
PLANE
D
M
K
G
H
0.13 (0.005)
M
T A
M
B
M
SO–8
D SUFFIX
CASE 751–06
ISSUE T
D
A
8
E
5
0.25
H
1
M
B
M
4
h
B
e
X 45 A
C
SEATING
PLANE
L
0.10
A1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETER.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
B
0.25
M
C B
S
A
S
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7
DIM
A
A1
B
C
D
E
e
H
h
L
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0
7
NCP4420, NCP4429
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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8
NCP4420/D
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