Application Notes

AN11514
BGU8H1 LTE LNA evaluation board
Rev. 3 — 22 January 2016
Application note
Document information
Info
Content
Keywords
BGU8H1, LTE, LNA
Abstract
This document explains the BGU8H1 LTE LNA evaluation board
Ordering info
Board-number: OM7886
12NC: 9340 686 51598
Contact information
For more information, please visit: http://www.nxp.com
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
Revision history
Rev
Date
Description
3
2
1
Updated with extra application information
Text paragraph 4.1 updated
First publication
20160122
20151120
20140423
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
2 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
1. Introduction
NXP Semiconductors’ BGU8H1 LTE LNA Evaluation Board is designed to evaluate the
performance of the LTE LNA using:

NXP Semiconductors’ BGU8H1 LTE Low Noise Amplifier

A matching inductor

A decoupling capacitor
NXP Semiconductors’ BGU8H1 is a low-noise amplifier for LTE receiver applications in a
plastic, leadless 6 pin, extremely thin small outline SOT1232 at 1.1 x 0.7 x 0.37mm,
0.4mm pitch. The BGU8H1 features gain of 13 dB and a noise figure of 0.9 dB at a
current consumption of 5 mA. Its superior linearity performance removes interference
and noise from co-habitation cellular transmitters, while retaining sensitivity. The LNA
components occupy a total area of approximately 4 mm2.
In this document, the application diagram, board layout, bill of materials, and typical
results are given, as well as some explanations on LTE related performance parameters
like input third-order intercept point IIP3, gain compression and noise.
Fig 1.
AN11514
Application note
BGU8x1 LTE LNA evaluation board (used for BGU8L1, BGU8M1 and BGU8H1)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
3 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
2. General description
Modern cellular phones have multiple radio systems, so problems like co-habitation are
quite common. Since the LTE diversity antenna needs to be placed far from the main
antenna to ensure the efficiency of the channel, a low noise amplifier close to the
antenna is used to compensate the track-losses (and SAW-filter losses when applicable)
on the printed circuit board. A LTE receiver implemented in a mobile phone requires a
low current consumption and low Noise Figure. All the different transmit signals that are
active in smart phones and tablets can cause problems like inter-modulation and
compression. Therefore also a high linearity is required.
3. BGU8H1 LTE LNA evaluation board
The BGU8H1LNA evaluation board simplifies the RF evaluation of the BGU8H1 LTE
LNA applied in a LTE front-end, often used in mobile cell phones. The evaluation board
enables testing of the device RF performance and requires no additional support
circuitry. The board is fully assembled with the BGU8H1 including the input series
inductor and decoupling capacitor. The board is supplied with two SMA connectors for
input and output connection to RF test equipment. The BGU8H1can operate from a 1.5 V
to 3.1 V single supply and consumes typical 5 mA.
3.1 Application Circuit
The circuit diagram of the evaluation board is shown in Fig 2. With jumper JU1 the
enable input can be connected either to Vcc or GND.
BGU8x1
LTE LNA
EVB
X3
GND
Ven
Vcc
X4
JU1
C1
6
RF in
2
C2
L1
5
BGU8x1
4
X1
RF out
3
X2
1
Fig 2.
AN11514
Application note
Circuit diagram of the BGU8x1 LNA evaluation board (used for BGU8L1, BGU8M1
and BGU8H1)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
4 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
3.2 PCB Layout
Fig 3.
Printed-Circuit Board layout of the BGU8x1LNA evaluation board (used for
BGU8L1, BGU8M1 and BGU8H1)
A good PCB layout is an essential part of an RF circuit design. The LNA evaluation board
of the BGU8H1 can serve as a guideline for laying out a board using the BGU8H1. Use
controlled impedance lines for all high frequency inputs and outputs. Bypass Vcc with
decoupling capacitors, preferably located as close as possible to the device. For long
bias lines it may be necessary to add decoupling capacitors along the line further away
from the device. Proper grounding of the GND pins is also essential for good RF
performance. Either connect the GND pins directly to the ground plane or through vias,
or do both, which is recommended. The material that has been used for the evaluation
board is FR4 using the stack shown in Fig 4.
20um Cu
0.2mm FR4 critical
20um Cu
0.8mm FR4 only for
mechanical rigidity of PCB
20um Cu
(1) Material supplier is ISOLA DURAVER; εr = 4.6-4.9: T
Fig 4.
AN11514
Application note
Stack of the PCB material
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
5 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
4. Bill of materials
Table 1.
BOM of the BGU8H1 LTE LNA evaluation board
Designator Description Footprint
Value
Supplier Name/type
Comment
F
SOT1232
BGU8H1
1.1 x 0.7 x
0.37mm3,
NXP
0.4mm pitch
PCB
20 x 35mm
BGU8H1 LTE LNA EV Kit
C1
Capacitor
0402
1nF
Murata GRM1555
Decoupling
C2
Capacitor
0402
1nF
Murata GRM1555
Decoupling
L1
Inductor
0402
3.3nH
Murata LQW15
Input matching
X1, X2
SMA RD
connector
-
-
Johnson, End launch SMA
RF input/ RF output
X3
DC header
-
-
Molex, PCB header, Right Angle, 1 Bias connector
row, 3 way 90121-0763
X4
JUMPER
-
-
Molex, PCB header, Vertical, 1
row, 3 way 90120-0763
142-0701-841
Stage
JU1
Connect Ven to Vcc
or separate Ven
voltage
JUMPER
4.1 BGU8H1
NXP Semiconductors’ BGU8H1 LTE low noise amplifier is designed for the LTE
frequency band. The integrated biasing circuit is temperature stabilized, which keeps the
current constant over temperature. It also enables the superior linearity performance of
the BGU8H1. The BGU8H1 is also equipped with an enable function that allows it to be
controlled via a logic signal. In disabled mode it consumes less than1 μA.
The output of the BGU8H1 is internally matched between 2300 MHz and 2690 MHz
whereas only one series inductor at the input is needed to achieve the best RF
performance. The output is AC coupled via an integrated capacitor.
It requires only two external components to build a LTE LNA having the following
advantages:

Low noise

System optimized gain

High linearity under jamming

1.1 x 0.7 x 0.37, 0.4mm pitch: SOT1232

Low current consumption

Short power settling time
4.2 Series inductor
The evaluation board is supplied with Murata LQW15 series inductor of 3.3 nH. This is a
wire wound type of inductor with high quality factor (Q) and low series resistance (Rs).
This type of inductor is recommended in order to achieve the best noise performance.
High Q inductors from other suppliers can be used. If it is decided to use other low cost
inductors with lower Q and higher Rs the noise performance will degrade.
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
6 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
5. Required Equipment
In order to measure the evaluation board the following is necessary:

DC Power Supply op to 30 mA at 1.5 V to 3.1 V

Two RF signal generators capable of generating RF signals at the LTE
operating frequency between 2300 MHz and 2690 MHz.

An RF spectrum analyzer that covers at least the operating frequency between
2300 MHz and 2690 MHz as well as a few of the harmonics. Up to 6 GHz should
be sufficient.
“Optional” a version with the capability of measuring noise figure is convenient

Amp meter to measure the supply current (optional)

A network analyzer for measuring gain, return loss and reverse isolation

Noise figure analyzer and noise source

Directional coupler

Proper RF cables
6. Connections and setup
The BGU8H1 LTE LNA evaluation board is fully assembled and tested (see Fig 5).
Please follow the steps below for a step-by-step guide to operate the LNA evaluation
board and testing the device functions.
1. Connect the DC power supply to the Vcc and GND terminals. Set the power supply to
the desired supply voltage, between 1.5 V and 3.1 V, but never exceed 3.1 V as it
might damage the BGU8H1.
2. Jumper JU1 is connected between the Vcc terminal of the evaluation board and the
Ven pin of the BGU8H1.
3. Connect the RF signal generator and the spectrum analyzer to the RF input and the
RF output of the evaluation board, respectively. Do not turn on the RF output of the
signal generator yet, set it to approximately -40 dBm output power at center
frequency of the wanted LTE-ban and\ set the spectrum analyzer at the same center
frequency and a reference level of 0 dBm.
4. Turn on the DC power supply and it should read approximately 4..5 mA.
5. Enable the RF output of the generator: The spectrum analyzer displays a tone
around –27 dBm.
6. Instead of using a signal generator and spectrum analyzer one can also use a
network analyzer in order to measure gain as well as in- and output return loss, P1dB
and IP3 (see Fig 6).
7. For noise figure evaluation, either a noise figure analyzer or a spectrum analyzer with
noise option can be used. The use of a 5 dB noise source, like the Agilent 364B is
recommended. When measuring the noise figure of the evaluation board, any kind of
adaptors, cables etc between the noise source and the evaluation board should be
minimized, since this affects the noise figure (see Fig 7).
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
7 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
AN11514
Application note
Fig 5.
Evaluation board including its connections
Fig 6.
2-Tone Setup for 50Ω LNA board tests (S-Parameters, P1dB and 2-Tone-tests)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
8 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
Fig 7.
Setup diagram for 50Ω LNA-board NF-Measurements.
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
9 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
7. Evaluation Board Tests
7.1 S-Parameters
The measured S-Parameters and stability factor K are given in the figures below. For the
measurements, a BGU8H1-LNA EVB is used ((see Fig 5). Measurements have been
carried out using the setup shown in Fig 6.
S21 (dB)
S11 & S22
20
0
15
-5
10
-10
0
Spar [dB]
S21 [dB]
5
-5
-10
-15
S11
S22
-20
-15
-20
-25
-25
-30
0.0E+00
2.0E+09
4.0E+09
6.0E+09
Freq [Hz]
8.0E+09
-30
0.0E+00
1.0E+10
2.0E+09
4.0E+09
6.0E+09
Freq [Hz]
8.0E+09
1.0E+10
K-factor
S12(dB)
1000
0
-10
100
-20
K-factor
S12 [dB]
-30
-40
-50
-60
10
1
0.1
-70
-80
0.0E+00
Fig 8.
2.0E+09
4.0E+09
6.0E+09
Freq [Hz]
8.0E+09
1.0E+10
0.01
0.0E+00
2.0E+09
4.0E+09
6.0E+09
Freq [Hz]
8.0E+09
1.0E+10
BGU8H1 S-Parameters (typical values). Vcc=2.8V, Pin=-45dBm.
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
10 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
S11 & S22
0
15
-5
14
-10
Spar [dB]
S21 [dB]
S21 (dB)
16
13
-15
12
-20
11
-25
10
2.2E+09
2.4E+09
2.6E+09
-30
2.2E+09
2.8E+09
2.4E+09
2.6E+09
2.8E+09
2.6E+09
2.8E+09
Freq [Hz]
Freq [Hz]
K-factor
S12(dB)
2
-10
1.9
-15
1.8
1.7
K-factor
S12 [dB]
-20
-25
-30
1.6
1.5
1.4
1.3
1.2
-35
1.1
-40
2.2E+09
2.4E+09
2.6E+09
2.8E+09
1
2.2E+09
Fig 9.
2.4E+09
Freq [Hz]
Freq [Hz]
BGU8H1 S-Parameters (typical values). Vcc=2.8V, Pin=-45dBm (freq. range zoomed in).
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
11 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
7.2 1dB gain compression
Strong in-band cell phone TX jammers can cause linearity problems and result in thirdorder intermodulation products in the LTE frequency band. In this chapter the effects of
these strong signals is shown. For the measurements, a BGU8H1-LNA EVB is used
((see Fig 5). Measurements have been carried out using the setup shown in Fig 6
The gain as function of input power of the DUT was measured between port RFin and
RFout of the EVB at the LTE center frequencies.
The figures below show the gain compression curves at LNA-board.
BGU8H1, 50745#1
BGU8H1, 50745#1
P1dB, f=2350MHz
P1dB, f=2655MHz
16
16
14
14
12
12
10
Vcc=1.8V
8
Vcc=2.8V
Vcc=3.1V
6
Gain [dB]
Gain [dB]
10
Vcc=1.8V
8
Vcc=2.8V
Vcc=3.1V
6
Vcc=1.5V
Vcc=1.5V
4
4
2
2
0
0
-30
-25
-20
-15
-10
-5
0
-30
-25
Pin [dBm]
Application note
-15
-10
-5
0
Pin [dBm]
Fig 10. Gain versus inp. power , f=2350MHz (band 40)
AN11514
-20
Fig 11. Gain versus input power , f=2655MHz (band 7)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
12 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
7.3 2-Tone Test
The figures below show the spectra of the DUT caused by a 2-Tone input signal around
the centre of the LTE-bands. For the measurements, a BGU8H1-LNA EVB is used ((see
Fig 5). Measurements have been carried out using the setup shown in Fig 6.
BGU8M1_50744#1
BGU8H1_50745#1
2-Tone Test, band 7
2-Tone Test, band 40
0
0
-10
-10
-20
-20
-30
-30
-40
Vcc=1.8V
-50
Vcc=2.8V
Vcc=3.1V
-60
Pout [dBm]
Pout [dBm]
-40
Vcc=1.8V
-50
Vcc=2.8V
Vcc=3.1V
-60
Vcc=1.5V
Vcc=1.5V
-70
-70
-80
-80
-90
-90
-100
2.34E+09
2.35E+09
2.36E+09
2.37E+09
2.38E+09
-100
2.64E+09
2.65E+09
Freq [Hz]
Application note
2.67E+09
2.68E+09
Freq [Hz]
Fig 12. Gain versus input power, band 40
AN11514
2.66E+09
Fig 13. Gain versus input power, band 7
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
13 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
7.4 Enable Timing Test
The following diagram shows the setup to test LNA Turn ON and Turn OFF time.
Set the waveform generator to square mode and the output amplitude at 3Vrms with
high output impedance. The waveform generator has adequate output current to drive
the LNA therefore no extra DC power supply is required which simplifies the test
setup.
Set the RF signal generator output level to -20dBm between 2300 MHz and 2690 MHz
and increase its level until the output DC on the oscilloscope is at 5mV on
1mV/division, the signal generator RF output level is approximately -3dBm.
It is very important to keep the cables as short as possible at input and output of the
LNA so the propagation delay difference on cables between the two channels is
minimized.
It is also critical to set the oscilloscope input impedance to 50ohm on channel 2 so the
diode detector can discharge quickly to avoid a false result on the Turn OFF time
testing.
Fig 14. Setup Enable Timing Test
The series capacitor will influence the Ton/Toff switching time. When the default value
C2=1nF is used, Ton will approximately be 9us. By reducing C2 to 100pF, Ton is
reduced to approximately 4µs (see Fig 15 and Fig 16).
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
14 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
Fig 15. Results Enable Timing Test. Series capacitor C2=1nF. Ton~9µs (left) and Toff~200ns (right).
Fig 16. Results Enable Timing Test. Series capacitor C2=100pF. Ton~4µs (left).
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
15 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
8. Typical LNA evaluation board results
Table 2.
Typical results measured on the evaluation Board.
Typical LNA evaluation board results
Temp = 25 °C
Parameter
Supply Voltage
Supply Current
Noise Figure
Freq. [MHz]
2350
2655
Symbol
Unit
Vcc
Icc
NF
1.5
4.3
1.0
1.2
1.8
4.8
1.0
1.2
2.8
5.0
1.0
1.1
3.1
5.0
1.0
1.1
V
mA
dB
Note
[1]
Power Gain
2350
2655
Gp
12.7
11.7
13.0
12.0
13.0
12.5
13.3
12.3
dB
Input Return Loss
2350
2655
RLin
7
8
8
8
9
9
8
9
dB
Output Return Loss
2350
2655
RLout
22
27
20
20
20
20
23
26
dB
Reverse Isolation
2350
2655
ISOrev
22
22
20
20
22
22
22
22
dB
Input 1dB Gain Compression
2350
2655
Pi1dB
-11.7
-10.2
-8.0
-7.0
-3.0
-1.0
-0.5
0.6
dBm
Output 1dB Gain Compression
2350
2655
Po1dB
0.0
0.5
4.0
4.0
9.0
10.5
11.8
11.9
dBm
Input third order intercept point
2350
2655
IIP3
-2.7
-0.8
2.0
5.0
6.0
8.0
5.4
8.6
dBm
[2]
Output third order intercept point
2350
2655
OIP3
10.0
10.9
15.0
17.0
19.0
20.5
18.7
20.9
dBm
[2]
Ton
Toff
4
1
4
1
4
1
4
1
µs
µs
Power settling time
[1] Including PCB losses
[2] f = f_center_band; Delta_f=10MHz
Pin_f1 = Pin_f2 = -15 dBm
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
16 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
9. Improved in band blocking performance modification
In some cases a strong in-band jamming signal is present, reducing the sensitivity. This
in band blocking test case in illustrated below in Fig 17. A jamming signal causes an
increase of the noise-floor closely around the jamming frequency, which reduces the
sensitivity for a wanted signal overlapping with the noise band.
Fig 17. Example in band blocking test case
A solution is to make a low impedance path for low frequencies at the input of the LNA.
This can be done by an additional shunt inductor L2 with a high value, as shown in the
circuit of Fig 18 and board detail in Fig 19 (L1 and C2 have been swapped compared
with Fig 2 to avoid a DC-path between RFin and GND). For L2 a Murata LQW15 wire
wound inductor with a value of 82nH is used.
BGU8x1
LTE LNA
EVB
X3
GND
Ven
Vcc
X4
JU1
C1
6
RF in
X1
2
L1
C2 5
L2
RF out
3
BGU8x1
4
X2
1
Fig 18. Circuit diagram of modified BGU8x1 LTE LNA evaluation board (L2=82nH)
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
17 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
Fig 19. Detail of modified BGU8x1 LTE LNA evaluation board
The measured performance is given in Fig 20 and Table 3. The Gain and the NF are
almost equal for both versions.
Fig 20. Measured performance modified BGU8x1 LTE LNA evaluation board
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
18 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
Table 3.
Typical results measured on the modified evaluation Board.
Temp [°C]
P_Spar [dBm]
Parameter
Supply Voltage
Typical LNA evaluation board results
BU8H1_157716
3 EVB's
Default
L2=82nH
Symbol
typ
typ
Freq. [MHz]
Vcc
2.80V
2.80V
25
-45
Noise Figure
2350
2500
2655
Power Gain
2350
2500
2655
Input Return Loss
2350
2500
2655
Output Return Loss
2350
2500
2655
Reverse Isolation
2350
2500
2655
Input 1dB Gain Compression
2350
2500
2655
Output 1dB Gain Compression 2350
2500
2655
Input third order intercept point 2350
(average lsb&usb)
2500
2655
Output third order intercept point2350
(average lsb&usb)
2500
2655
NF
Gp
RLin
RLout
ISOrev
Pi1dB
Po1dB
IIP3
OIP3
Delta
typ
Unit
2.80V
V
1.05
1.04
-0.01
13.0
12.5
12.0
8.7
8.3
8.5
20.6
22.7
23.5
22.7
22.5
22.4
-0.8
-0.3
0.4
11.1
11.2
11.3
4.2
5.7
5.7
17.4
18.1
17.4
12.8
12.3
11.7
6.2
6.0
5.9
17.9
20.4
23.6
22.9
22.7
22.6
-0.3
0.5
1.0
11.5
11.8
11.7
4.3
6.3
6.2
17.6
18.8
18.1
-0.1
-0.2
-0.2
-2.5
-2.3
-2.6
-2.7
-2.2
0.1
0.2
0.2
0.2
0.5
0.8
0.6
0.4
0.7
0.4
0.1
0.6
0.5
0.2
0.7
0.7
Notes
dB
dB
dB
dB
dB
dBm
dBm
dBm
dBm
Note: Noise Figure is including PCB losses.
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
19 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
10. Legal information
10.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
10.2 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s
own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
AN11514
Application note
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
10.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
20 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
11. List of figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
BGU8x1 LTE LNA evaluation board (used for
BGU8L1, BGU8M1 and BGU8H1) .................... 3
Circuit diagram of the BGU8x1 LNA evaluation
board (used for BGU8L1, BGU8M1 and
BGU8H1) .......................................................... 4
Printed-Circuit Board layout of the BGU8x1LNA
evaluation board (used for BGU8L1, BGU8M1
and BGU8H1) ................................................... 5
Stack of the PCB material ................................. 5
Evaluation board including its connections ....... 8
2-Tone Setup for 50Ω LNA board tests (SParameters, P1dB and 2-Tone-tests) ............... 8
Setup diagram for 50Ω LNA-board NFMeasurements. ................................................. 9
BGU8H1 S-Parameters (typical values).
Vcc=2.8V, Pin=-45dBm. .................................. 10
BGU8H1 S-Parameters (typical values).
Vcc=2.8V, Pin=-45dBm (freq. range zoomed in).
........................................................................ 11
Gain versus inp. power , f=2350MHz (band 40)
........................................................................ 12
Gain versus input power , f=2655MHz (band 7)
........................................................................ 12
Gain versus input power, band 40 .................. 13
Gain versus input power, band 7 .................... 13
Setup Enable Timing Test ............................... 14
Results Enable Timing Test. Series capacitor
C2=1nF. Ton~9µs (left) and Toff~200ns (right).
........................................................................ 15
Results Enable Timing Test. Series capacitor
C2=100pF. Ton~4µs (left). .............................. 15
Example in band blocking test case ................ 17
Circuit diagram of modified BGU8x1 LTE LNA
evaluation board (L2=82nH) ........................... 17
Detail of modified BGU8x1 LTE LNA evaluation
board ............................................................... 18
Measured performance modified BGU8x1 LTE
LNA evaluation board ..................................... 18
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
21 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
12. List of tables
Table 1.
Table 2.
Table 3.
BOM of the BGU8H1 LTE LNA evaluation board
.......................................................................... 6
Typical results measured on the evaluation
Board. ............................................................. 16
Typical results measured on the modified
evaluation Board. ............................................ 19
AN11514
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 January 2016
© NXP B.V. 2016. All rights reserved.
22 of 23
AN11514
NXP Semiconductors
BGU8H1 LTE LNA EVB
13. Contents
1.
2.
3.
3.1
3.2
4.
4.1
4.2
5.
6.
7.
7.1
7.2
7.3
7.4
8.
9.
10.
10.1
10.2
10.3
11.
12.
13.
Introduction ......................................................... 3
General description ............................................. 4
BGU8H1 LTE LNA evaluation board .................. 4
Application Circuit .............................................. 4
PCB Layout ........................................................ 5
Bill of materials.................................................... 6
BGU8H1 ............................................................. 6
Series inductor ................................................... 6
Required Equipment ........................................... 7
Connections and setup ....................................... 7
Evaluation Board Tests .................................... 10
S-Parameters ................................................... 10
1dB gain compression ...................................... 12
2-Tone Test ...................................................... 13
Enable Timing Test .......................................... 14
Typical LNA evaluation board results ............. 16
Improved in band blocking performance
modification ....................................................... 17
Legal information .............................................. 20
Definitions ........................................................ 20
Disclaimers....................................................... 20
Trademarks ...................................................... 20
List of figures..................................................... 21
List of tables ...................................................... 22
Contents ............................................................. 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP B.V. 2016.
All rights reserved.
For more information, visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 22 January 2016
Document identifier: AN11514
Similar pages