Data Sheet

Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MC13852
Rev. 2.0, 12/2010
MC13852
Package Information
Plastic Package: MLPD-8
2.0 x 2.0 x 0.6 mm
Case: 2128-01
MC13852
General Purpose Low Noise
Amplifier with Bypass Switch
1
Introduction
The MC13852 is a cost-effective high gain LNA with
low noise figure. This is the lower application frequency
version of the MC13851.
An integrated bypass switch is included to preserve high
input intercept performance in variable signal strength
environments and boosts dynamic range. On-chip bias
circuitry offers low system cost. The input and output
match are external to allow maximum design flexibility.
The external resistor used to set device current enables
balancing required linearity with low current
consumption. Gain is optimized for applications
<1000 MHz.
Ordering Information
Device
Device Marking
Package
MC13852EP
852
MLPD-8
Contents:
1
2
3
4
5
6
7
8
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Electrical Specifications . . . . . . . . . . . . . . . . . . .3
Applications Information . . . . . . . . . . . . . . . . . . .8
Printed Circuit Board and Bills of Materials . .14
Scattering and Noise Parameters . . . . . . . . . . .18
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Product Documentation . . . . . . . . . . . . . . . . . . .28
Revision History . . . . . . . . . . . . . . . . . . . . . . . . .28
The MC13852 is fabricated with an advanced RF
BiCMOS process using the eSiGe:C module and is
available in the 2 × 2 mm MLPD-8 leadless package,
offering a small, low height, easy-to-solder solution for
applications with tight printed circuit board placement
requirements.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006–2010. All rights reserved.
Introduction
1.1
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•
•
•
•
1.2
Features
The MC13852 is intended for applications from 400 to 1000 MHz; the MC13851 is for
applications >1000 MHz.
Gain: 20.3 dB (typ) at 434 MHz, 18.7 dB (typ) at 900 MHz.
Output third order intercept point (OIP3): 10.6 dBm at 434 MHz, 14.2 dBm (typ) dBm at 900 MHz.
Noise Figure (NF): 1.65 dB (typ) at 434 MHz, 1.2 dB at 900 MHz.
Output 1 dB compression point (P1dB): 7.8 dBm (typ) at 434 MHz, 9.6 dBm (typ) at 900 MHz.
IP3 Boost Circuitry.
Bypass mode return losses are comparable to active mode, for use in systems with filters and
duplexers.
Bypass mode improves dynamic range in variable signal strength environments.
Integrated logic-controlled standby mode with current drain < 1uA.
Total supply current variable from 3–6 mA using an external bias resistor.
Average current drain <0.6mA in a receiver lineup with 20% active / 80% bypass mode operation.
On-chip bias sets the bias point.
Bias stabilized for device and temperature variations.
MLPD-8 leadless package with low parasitics.
434 MHz and 900 MHz application circuit evaluation boards with characterization data are
available.
Available in tape and reel packaging.
Applications
Ideal for use in any RF product that operates between 400 MHz and 1 GHz, and may be applied in:
• Buffer amplifiers
• Mixers
• IF amplifiers
• Voltage-controlled oscillators (VCOs)
• Use with transceivers requiring external LNAs
• RF smart metering
• Mobile: Cellular front-end LNA, 2-way radios
• Auto: RKE, key fob, TPMS
• Low current drain/long standby time for extended battery life applications
Figure 1 shows a simplified block diagram, with the pinouts and the location of the pin 1 marking on the
package.
MC13852 Advance Information, Rev. 2.0
2
Freescale Semiconductor
Electrical Specifications
Emit
1
8
RF IN
Rbias
2
7
Band
RF OUT
3
6
Gain
5
Enable
Logic
Vcc
4
Figure 1. Simplified Block Diagram
2
Electrical Specifications
Table 1 lists the maximum ratings for the device.
Table 1. Maximum Ratings
Ratings
Symbol
Value
Unit
Supply Voltage
VCC
3.3
V
Storage Temperature Range
Tstg
-65 to 150
°C
Operating Ambient Temperature Range
TA
-30 to 85
°C
RF Input Power
Prf
10
dBm
Power Dissipation
Pdis
100
mW
Thermal Resistance, Junction to Case
RθJC
24
C/W
Thermal Resistance, Junction to Ambient, 4 Layer Board
RθJA
90
C/W
NOTES: 1. Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the limits in the Recommended Operating
Conditions and Electrical Characteristics tables.
2. ESD (electrostatic discharge) immunity meets Human Body Model (HBM) ≤200 V, Charge Device Model (CDM) ≤450 V, and
Machine Model (MM) ≤50 V. Additional ESD data available upon request.
Table 2 lists the recommended operating conditions.
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Min
Typ
Max
Unit
RF Frequency range
fRF
400
—
1000
MHz
Supply Voltage
VCC
2.3
2.75
3.0
Vdc
—
1.25
0
1.8
—
VCC
0.8
Vdc
Logic Voltage
Input High Voltage
Input Low Voltage
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
3
Electrical Specifications
Table 3 shows the use of the Gain, Enable and Band pins (along with the Vcc and RF out pins), to select
Active mode (High Gain), Bypass mode (Low Gain), or Standby mode (Disable) operation.
Table 3. Truth Table
Enable
Pin Function
Disable
Pin Name
Low Gain High Gain Low Gain High Gain
Logic Circuit Bias Vcc
Vcc
1
1
1
1
Toggles Gain Mode (Active or Bypass)
Gain
0
1
0
1
Enable
1
1
0
0
Band
1
1
1
1
Toggles LNA On/Off
Selects the LNA
NOTES: 1. Logic state "1" equals Vcc voltage. Logic state of "0" equals ground potential.
2. Vcc is inductively coupled to LNA Out pin and Vcc pin.
3. Minimum logic state "1" for enable and gain pins is 1.25V.
4. Maximum logic state "0" for enable and gain pins is 0.8V.
Table 4 lists electrical characteristics associated with noise performance measured in a 50Ω system.
Additional noise parameters are listed in Table 14 and Table 15. Also listed are the typical Icc and RF
turn-on times for the device.
Table 4. Electrical Characteristics (Vcc = 2.75 V, Ta = 25°C)
Characteristic
Insertion Gain
R1=1.2 kΩ, Freq=434 MHz
R1=1.2 kΩ, Freq=900 MHz
Symbol
Min
Typ
Max
Unit
|S21|2
20.4
16.4
21.9
18.3
—
dB
26.7
22
28.2
23.5
—
dB
NFmin
—
0.92
0.84
1.2
1.1
dB
Gnf
27.6
21
29.6
23
—
dB
—
—
6.4
9.6
1.37
—
usec
Maximum Stable Gain and/or Maximum Available Gain [Note1]
R1=1.2 kΩ, Freq=434 MHz
MSG, MAG
R1=1.2 kΩ, Freq=900 MHz
Minimum Noise Figure
R1=1.2 kΩ, Freq=434 MHz
R1=1.2 kΩ, Freq=900 MHz
Associated Gain at Minimum Noise Figure
R1=1.2 kΩ, Freq=434 MHz
R1=1.2 kΩ, Freq=900 MHz
Icc and RF Turn On Time
Enable trigger total time of 1.8 usec from 0 to 2.75 V
Icc rise time from 0 to 76% of final current level
Icc rise time from 0 to 87% of final current level
RF on time from leading edge of enable trigger to RF turn-on
NOTES: 1. Maximum Available Gain and Maximum Stable Gain are defined by the K factor as follows:
MAG=|S21/S12(K+/-sqrt(K2-1))|, if K>1,
MSG =|S21/S12|, if K<1
Table 5 lists the electrical characteristics measured on evaluation boards that are tuned for typical
application frequencies. Further details on the application circuits are shown in Section 4; details on the
boards are shown in Section 5.
MC13852 Advance Information, Rev. 2.0
4
Freescale Semiconductor
Electrical Specifications
Table 5. Electrical Characteristics Measured in Frequency Specific Tuned Circuits
(VCC = 2.775 V, TA = 25°C, Rbias = 2 kΩ, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency
f
—
434
—
MHz
Active RF Gain
G
19.3
20.3
—
dB
Active Noise Figure
NF
—
1.65
1.95
dB
Active Input Third Order Intercept Point
IIP3
-10.7
-9.7
—
dBm
Active Output 1 dB Compression Point
P1dB
6.8
7.8
—
dBm
Active Current @ 2.75 V, Rbias=1.2 kΩ
ICC
—
5.5
6.5
mA
Active Current @ 2.75 V, Rbias=1.5 kΩ
ICC
—
4.4
5.4
mA
Active Gain
S21
19
20.1
—
dB
Bypass RF Gain
G
-9.5
-8.5
—
dB
Bypass Noise Figure
NF
—
8.9
9.9
dB
Bypass Input Third Order Intercept Point
IIP3
24
25.1
—
dBm
—
—
4
20
µA
S21
-9.5
-8.5
—
dB
Frequency
f
—
900
—
MHz
Active RF Gain
G
17.6
18.6
—
dB
Active Noise Figure
NF
—
1.2
1.55
dB
Active Input Third Order Intercept Point
IIP3
-5.7
-4.4
—
dBm
Active Output 1 dB Compression Point
P1dB
8.5
9.6
—
dBm
Active Current @ 2.75 V, Rbias=1.2 kΩ
ICC
—
5.5
6.5
mA
Active Current @ 2.75 V, Rbias=1.5 kΩ
ICC
—
4.4
5.4
mA
Active Gain
S21
17.5
18.5
—
dB
Bypass RF Gain
G
-6.7
-5.7
—
dB
Bypass Noise Figure
NF
—
6.1
7.1
dB
Bypass Input Third Order Intercept Point
IIP3
25
26.7
—
dBm
—
—
4
10
µA
S21
-6.7
-5.7
—
dB
434 MHz
Bypass Current
Bypass Gain
900 MHz
Bypass Current
Bypass Gain
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
5
Electrical Specifications
Figure 2 and Figure 3 show maximum stable and maximum available gain and forward insertion gain
versus frequency for the packaged device in a 50Ω system using bias resistors of 1.5 kΩ and 1.2 kΩ.
32
30
MSG, MAG, [S21]2 (dB)
28
26
24
MSG/MAG (dB)
22
MSG
20
18
|s21|^2 (dB)
[S21]2
|S21|2
16
14
12
300 400 500 600 700 800 900 1000 1100 1200
Frequency (GHz)
Figure 2. Maximum Stable/Available Gain and Forward Insertion Gain vs. Frequency, Rbias = 1.5 kΩ
32
30
MSG, MAG, [S21]2 (dB)
28
26
MSG
24
22
20
MSG/MAG (dB)
|s21|^2 (dB)
[S21]2
|S21|2
18
16
14
12
300 400 500 600 700 800 900 1000 1100 1200
Figure 3. Maximum Stable/Available Gain and Forward Insertion Gain vs. Frequency, Rbias = 1.2 kΩ
MC13852 Advance Information, Rev. 2.0
6
Freescale Semiconductor
Electrical Specifications
40
35
30
25
20
15
10
5
0
1.1
NFmin
1
0.9
0.8
Gnf
0.7
0.6
0.3
0.5
0.7
0.9
Associated Gain
Minimum Noise Figure (dB)
Figure 4 and Figure 5 show minimum noise figure and associated gain versus frequency for the packaged
device in a 50Ω system using bias resistors of 1.5 kΩ and 1.2 kΩ.
NFmin
Gnf
1.1
Frequency (GHz)
40
35
30
25
20
15
10
5
0
‐5
‐10
Minimum Noise Figure (dB)
1.1
1
Gnf
0.9
0.8
NFmin
0.7
0.6
0.3
0.5
0.7
0.9
Associated Gain
Figure 4. Minimum Noise Figure and Associated Gain vs. Frequency, Rbias = 1.5 kΩ
NFmin
Gnf
1.1
Frequency (GHz)
Figure 5. Minimum Noise Figure and Associated Gain vs. Frequency, Rbias = 1.2 kΩ
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
7
Applications Information
Figure 6 shows the Icc current drain for a range of values for the external bias resistor Rbias.
6.5
6
5.5
y = 1.7619x2 ‐ 8.5883x + 13.293
R² = 0.9983
5
Icc (mA)
4.5
4
Icc mA
3.5
Poly. (Icc mA)
3
2.5
2
1.1
1.3
1.5
1.7
1.9
2.1
Rbias value (kohm)
Figure 6. Icc vs. Bias Resistor R1 Value
3
Applications Information
The MC13852 LNA is designed for applications in the 400 MHz to 1 GHz range. It has three different
modes: High Gain, Low Gain (bypass) and Standby. The LNA is programmable through the Gain and
Enable pins. The logic truth table is given in Table 3. The internal bypass switch is designed for broadband
applications.
One of the advantages of the MC13852 is the simplification of the matching network in both bypass and
amplifier modes. The bypass switch is designed so that changes of input and output return losses between
bypass mode and active mode are minimized and the matching network design is simplified.
In these application examples, a balance is made between the competing RF performance characteristics
of Icc, NF, gain, IP3, and return losses with unconditional stability. Conjugate matching is not used for the
input or output. Instead, matching which achieves a trade-off in RF performance qualities is used. For a
particular application or specification requirement, the matching can be changed to achieve enhanced
performance of one parameter.
Measurements are made at a bias of Vcc = 2.75 V. Frequency spacing for IP3 measurements is 200 kHz.
Non-linear measurements are made at Pin = -30 dBm. Typical application circuits are provided for
434 MHz and 900 MHz applications. Typical RF performance is shown for two values of bias resistor R1:
1.2 kΩ and 1.5 kΩ. These two current drain levels offer variations in intercept point, gain and noise figure.
Included with each application are the schematics and electrical performance.
• Section 4 provides the evaluation board layout and Bill of Material for the circuits.
• Section 5 provides Smith charts with gain and noise circles for each application frequency.
MC13852 Advance Information, Rev. 2.0
8
Freescale Semiconductor
Applications Information
3.1
434 MHz Application
This application was designed to provide typical NF = 1.65 dB, S21 gain = 20 dB, OIP3 =10.6 dBm at
434 MHz. Typical performance that can be expected from this circuit at 2.75 V is listed in Table 6. The
component values can be changed to enhance the performance of a particular parameter, but usually at the
expense of another. Two values of bias resistor R1 are shown to demonstrate performance for different IP3
and Icc requirements.
• Values of external resistor R1 are varied to adjust Icc and IP3.
• Inductor L3 provides bias to the logic circuit.
Figure 7 is the 434 MHz application schematic with package pinouts and the circuit component topology.
V cc
L3
270 nH
Enable
5
Logic
C3
2 2 pF
RF
OUT
3
R3
82 ohm
2
7
L1
27 nH
C5
33 pF
L2
4 7 nH
R2
30 ohm
Gain
6
Enable
Gain
4
C4
0.1
uF
R1
1.2 kohm
C2
47 pF
1
8
Rbias
Emit
.
C1
1 .3 pF
Figure 7. 434 MHz Application Schematic
Table 6. Typical 434 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25°C)
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency
f
—
434
—
MHz
RF Gain
High Gain
Bypass
G
19.3
-9.5
20.3
-8.5
—
—
dB
Output Third Order Intercept Point
High Gain
Bypass
OIP3
9.5
15.5
10.6
16.6
—
—
dBm
Input Third Order Intercept Point
High Gain
Bypass
IIP3
-10.7
24
-9.7
25.1
—
—
dBm
6.8
7.8
—
-13.5
-12.5
—
R1 = 1.2 kΩ
Out Ref P1dB
High Gain
In Ref P1dB
High Gain
P1dBout
P1dBin
dBm
dBm
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
9
Applications Information
Table 6. Typical 434 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25°C) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Noise Figure
High Gain
Bypass
NF
—
—
1.65
8.9
1.95
9.9
dB
Current Draw
High Gain
Bypass
ICC
—
—
5.5
4
6.5
20
mA
µA
Rbias R1 Value
—
—
1.2
—
kΩ
Input Return Loss
High Gain
Bypass
S11
—
—
-6.7
-17
-5.5
-15
dB
Gain
High Gain
Bypass
S21
19
-9.5
20.1
-8.5
—
—
dB
Reverse Isolation
High Gain
Bypass
S12
—
—
-35.5
-8.6
-33.5
-6.5
dB
Output Return Loss
High Gain
Bypass
S22
—
—
-14.5
-20.4
-12
-17
dB
Frequency
f
—
434
—
MHz
RF Gain
High Gain
Bypass
G
18.5
-9.4
19.5
-8.4
—
—
dB
Output Third Order Intercept Point
High Gain
Bypass
OIP3
6.8
15.4
7.9
16.5
—
—
dBm
Input Third Order Intercept Point
High Gain
Bypass
IIP3
-12.6
23
-11.6
24.9
—
—
dBm
5.2
6.2
—
-14.3
-13.3
—
R1 = 1.5 kΩ
Out Ref P1dB
High Gain
P1dBout
dBm
In Ref P1dB
High Gain
P1dBin
Noise Figure
High Gain
Bypass
NF
—
—
1.6
8.7
1.9
9.7
dB
Current Draw
High Gain
Bypass
ICC
—
—
4.4
4
5.4
20
mA
µA
Rbias R1 Value
—
—
1.5
—
kΩ
dBm
MC13852 Advance Information, Rev. 2.0
10
Freescale Semiconductor
Applications Information
Table 6. Typical 434 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25°C) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Input Return Loss
High Gain
Bypass
S11
—
—
-5.5
-17.2
-4.5
-15.5
dB
Gain
High Gain
Bypass
S21
18.3
-9.3
19.3
-8.3
—
—
dB
Reverse Isolation
High Gain
Bypass
S12
—
—
-35
-8.3
-32
-7.3
dB
Output Return Loss
High Gain
Bypass
S22
—
—
-13.9
-20.4
-11
-19
dB
3.2
900 MHz Application
This application circuit is designed to demonstrate performance at 900 MHz. Typical results of
NF = 1.2 dB, S21 gain = 18.5 dB, and OIP3 of 14.2 dBm.
By varying the value of resistor R1, the current draw and IP3 performance of the device can be tailored for
a particular application. Two values of bias resistor R1 are shown to demonstrate performance for different
IP3 and Icc requirements.
• Resistor R3 is used to de-Q output inductor L2 and adjust gain and return losses. Reducing R3
lowers gain and improves return losses.
• Inductor L1 can be raised in value at lower current operation to improve return losses.
Typical performance that can be expected from this circuit at 2.75 V is listed in Table 7.
Figure 8 is the 900 MHz application schematic with package pinouts and the circuit component topology.
Vcc
L3
270 nH
L2
10 nH
Enable
RF IN
Logic
Gain
L1
12 nH
6
C4
33 pF
4
Enable
Gain
5
C3
.01u
pF
R2
C2
20 ohm 2.4 pF
3
7
2
8
1
C1
3.9 pF
R1
1.2 kohm
RF
OUT
R3
200 ohm
Rbias
.
Figure 8. 900 MHz Application Schematic
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
11
Applications Information
Table 7. Typical 900 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25°C)
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency
f
—
900
—
MHz
RF Gain
High Gain
Bypass
G
17.6
-6.7
18.6
-5.7
—
—
dB
Output Third Order Intercept Point
High Gain
Bypass
OIP3
13
19.5
14.2
21
—
—
dBm
Input Third Order Intercept Point
High Gain
Bypass
IIP3
-5.4
25
-4.4
26.7
—
—
dBm
8.5
9.6
—
-9.9
-8.9
—
R1 = 1.2 kΩ
Out Ref P1dB
High Gain
P1dBout
dBm
In Ref P1dB
High Gain
P1dBin
Noise Figure
High Gain
Bypass
NF
—
—
1.2
6.1
1.55
7.1
dB
Current Draw
High Gain
Bypass
ICC
—
—
5.5
4
6.5
20
mA
µA
Rbias R1 Value
—
—
1.2
—
kΩ
Input Return Loss
High Gain
Bypass
S11
—
—
-8.8
-11
-7
-9
dB
Gain
High Gain
Bypass
S21
17.5
-6.7
18.5
-5.7
—
—
dB
Reverse Isolation
High Gain
Bypass
S12
—
—
-28
-5.7
-26.5
-4.7
dB
Output Return Loss
High Gain
Bypass
S22
—
—
-13
-25
-10
-20
dB
Frequency
f
—
900
—
MHz
RF Gain
High Gain
Bypass
G
17.2
-7.7
18.2
-5.7
—
—
dB
OIP3
12.1
19.8
13.1
21
—
—
dBm
dBm
R1 = 1.5 kΩ
Output Third Order Intercept Point
High Gain
Bypass
MC13852 Advance Information, Rev. 2.0
12
Freescale Semiconductor
Applications Information
Table 7. Typical 900 MHz Evaluation Board Performance (Vcc = 2.75V, TA = 25°C) (continued)
Characteristic
Input Third Order Intercept Point
High Gain
Bypass
Out Ref P1dB
High Gain
Symbol
Min
Typ
Max
Unit
IIP3
-6.2
25.5
-5.1
26.7
—
—
dBm
8.5
9.9
—
-10
-8.4
—
P1dBout
dBm
In Ref P1dB
High Gain
P1dBin
Noise Figure
High Gain
Bypass
NF
—
—
1.18
6.1
1.5
7.1
dB
Current Draw
High Gain
Bypass
ICC
—
—
4.4
4
5.4
20
mA
µA
Rbias R1 Value
—
—
1.5
—
kΩ
Input Return Loss
High Gain
Bypass
S11
—
—
-7.6
-11
-6.2
-9
dB
Gain
High Gain
Bypass
S21
17.2
-6.7
18.2
-5.7
—
—
dB
Reverse Isolation
High Gain
Bypass
S12
—
—
-27.7
-5.7
-26.7
-4.7
dB
Output Return Loss
High Gain
Bypass
S22
—
—
-12.5
-25
-10
-20
dB
dBm
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
13
Printed Circuit Board and Bills of Materials
4
Printed Circuit Board and Bills of Materials
Figure 9 is the drawing of the printed circuit board. Figure 11and Figure 12 are drawings of the evaluation
boards used for each of the application frequency designs described in Section 3. These drawings show the
boards with the circuit matching components placed and identified.
The Bill of Materials for the application frequency circuit boards is listed in Table 8 and Table 9. The
value, case size, manufacturer and circuit function of each component is shown.
Note: Dimensions are in inches and [mm].
Soldering Note: The center flag under the part must be soldered down to ground on the board.
Figure 9. Printed Circuit Board
MC13852 Advance Information, Rev. 2.0
14
Freescale Semiconductor
Printed Circuit Board and Bills of Materials
Figure 10 is a picture of a typical assembled evaluation board similar to the ones in the evaluation kits.
Figure 10. Typical Assembled Evaluation Board with SMA Connectors
Figure 11. 434 MHz Application Board
Table 8. Bill of Materials for 434 MHz Application Board
Component
Value
Case
Manufacturer
Comments
C1
1.3 pF
402
Murata
DC block, input match
C2
47 pF
402
Murata
DC block, input match
C3
22 pF
402
Murata
Output match
C4
0.1 uF
402
Murata
Low frequency bypass
C5
33 pF
402
Murata
RF bypass
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
15
Printed Circuit Board and Bills of Materials
Table 8. Bill of Materials for 434 MHz Application Board (continued)
Component
Value
Case
Manufacturer
Comments
L1
27 nH
402
Murata
Input match
L2
47 nH
402
Murata
Output match, bias decouple
L3
270 nH
402
Murata
Bias couple to logic
R1
1.2 kΩ
402
KOA
Bias set point
R2
30 Ω
402
KOA
Stability, lower gain
R3
82 Ω
402
KOA
L2 de-Q, gain adjust
Q1
MC13852
MLP 2x2
Freescale
SiGe LNA
Figure 12. 900 MHz Application Board
Table 9. Bill of Materials for 900 MHz Application Board
Component
Value
Case
Manufacturer
Comments
C1
3.9 pF
402
Murata
Input match
C2
2.4 pF
402
Murata
Output match
C3
0.1 uF
402
Murata
Low frequency bypass
C4
33 pF
402
Murata
RF bypass
L1
12 nH
402
Murata
Input match
L2
10 nH
402
Murata
Output match
MC13852 Advance Information, Rev. 2.0
16
Freescale Semiconductor
Printed Circuit Board and Bills of Materials
Table 9. Bill of Materials for 900 MHz Application Board (continued)
Component
Value
Case
Manufacturer
Comments
L3
270 nH
402
Murata
R1
1.2 kΩ
402
KOA
LNA bias
R2
20 Ω
402
KOA
Stability, lower gain
R3
200 Ω
402
KOA
De-Q L2, adjust gain, RLs
Q1
MC13852
MLP 2x2
Freescale
Bias couple to logic
SiGe LNA
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
17
Scattering and Noise Parameters
5
Scattering and Noise Parameters
Table 10 through Table 13 list the S parameters for the packaged part in a 50 Ω system for each of the
modes of operation and for two values of the external bias resistor.
Table 10. Scattering Parameters, Active Mode, Rbias = 1.2 kΩ
(Vcc = 2.75V, 25°C, 50Ω system)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
300
0.842
-6.5
14.329
149.3
0.013
88.9
0.952
-2.0
350
0.821
-7.5
13.624
146.1
0.015
89.9
0.939
-2.0
400
0.801
-8.1
12.975
143.0
0.017
90.0
0.927
-1.9
450
0.779
-8.6
12.343
140.3
0.019
90.2
0.915
-1.8
500
0.739
-11.2
11.895
136.6
0.021
89.5
0.909
1.5
550
0.728
-11.9
11.296
134.4
0.024
90.1
0.891
2.4
600
0.710
-12.2
10.764
132.4
0.025
90.3
0.882
3.1
650
0.691
-12.3
10.269
130.4
0.028
91.1
0.874
3.6
700
0.677
-12.1
9.820
129.0
0.030
91.4
0.863
4.3
750
0.662
-12.0
9.403
127.4
0.031
92.4
0.856
4.9
800
0.649
-12.1
8.955
126.3
0.033
92.9
0.849
5.8
850
0.636
-12.6
8.605
125.0
0.036
93.2
0.842
6.5
900
0.623
-11.8
8.263
123.9
0.037
93.7
0.832
7.0
950
0.610
-11.5
7.937
122.9
0.039
94.2
0.827
7.5
1000
0.599
-11.4
7.637
121.9
0.041
94.9
0.820
8.2
1050
0.588
-10.8
7.359
121.1
0.044
95.4
0.813
8.5
1100
0.576
-10.9
7.100
120.3
0.046
95.8
0.808
9.3
1150
0.565
-10.2
6.857
119.7
0.048
96.2
0.800
9.5
1200
0.554
-10.0
6.642
118.7
0.050
96.5
0.794
9.8
Table 11. Scattering Parameters, Active Mode, Rbias = 1.5 kΩ
(Vcc = 2.75V, 25°C, 50 Ω system)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
300
0.877
-5.4
11.365
155.1
0.013
89.7
0.972
-1.0
350
0.860
-6.3
10.935
152.4
0.015
90.0
0.963
-1.0
400
0.843
-7.0
10.523
149.8
0.017
90.5
0.953
-0.9
MC13852 Advance Information, Rev. 2.0
18
Freescale Semiconductor
Scattering and Noise Parameters
Table 11. Scattering Parameters, Active Mode, Rbias = 1.5 kΩ (continued)
(Vcc = 2.75V, 25°C, 50 Ω system)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
450
0.825
-7.6
10.136
147.5
0.020
90.8
0.944
-0.9
500
0.788
-10.4
9.908
144.0
0.022
89.8
0.943
2.2
550
0.777
-11.2
9.493
141.9
0.024
90.0
0.926
3.0
600
0.761
-11.8
9.128
139.9
0.026
90.5
0.918
3.6
650
0.743
-12.1
8.795
138.1
0.028
90.8
0.911
4.0
700
0.730
-12.1
8.513
136.7
0.030
91.2
0.901
4.4
750
0.713
-12.3
8.228
135.1
0.032
91.8
0.894
4.9
800
0.699
-12.6
7.875
134.0
0.034
92.1
0.887
5.8
850
0.686
-13.3
7.624
132.7
0.036
92.2
0.879
6.4
900
0.670
-12.7
7.375
131.5
0.038
92.9
0.870
6.8
950
0.655
-12.6
7.125
130.3
0.040
93.6
0.864
7.4
1000
0.642
-12.5
6.885
129.2
0.042
93.7
0.856
8.0
1050
0.630
-12.1
6.667
128.3
0.044
94.3
0.849
8.3
1100
0.616
-12.2
6.457
127.4
0.046
95.0
0.845
9.1
1150
0.603
-11.7
6.264
126.7
0.048
95.6
0.838
9.4
1200
0.592
-11.5
6.084
125.6
0.050
95.8
0.831
9.7
Table 12. Scattering Parameters, Bypass Mode, Rbias = 1.2 kΩ and 1.5 kΩ
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
300
0.593
-32.3
0.573
36.7
0.573
36.7
0.615
-27.7
350
0.540
-32.9
0.601
32.8
0.601
32.8
0.561
-27.6
400
0.496
-32.8
0.621
29.8
0.621
29.7
0.517
-26.8
450
0.459
-32.2
0.636
27.2
0.636
27.2
0.480
-25.6
500
0.413
-33.1
0.648
24.3
0.648
24.3
0.451
-20.2
550
0.391
-32.5
0.656
22.6
0.656
22.6
0.424
-17.7
600
0.368
-31.5
0.663
21.2
0.663
21.2
0.403
-15.3
650
0.348
-30.2
0.668
20.0
0.668
20.0
0.387
-13.1
700
0.333
-28.9
0.672
19.0
0.672
19.0
0.373
-10.8
750
0.318
-27.7
0.675
18.2
0.675
18.2
0.363
-8.4
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
19
Scattering and Noise Parameters
Table 12. Scattering Parameters, Bypass Mode, Rbias = 1.2 kΩ and 1.5 kΩ (continued)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
800
0.305
-26.7
0.678
17.4
0.678
17.4
0.353
-5.9
850
0.292
-25.8
0.68
16.8
0.679
16.7
0.345
-3.4
900
0.282
-24.4
0.682
16.2
0.682
16.2
0.337
-1.3
950
0.272
-23.2
0.683
15.8
0.683
15.7
0.332
0.6
1000
0.263
-22.3
0.685
15.3
0.684
15.3
0.327
2.8
1050
0.256
-21.1
0.685
15.0
0.685
15.0
0.323
4.5
1100
0.247
-20.3
0.686
14.6
0.686
14.6
0.320
6.5
1150
0.239
-19.2
0.687
14.3
0.687
14.3
0.316
8.1
1200
0.231
-18.4
0.688
14.1
0.688
14.1
0.314
9.5
Table 13. Scattering Parameters, Standby Mode, Rbias = 1.2 kΩ and 1.5 kΩ
(Vcc = 2.75V, 25°C, 50 Ω system)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
300
0.974
-0.3
0.013
95.0
0.014
94.8
0.996
3.5
350
0.973
-0.2
0.016
95.5
0.016
95.1
0.994
4.1
400
0.972
-0.2
0.018
96.2
0.018
95.5
0.993
4.7
450
0.971
-0.1
0.020
96.7
0.021
96.5
0.992
5.2
500
0.956
-2.7
0.023
95.1
0.023
95.1
1.007
8.5
550
0.960
-3.2
0.026
95.8
0.026
96.0
0.999
9.6
600
0.958
-3.6
0.028
96.2
0.028
95.9
1.000
10.4
650
0.953
-3.7
0.031
96.7
0.031
96.6
1.001
11.0
700
0.952
-3.9
0.033
97.1
0.033
97.0
0.997
11.7
750
0.949
-4.1
0.036
97.5
0.036
97.5
0.998
12.4
800
0.946
-4.6
0.039
97.7
0.039
97.7
0.998
13.2
850
0.940
-5.2
0.041
98.1
0.041
97.9
0.998
14.0
900
0.941
-5.1
0.044
98.3
0.044
98.2
0.994
14.5
950
0.937
-5.3
0.047
98.8
0.047
98.8
0.994
15.0
1000
0.934
-5.7
0.049
98.9
0.049
98.8
0.993
15.6
MC13852 Advance Information, Rev. 2.0
20
Freescale Semiconductor
Scattering and Noise Parameters
Table 13. Scattering Parameters, Standby Mode, Rbias = 1.2 kΩ and 1.5 kΩ (continued)
(Vcc = 2.75V, 25°C, 50 Ω system)
S11
S21
S12
S22
f (MHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
1050
0.931
-5.8
0.052
99.2
0.052
99.1
0.992
15.9
1100
0.925
-6.3
0.055
99.3
0.055
99.3
0.993
16.6
1150
0.923
-6.4
0.058
99.6
0.058
99.6
0.990
16.9
1200
0.919
-6.7
0.061
99.7
0.061
99.6
0.989
17.2
Table 14 and Table 15 list the noise parameters for the packaged part, as measured in a 50Ω system for
active mode operation for two values of the external bias resistor.
Table 14. Active Mode Noise Parameters, Rbias = 1.2 kΩ
(Vcc = 2.75V, 25°C, 50Ω System, Icc = 4.8 mA)
Freq
Fmin
Gamma Opt
Ga
Rn
MHz
dB
Mag
Angle
dB
400
0.94
0.244
4.2
10.0
30.86
450
0.92
0.261
1.5
10.0
29.62
500
0.90
0.273
-0.5
10.0
28.51
700
0.86
0.289
-4.2
10.0
25.18
800
0.85
0.283
-4.6
9.5
23.99
900
0.84
0.274
-4.9
9.5
22.99
1000
0.85
0.265
-5.8
9.5
22.09
1200
0.88
0.262
-12.3
9.5
20.16
Table 15. Active Mode Noise Parameters, Rbias = 1.5 kΩ
(Vcc = 2.75V, 25°C, 50Ω System, Icc = 3.8 mA)
Freq
Fmin
Gamma Opt
Ga
Rn
MHz
dB
Mag
Angle
dB
400
0.82
0.313
0.23
10.5
30.82
450
0.83
0.323
0.5
10.5
29.52
500
0.85
0.331
-1.0
10.5
28.37
700
0.90
0.337
-4.3
10.5
24.94
800
0.92
0.331
-5.0
10.5
23.75
900
0.94
0.322
-5.7
10.5
22.76
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
21
Scattering and Noise Parameters
Table 15. Active Mode Noise Parameters, Rbias = 1.5 kΩ
(Vcc = 2.75V, 25°C, 50Ω System, Icc = 3.8 mA)
1000
0.95
0.313
-6.8
10.5
21.87
1200
0.96
0.304
-11.7
10.5
19.94
Figure 13 through Figure 16 are the constant noise figure and gain circles with input and output stability
regions shown on Smith charts. Gamma opt, noise resistance and stability at the frequency are shown for
two values of the external bias resistor at 450, 700, 900 and 1000 MHz.
MC13852 Advance Information, Rev. 2.0
22
Freescale Semiconductor
Scattering and Noise Parameters
Rbias = 1.2 kΩ
Rbias = 1.5 kΩ
Figure 13. Constant Noise Figure and Gain Circles, 450 MHz
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
23
Scattering and Noise Parameters
Rbias = 1.2 kΩ
Rbias = 1.5 kΩ
Figure 14. Constant Noise Figure and Gain Circles, 700 MHz
MC13852 Advance Information, Rev. 2.0
24
Freescale Semiconductor
Scattering and Noise Parameters
Rbias = 1.2 kΩ
Rbias = 1.5 kΩ
Figure 15. Constant Noise Figure and Gain Circles, 900 MHz
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
25
Scattering and Noise Parameters
Rbias = 1.2 kΩ
Rbias = 1.5 kΩ
Figure 16. Constant Noise Figure and Gain Circles, 1000 MHz
MC13852 Advance Information, Rev. 2.0
26
Freescale Semiconductor
Packaging
6
Packaging
Figure 17 and Figure 18 are the package drawings with dimensions for the MLPD-8, 2 × 2 × 0.6 mm,
package.
Figure 17. Outline Dimensions for MLPD-8
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
27
Product Documentation
Figure 18. Packaging Details
7
Product Documentation
This data sheet is labeled as a particular type: Product Preview, Advance Information, or Technical Data.
Definitions of these types are available at: http://www.freescale.com.
8
Revision History
Table 16 summarizes revisions to this document since the last revision.
Table 16. Revision History
Revision
Description of Changes
2.0
• Updated entire document for changes due to increased operating frequency range (now 400–1000 MHz, was
800–1000 MHz) and increased operating ambient temperature range (now -40 to 85°C, was -30 to 85°C), and to
the change in packaging from MLF8 to MLPD-8 (Section 6).
• Electrical characteristics (Section 2) were updated.
• New application examples (Section 3) for 434 and 900 MHz replace previous examples for 880 and 950 MHz.
• For the new application examples (Section 3), printed circuit board layouts were added and bills of materials were
updated (Section 4).
• Scattering and noise parameters (with Smith charts for 450, 700, 900, and 1000 MHz) were added in Section 5.
MC13852 Advance Information, Rev. 2.0
28
Freescale Semiconductor
Revision History
MC13852 Advance Information, Rev. 2.0
Freescale Semiconductor
29
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Document Number: MC13852
Rev. 2.0
12/2010
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