ST8R00 Micropower 1 A synchronous step-up DC-DC converter Features ■ Output voltage adjustable from 6 V to 12 V ■ Output voltage accuracy: ± 2% ■ Output current up to 1 A ■ Low ripple voltage: 5 mV (typ.) ■ Synchronous rectification ■ High 90% efficiency: VO = 9 V (typ.) ■ Few external components ■ Thermal shutdown protection ■ Very small DFN8 (4 x 4 mm) package DFN8 4 x 4 mm Description The ST8R00 is a synchronous PWM step-up DCDC converter. The device is able to provide an output voltage in the range of 6 to 12 V with an input voltage from 4 to 6 V. The high switching frequency (1.7 MHz) permits the use of tiny surface-mount components. In addition to the resistor divider to set the output voltage value, only an inductor and two capacitors are required. Moreover, a low output ripple is guaranteed by the current mode PWM topology and by the use of low ESR SMD ceramic capacitors. The device is available in a very small DFN8 (4 x 4 mm) package. Table 1. Device summary Part number Order code Output voltage ST8R00 ST8R00WPUR ADJ February 2012 Doc ID 13449 Rev 2 1/18 www.st.com 18 Contents ST8R00 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 Doc ID 13449 Rev 2 ST8R00 1 Block diagram Block diagram Figure 1. Schematic diagram LX Thermal OUT INH Inhibit PGND PWM Control FB IN VREF PGND Doc ID 13449 Rev 2 GND 3/18 Pin configuration 2 4/18 ST8R00 Pin configuration Figure 2. Pin connections (top view) Table 2. Pin description Pin n° Symbol Name and function 1 LX 2 PGND Power ground 3 GND Analog ground 4 IN Power input for analog circuit 5 FB Feedback 6 INH Inhibit. Connecting the pin to a voltage higher than 2 V = device ON. Connecting the pin to a voltage lower than 0.8 V = device OFF, resulting in no current flow to the load 7 HV Trimming (floating or connected to GND) 8 OUT Output voltage EXP pad GND Exposed pad. Must be connected to GND Switching output Doc ID 13449 Rev 2 ST8R00 3 Typical application circuit Typical application circuit Figure 3. Application circuit VI L=4.7µH IN VO LX OUT INH R1 ST8R00 CI=10µF GND PGND Doc ID 13449 Rev 2 FB R2 CO=10µF 5/18 Maximum ratings ST8R00 4 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Unit VO Output voltage 16 V VI Input voltage 6 V VINH Inhibit voltage 6 V VLX LX pin voltage 16 V ILX LX pin output current Internally limited TSTG Storage temperature range -50 to 150 °C TOP Operating junction temperature range -25 to 125 °C Value Unit Table 4. Thermal Data Symbol Parameter RthJC Thermal resistance junction-case 10 °C/W RthJA Thermal resistance junction-ambient 50 °C/W Table 5. Symbol 6/18 Value ESD Performance Parameter Test conditions Value Unit ESD ESD protection voltage HBM 4 KV ESD ESD protection voltage MM 500 V Doc ID 13449 Rev 2 ST8R00 5 Electrical characteristics Electrical characteristics VI = 5 V, VINH = 2 V, IO = 100 mA, TJ = - 25 °C to 125 °C, CI = CO = 10 µF(X7R), L = 4.7 µH unless otherwise specified. Table 6. Electrical characteristics Symbol VO Parameter Output voltage VSTART-UP Start-up voltage VI Test conditions (1) Min. Typ. 6 IO = 400mA, VI rising Input voltage range 3 4 VFB Feedback voltage IO = 50mA VFB_OFF Feedback voltage IO = 0, VINH = 0 IFB Feedback current Supply current 1.195 1.22 Max. Unit 12 V 3.5 V 6 V 1.245 V 0 V VFB = 0, VINH = 2V 600 nA To be measured at VI, VO = 7V, no load 10 mA RDSON_N Internal N channel RDSON ILX = 400mA 300 RDSON_P Internal P channel RDSON ILX = 400mA 300 ISUPPLY mΩ ILX(leak) Internal leakage current VLX = 4V, VFB = 2V, VINH = 0 ILX(LIM) LX current limitation VLX = 4V fOSC Oscillator frequency To be measured on LX pin DTY Max. oscillator duty cycle To be measured on LX pin 90 IO = 50mA, VO = 7V 85 IO = 500mA, VO = 9V 90 IO = 1A, VO = 9V 90 Eff Efficiency VINH_H Inhibit threshold high VINH_L Inhibit threshold low VI = 4 to 6V, IO = 50mA Inhibit pin current VINH = VI = 5V IINH TSHDN THYS 0.5 3 0.8 1.2 µA A 1.4 MHz % % 2 V Thermal shut down (2) 0.8 2 130 Thermal shut down hysteresis (2) µA 150 °C 15 °C ΔVO/ΔVI Line transient response VI from 4 to 5.5V, IO= 500mA (2) -5 5 %VO ΔVO/ΔIO Load transient response VI = 5V, IO from 10mA to 500mA, VO = 7V (2) -5 5 %VO ΔVO/ΔVI Start-up transient VI from 0 to 5V, IO = 500mA -10 10 %VO TSTART Start-up time VINH from 0 to 5V, IO = 100mA 500 µs 1. For VO higher than 9 V the maximum output current capability is reduced according to LX current limitation 2. Guaranteed by design Doc ID 13449 Rev 2 7/18 Typical characteristics ST8R00 Typical characteristics Figure 4. L = 4.7 µH, CI = CO = 10 µF. Voltage feedback vs. temperature Figure 5. Feedback current vs. temperature 700 1.3 1.28 1.26 1.24 1.22 1.2 1.18 1.16 1.14 1.12 1.1 VI=5V, VINH=2V, No Inductor, No Bridge 600 500 IFB [nA] VFB [mV] 6 400 300 200 100 VI=VINH=5V, IO=50mA 0 -100 -75 -50 -25 0 25 50 75 -75 100 125 150 175 -50 -25 0 25 Supply current vs. temperature (VI = VINH = 5 V) 20 VI=VINH=5V, No Load 18 16 14 12 10 8 6 4 2 0 -75 -50 -25 0 25 50 Figure 7. @VO=7V 15 10 5 VI=5,VINH=2V,No Load, VO@ 7V 0 -75 75 -50 -25 0 25 100 125 150 175 Supply current vs. temperature (VFB = 2 V) Figure 9. 750 ILX [A] I SUPPLY [ µA ] 700 650 600 550 VI = VINH = 5 V, VFB = 2 V 450 No resistors bridge and inductor directly to VI 400 - 75 - 50 - 25 0 25 50 75 100 125 150 175 75 100 125 150 175 LX current limitation vs. temperature 4 3.5 3 2.5 2 1.5 1 0.5 0 VIN=VINH=5V, @VO<10% -75 -50 -25 0 25 50 T [°C] T [°C] 8/18 50 T [°C] 800 500 100 125 150 175 Supply current vs. temperature (VINH = 2 V) T [°C] Figure 8. 75 20 ISUPPLY [mA] I SUPPLY [mA] Figure 6. 50 T [°C] T [°C] Doc ID 13449 Rev 2 75 100 125 150 175 ST8R00 Typical characteristics Figure 10. Inhibit voltage vs. temperature (VI = 4 V) Figure 11. Inhibit voltage vs. temperature (VI = 6 V) 3 3 VI=4V, VINH from 0 to 2V, IO=50mA ON OFF 2 1.5 VI=6V, VINH from 0 to 2V, IO=50mA 2 1.5 1 1 0.5 0.5 0 0 -75 -50 -25 0 25 50 75 -75 100 125 150 175 -50 -25 0 25 VI= from 4V to 6V, IO=1A [email protected] -75 -50 -25 0 25 50 75 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 [email protected] -75 100 125 150 175 -50 -25 0 25 Dutycycle MAX [%] VI=VINH=5V, No Inductor, No Load 1.3 1.1 0.9 0.7 0.5 25 50 75 100 125 150 175 Figure 15. Max oscillator duty cycle vs. temperature 1.7 0 50 T [°C] Figure 14. Oscillator frequency vs. temperature -75 -50 -25 100 125 150 175 VI=5V, IO from 100mA to 1A T [°C] 1.5 75 Figure 13. Load regulation vs. temperature LOAD [%VO/ΔIO] LINE [%VO/ΔVI] Figure 12. Line regulation vs. temperature 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 50 T [°C] T [°C] PWM freq.[MHz] ON OFF 2.5 VINH [V] VINH [V] 2.5 75 100 125 150 175 100 97.5 95 92.5 90 87.5 85 82.5 80 VI=VINH=5V, VFB=GND, No Inductor -75 -50 -25 0 25 50 75 100 125 150 175 T [°C] T [°C] Doc ID 13449 Rev 2 9/18 Typical characteristics ST8R00 0.1 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 Figure 17. Internal leakage current vs. temperature (VI = 5 V) 0.6 0.5 ILX (leak)[uA] ILX (leak)[mA] Figure 16. Internal leakage current vs. temperature (VI = VINH = 5 V) 0.4 0.3 VI=5 , VINH=GND, VFB=2V, VLX=4V, No Inductor 0.2 0.1 VI=VINH=5V, VFB=2V, VLX=4V, No Inductor 0 -0.1 -75 -50 -25 0 25 50 75 -75 100 125 150 175 -50 -25 0 25 T [°C] Figure 18. NMOS switch on resistance vs. temperature VI=5V 400 RDSON-P [mΩ ] 400 RDSON-N [mΩ] 100 125 150 175 500 VI=5V 300 200 100 0 300 200 100 0 -75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 T [°C] VO@7V VI= VINH=5V, L=10µH, IO= from 0A to 1A 0 100 200 300 400 500 600 IO [mA] 50 75 100 125 150 175 Figure 21. Efficiency vs. output current Efficiency [%] 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 0.10 0.00 25 T [°C] Figure 20. Efficiency vs. output current (L = 10 µH) Efficiency [%] 75 Figure 19. PMOS switch on resistance vs. temperature 500 10/18 50 T [°C] 700 800 900 1000 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 0.10 0.00 VO@7V VI= VINH=5V, IO=from 0A to 1A 0 Doc ID 13449 Rev 2 100 200 300 400 500 600 IO [mA] 700 800 900 1000 ST8R00 Typical characteristics Figure 22. Output voltage vs. input voltage Figure 23. Maximum output current vs. output voltage 12.00 1.1 125°C 8.00 0°C 6.00 -25°C 0.9 4.00 PMAX=6W 0.8 0.7 0.6 2.00 VI=VINH from 0 to 6V, IO=400mA 0.00 0 1 2 3 4 5 OPERATIVE ZONE 0.5 0.4 5.5 6 VI=VINH=5V Pc os t= 6W 1 25°C IO [A] VO [V] 10.00 6.5 7.5 8.5 9.5 10.5 11.5 12.5 VO [V] VI [V] Figure 24. Inductor current Figure 25. Load transient VLX VO IO ILX VI=5V,VINH= 2V, L=4.7µH, CI=CO=10µF, No Load, T=25°C VI=VINH=5V, IO=from 10mA to 500mA Figure 26. Line transient Figure 27. INH transient VI VINH VO VO IO VI=VINH from 4V to 5.5V, IO=500mA, 20µs VI=6, VINH from 0V to 2V, IO=1A Doc ID 13449 Rev 2 11/18 Typical characteristics ST8R00 Figure 28. Inrush current VI=4.5, VO=7V, VINH from 0V to 3V, IO=0, L=10µH 12/18 Doc ID 13449 Rev 2 ST8R00 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Doc ID 13449 Rev 2 13/18 Package mechanical data ST8R00 DFN8 (4x4) Mechanical Data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. A 0.80 0.90 1.00 0.031 0.035 0.039 A1 0 0.02 0.05 0 0.001 0.002 A3 0.20 0.008 b 0.23 0.30 0.38 0.009 0.012 0.015 D 3.90 4.00 4.10 0.154 0.157 0.161 D2 2.82 3.00 3.23 0.111 0.118 0.127 E 3.90 4.00 4.10 0.154 0.157 0.161 E2 2.05 2.20 2.30 0.081 0.087 0.091 e L 0.80 0.40 0.50 0.031 0.60 0.016 0.020 0.024 7869653B 14/18 Doc ID 13449 Rev 2 ST8R00 Package mechanical data Figure 29. DFN8 (4 x 4) footprint recommended data Doc ID 13449 Rev 2 15/18 Package mechanical data ST8R00 Tape & Reel QFNxx/DFNxx (4x4) Mechanical Data mm. inch. Dim. Min. Typ. A Min. Typ. 330 C 12.8 D 20.2 N 99 13.2 Max. 12.992 0.504 0.519 0.795 101 T 16/18 Max. 3.898 3.976 14.4 0.567 Ao 4.35 0.171 Bo 4.35 0.171 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 Doc ID 13449 Rev 2 ST8R00 Revision history 8 Revision history Table 7. Document revision history Date Revision Changes 24-May-2007 1 Initial release. 01-Feb-2012 2 Modified: Figure 8 on page 8. Removed: Table 6, Figures 24, 25 and 26. Doc ID 13449 Rev 2 17/18 ST8R00 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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