Data Sheet

Model 335
DIFFERENTIAL LVPECL AND LVDS VCXO
FEATURES
•
•
•
•
Standard 7x5mm Surface Mount Footprint
Differential LVPECL or LVDS Outputs
Frequency Range 19.44 – 212.50 MHz
Frequency Stability, ±50 ppm Standard
(± 25 ppm available)
• +2.5Vdc or +3.3Vdc Operation
• Operating Temperature to –40°C to +85°C
• Output Enable Standard
• Low Phase Jitter, NON-Multiplied
• Tape & Reel Packaging
• RoHS/Green Compliant
DESCRIPTION
The Model 335 is a ceramic packaged Voltage
Controlled oscillator offering reduced size and
enhanced stability. The small size means it is
perfect for any application. The enhanced
stability means it is the perfect choice for today’s
communications applications that require tight
frequency control.
ORDERING INFORMATION
335
M
OUTPUT TYPE
FREQUENCY IN MHz
M - indicates MHz and decimal point.
Frequency is recorded with minimum 4
significant digits to the right of the "M".
P = PECL, Enable High (standard)
L = LVDS, Enable High (standard)
E = PECL, Enable Low
V = LVDS, Enable Low
FREQUENCY STABILITY and APR
SUPPLY VOLTAGE
2 = 2.5 Vdc
3 = 3.3 Vdc
5 = ± 25 ppm / ± 100 APR (3.3V only)
3 = ± 50 ppm / ± 50 APR (standard)
2 = ± 25 ppm / ± 50 APR
OPERATING TEMPERATURE RANGE
C = 0°C to +70°C (standard)
I = -40°C to +85°C
Example Part Number: 335P3C3155M5200
Document No. 008-0286-0
Page 1 - 5
Rev. A
٠ ٠ ٠ CTS Electronic Components, Inc. ٠ 171 Covington Drive ٠ Bloomingdale, IL 60108 ٠ ٠ ٠
٠ ٠ ٠ www.ctscorp.com ٠ ٠ ٠
Model 335
Differential LVPECL or LVDS
7x5mm VCXO
Electrical and Waveform Parameters
Absolute Maximums
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Storage Temperature
Frequency Range
LVPECL and LVDS
Frequency Stability
(See Note 1 and Ordering Information)
Absolute Pull Range
(See Note 2 and Ordering Information)
Operating Temperature
Commercial
Industrial
Supply Voltage
Supply Current
LVPECL
LVDS
Control Voltage
Frequency Deviation
Linearity
Input Impedance
Transfer Function
Start Up Time
Modulation Roll-off
Phase Jitter
Enable Function High
Enable Input Voltage
Disable Input Voltage
Enable Function Low
Enable Input Voltage
Disable Input Voltage
Disable Current
Enable Time
LVPECL WAVEFORM
Output Load
Output Duty Cycle
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Rise and Fall Time
LVDS WAVEFORM
Output Load
Output Duty Cycle
Differntial Voltage
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Rise and Fall Time
SYMBOL
VCC
TSTG
CONDITIONS
-
MIN
-0.5
-55
TYP
-
MAX
5.0
125
fO
-
∆f/fO
19.44
-
212.50
-
-
-
25, 50
± ppm
APR
-
50, 100
-
-
± ppm
TA
-
-20
-40
2.38
3.14
°C
2.5
3.3
70
85
2.63
3.47
0.0
-15
50
25
-
50
25
1.65
130
10
Positive
5
-
75
40
3.3
15
10
1
mA
-
0.3*VCC
uA
ms
VCC
±5%
ICC
Maximum Load
25
UNIT
V
°C
MHz
V
VC
∆f
L
ZC
TS
tjms
VCC = 3.3V
25°C at Time of Shipment
Best Straight Line Fit
Application of VCC
@ -3dB
Bandwidth 12 kHz - 20 MHz
VIH
VIL
Pin 2 Logic '1', Output Enabled
Pin 2 Logic '0', Output Disabled
0.7*VCC
-
VIH
VIL
IIL
TPLZ
Pin
Pin
Pin
Pin
Logic '0', Output Enabled
Logic '1', Output Disabled
or Pin 2 Logic '1' , Output Disabled
Logic '1' or Logic '0'
0.3*VCC
-
-
0.7*VCC
20
10
RL
SYM
@ VCC - 1.3V
45
50
-
55
Ohms
%
VCC - 1.025V
-
0.4
VCC - 1.62V
1.0
V
ns
VOH
VOL
TR, TF
RL
SYM
VOD
VOH
VOL
TR, TF
2
2
1
2
PECL Load
PECL Load
@ 20% - 80% Levels
-
V
± ppm
%
kOhms
ms
kHz
ps RMS
V
V
@ 1.25V
RL = 100 Ohms
45
250
100
350
55
450
Ohms
%
mV
LVDS Load
LVDS Load
@ 20% - 80% Levels
0.9
-
0.4
1.6
1.0
V
ns
Notes:
1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 10 year aging
at an average operating temperature of +40 °C.
2. Minimum guaranteed frequency shift from fO over variations in temperature, aging, power supply and load
at an average operating temperature of +40°C for 10 years.
Document No. 008-0286-0
٠ ٠ ٠ CTS Electronic Components, Inc. ٠
Page 2 - 5
171 Covington Drive
Rev. A
٠
Bloomingdale, IL 60108
٠٠٠
Model 335
Differential LVPECL or LVDS
7x5mm VCXO
PECL/LVDS OUTPUT WAVEFORM
Tr
TEST CIRCUIT, PECL LOAD
Vcc - 2.0V
Tf
VOH
OUT
RL
50
80%
VOS
CH2
+
50%
mA
-
CH1
6
+
20%
RL
50
4
0.01uF
VM
-
VOL
UPTIME (t)
+
POWER
SUPPLY
OUT
5
D.U.T.
Vcc - 2.0V
1
2
3
PERIOD (T)
-
DUTY CYCLE = t/T x 100 (%)
POWER
SUPPLY
+
Enable Input
TEST CIRCUIT, LVDS LOAD
CH2
+
D.U.T. PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
SYMBOL
VC
EOH
GND
Output
Output
VCC
DESCRIPTION
Control Voltage
Enable
Circuit & Package Ground
RF Output
Complimentary RF Output
Supply Voltage
ENABLE HIGH
TRUTH TABLE
PIN 2
Logic ‘1’
Open
Logic ‘0’
PIN 4 / PIN 5
Output
Output
High Imp.
mA
RL
100
-
CH1
6
+
+
POWER
SUPPLY
VM
-
5
4
0.01uF
D.U.T.
1
-
POWER
SUPPLY
2
3
+
Enable Input
ENABLE LOW
TRUTH TABLE
PIN 2
Logic ‘1’
Open
Logic ‘0’
PIN 4 / PIN 5
High Imp.
Output
Output
Document No. 008-0286-0
٠ ٠ ٠ CTS Electronic Components, Inc. ٠
Page 3 - 5
171 Covington Drive
Rev. A
٠
Bloomingdale, IL 60108
٠٠٠
Model 335
Differential LVPECL or LVDS
7x5mm VCXO
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
MARKING INFORMATION
(7.0 ±0.2)
0.276 ±0.008
1.
2.
3.
4.
(1.4)
0.055
PIN 1 IDENTIFIER
(1.27)
0.050
CTS ** YYWW
335P3C3
● XXXMXXXX
(5.0 ±0.2)
0.197 ±0.008
(3.73)
0.147
4
5
6
3
2
1
** - Manufacturing Site Code.
YYWW – Date code, YY – year, WW – week.
Truncated CTS part number.
XXXMXXXX - Frequency marked with 4
significant digits after the ‘M’.
Notes
1. Termination pads (e4), barrier-plating is nickel
(Ni) with gold (Au) flash plate.
2. Reflow conditions per JEDEC J-STD-020.
(2.54)
0.100
(5.08)
0.200
(2.0)
MAX
0.079
Key:
(mm)
Inch
SUGGESTED SOLDER PAD GEOMETRY
SUGGESTED REFLOW PROFILE
.071 [1.80]
300
Maximum 260°C, 10 seconds
C BYPASS
5
6
4
Typical 245°C
200
.165 [4.20]
Temp.
(°C)
130°C
100
.079 [2.00]
2
1
3
.100 [2.54]
.200 [5.08]
0
Key:
[mm]
Inch
0
30
٠ ٠ ٠ CTS Electronic Components, Inc. ٠
90
120
150
180
210
240
270
300
Time (Seconds)
CBYPASS should be ≥ 0.01 uF.
Document No. 008-0286-0
60
Page 4 - 5
171 Covington Drive
Rev. A
٠
Bloomingdale, IL 60108
٠٠٠
Model 335
Differential LVPECL or LVDS
7x5mm VCXO
TAPE AND REEL INFORMATION
DIMENSIONS IN MILLIMETERS
17.5
2.0
Ø13
4.0
8.0
Ø1.50
1.75
2.40
2.10
120°
16.0
8.40
7.90
Ø60
5.70
5.40
Ø180
Ø23
DIRECTION OF FEED
Device quantity is 1,000 pieces per 180mm reel.
ENVIRONMENTAL SPECIFICATIONS
Temperature Cycle:
400 cycles from –55°C to +125°C, 10 minute dwell at each temperature, 1
minute transfer time between temperatures.
Mechanical Shock:
1,500g’s, 0.5mS duration, ½ sinewave, 3 shocks each direction along 3
mutually perpendicular planes (18 total shocks).
Sinusoidal Vibration:
0.06 inches double amplitude, 10 to 55 Hz and 20g’s, 55 to 2,000 Hz, 3 cycles
each in 3 mutually perpendicular planes (9 times total).
Gross Leak:
No leak shall appear while immersed in an FC40 or equivalent liquid at
+125°C for 20 seconds.
Fine Leak:
Mass spectrometer leak rates less than 2x10-8 ATM cc/sec air equivalent.
Resistance to Solder Heat:
Product must survive 3 reflows of +260°C peak, 10 seconds maximum.
High Temperature Operating Bias:
2,000 hours at +125°C, maximum bias, disregarding frequency shift.
Frequency Aging:
1,000 hours at +85°C, full bias, less than ±5 ppm shift.
Moisture Sensitivity Level:
Level 1 per JEDEC J-STD-020.
QUALITY AND RELIABILITY
Quality systems meet or exceed the requirements of ISO 9000:2000 standards.
Document No. 008-0286-0
٠ ٠ ٠ CTS Electronic Components, Inc. ٠
Page 5 - 5
171 Covington Drive
Rev. A
٠
Bloomingdale, IL 60108
٠٠٠
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