AN-1044: 将AD5932编程为扫频输出和单频输出 (Rev. 0)

AN-1044
ᆌᆩԴऻ
One Technology Way t P.O. Box 9106 t Norwood, MA 02062-9106, U.S.A. t Tel: 781.329.4700 t Fax: 781.461.3113 t www.analog.com
ॽAD5932Պ‫ྺײ‬෢ೕ๼‫ڇࢅ؜‬ೕ๼‫؜‬
ፕኁǖLiam Riordan
०঻
ԨᆌᆩԴऻၘဦ௮ຎසࢆॽAD5932‫ڦ‬๼‫؜‬Պ‫ٗྺײ‬1 MHz
‫ڟ‬10 MHz‫ڦ‬෢ೕă‫ړ‬ᆩࢽቴ‫ڟ‬କೕ೷ฉፌഽೕ୲‫ۅ‬ኮࢫLj
޿ഗॲ੗ᅜሞኄ߲༬ۨೕ୲ฉኻ‫د‬๼ᅃ߲ኟ၀հă
ᆅগཞᄣ‫ڦ‬ፕᆩăཚ‫׉‬Ljኄኮࢫ๟‫ز‬ႜेሜ໯ᆶႴᄲ‫ڦ‬෢
௮֖ຕăሞ๑ᆩCTRLᆅগ৊ႜೕ୲෢௮ኮമLjDAC‫ڦ‬๼
‫؜‬ᅃ኱ԍ‫׼‬ሞዐक़‫ۉ‬ೝă
AD5932‫ڦ‬ฉ‫ۉ‬
AD5932ሞ࿄ۨᅭጒༀူฉ‫ۉ‬ăᆩࢽՂႷॽԈࡤ࿮ၳຕ਍‫ڦ‬
)੦዆ࢅೕ୲*स٪ഗยྺᅃ߲ᅙኪኵă‫ڼ‬ᅃ߲ԥՊ‫ڦײ‬स
٪ഗՂႷ๟੦዆स٪ഗLjᅺྺ໲ԥᆩઠยዃኝ߲ഗॲăႴ
ᄲጀᅪ‫ڦ‬๟Lj‫ܔ‬੦዆स٪ഗ‫ڦ‬ႀ֡ፕࣷጲ‫ްۯ‬࿋ాևጒༀ
ऐLjժׂิዐक़‫ۉ‬ೝ‫ڦ‬ఇె๼‫؜‬Ljᅺྺ໲ഐ‫ڟ‬ᇑINTERRUPT
ᄲॽഗॲยዃྺ෢௮ఇ๕้LjՂႷ‫ူܔ‬ଚस٪ഗ৊ႜႀ֡
ፕǖ
!!!!੦዆स٪ഗ×1
•
•
!!!!ഐ๔ೕ୲स٪ഗ(F
START)×2
•
!!!!ೕ୲ሺଉस٪ഗ(Δf)×1
•
!!!!ሺଉຕस٪ഗ(N
INCR)×1
DVDD
CAP/2.5V
DGND
INTERRUPT
STANDBY
AGND
AVDD
AD5932
REGULATOR
VCC
2.5V
BUFFER
SYNCOUT
BUFFER
MSBOUT
MCLK
SYNC
INCREMENT
CONTROLLER
CTRL
DATA
24-BIT
PIPELINED
DDS CORE
INCR
FREQUENCY
CONTROLLER
/24
10-BIT
DAC
VOUT
DATA AND CONTROL
FSYNC
SCLK
CONTROL
REGISTER
ON-BOARD
REFERENCE
FULL-SCALE
CONTROL
COMP
08425-001
SERIAL INTERFACE
SDATA
཮1
Rev. 0 | Page 1 of 4
AN-1044
ᆌᆩԴऻ ణ୤
०঻ ................................................................................................... 1
ࠀీ઀཮ ........................................................................................... 1
AD5932‫ڦ‬ฉ‫ ۉ‬................................................................................ 1
ॽAD5932Պ‫ྺײ‬෢௮ఇ๕ .......................................................... 3
ॽAD5932Պ‫ڇྺײ‬ೕ๼‫ ؜‬.......................................................... 4
Rev. 0 | Page 2 of 4
AN-1044
ᆌᆩԴऻ
ॽAD5932Պ‫ྺײ‬෢௮ఇ๕
੦዆स٪ഗ
AD5932ฉ‫ۉ‬ኮࢫ‫ڼ‬ᅃ߲ႀ෇‫ڦ‬स٪ഗ๟16࿋‫ڦ‬੦዆स٪
ഗă
ᅺُLj‫ܔ‬ᇀFSTART MSBLjᄲेሜူ௬‫پڦ‬ஓ(ኡII):1101 0000
0101 0001
‫ܔ‬ᇀFSTART LSBLjᄲेሜူ௬‫ڦ‬ຕ਍)ኡIII*:1100 1110 1011 1000
ॽူ௬‫پڦ‬ஓ)ኡI*ႀ෇੦዆स٪ഗ੗ᅜॽഗॲยዃྺ෢௮
ఇ๕)९՗1*ǖ0000 1111 1111 1111
ೕ୲ሺଉ
Δfस٪ഗ๟ᅃ߲23࿋स٪ഗLjႴᄲ‫ܔ‬ଇ߲16࿋स٪ഗ৊ႜ
Պ‫ײ‬ă‫ڿ‬ሺ‫ݛڦ‬ၠᆯ‫ں‬኷࿋ਦۨ(९՗3)ă
՗1. ੦዆स٪ഗ߳࿋௮ຎ
՗3. Δfस٪ഗ࿋
࿋
D15 ዁
D12
D11
ኵ
0
ࠀీ
‫ں‬኷࿋
1
D14
0
0
D13
1
1
D12
0
1
D10
D9
D8
D7
D6
D5
1
1
1
1
1
1
0
0
1
1
D4
D3
D2
D1
D0
1
0
0
1
1
FSTARTՎ‫ׯ‬ଇْႀ֡ፕLjMSBࢅLSB਩ेሜă
MSB and LSB loaded
DAC๑ీ
჋ስኟ၀հ
MSBOUTᆅগ๑ీ
ԍା
ԍା
ཚࡗCTRLᆅগྔև‫݀ة‬ሺଉ
CTRL pin
ԍା
SYNCOUTᆅগ࿄჋ስ
SYNCOUT pin not selected
ԍା
ԍା
D15
0
0
ഐ๔ೕ୲
থူઠ‫ڦ‬ଇ߲ጴব๟FSTARTस٪ഗLjԈઔMSBࢅLSB)९՗2*ă
՗2. FSTARTस٪ഗ
D15
1
1
D14
1
1
D13
0
0
D12
0
1
D11 ዁ D0
FSTART [11:0]‫ڦ‬12࿋LSB
FSTART [23:12]‫ڦ‬12࿋MSB
M=
f OUT × 2 n
f MCLK
ഄዐǖ
fOUT = 0.1 MHz.
M = 0x8312.
ᅺُLj‫ܔ‬ᇀփ܏ሺे‫ڦ‬ሺଉ෢௮LjΔfस٪ഗ‫ڦ‬MSB (ኡIV)
๟ǖ
00110 000 0000 1000
Δfस٪ഗ‫ڦ‬LSB (ኡV)๟ǖ
0010 0011 0001 0010
f OUT × 2 n
f MCLK
ഄዐǖ
fOUT = 1 MHzLjAD5932‫ڦ‬๼‫؜‬ೕ୲ă
fMCLK = 50 MHzLj MCLKೕ୲ă
n = 24 ࿋Ljೌాેेഗ‫ݴڦ‬Ր୲ă
M=
෢௮
‫ݛ‬ၠ
N/A
ኟΔf
(FSTART + Δf)
޶Δf
(FSTART − Δf)
‫ܔ‬ᇀ0.1 MHz‫ڦ‬ሺଉLjᆩཞᄣ‫ऺ݆ݛڦ‬໙ሺଉ‫ٷڦ‬ၭă
ྺକׂิ1 MHzഐ๔ೕ୲Ljူ௬‫ࠅڦ‬๕ۨᅭକᄲेሜ‫پڦ‬
ஓǖ
M=
D11 D10 ዁ D0
Δf [11:0]‫ڦ‬12࿋LSB
0
Δf [22:12]‫ڦ‬
11࿋MSB
1
Δf [22:12]‫ڦ‬
11࿋MSB
f OUT × 2 n
= 335544 = 0x51EB8
f MCLK
ኄ߲ๆୃ৊዆ኵՂႷ‫ݴ‬঴‫ڟ‬FSTART MSBࢅFSTART LSBă
0x51EB8 = 0101 0001 1110 1011 1000
Rev. 0 | Page 3 of 4
AN-1044
ᆌᆩԴऻ
ሺଉຕ(NINCR)
ཕኹೕ୲๟ߵ਍ೕ୲ሺଉኵ(Δf)ᇑೕ୲ሺଉຕNINCR‫ױڦ‬ओ
ऺ໙‫ڦ‬ăኄ๟ᅃ߲ᆶ4߲‫ں‬኷࿋‫ڦ‬12࿋ຕ਍स٪ഗLjස՗4
໯๖Ljሺଉ‫ڦ‬ፌ‫ٷ‬ຕ๟4095ă
ሺक़߰
ኄ๟ेሜ‫ڦ‬ፌࢫᅃ߲स٪ഗăሞ੦዆स٪ഗዐLjྔևሺଉ
੦዆๟჋ዐ‫ڦ‬ǗᅺُLjኄ߲स٪ഗփႴᄲႀ෇ăၘ൧൩֖
९AD5932‫ڦ‬ຕ਍๮֩ă
՗4. NINCR‫ڦ‬ຕ਍࿋
ሞጲ‫ڿۯ‬ሺఇ๕LjCTRLᆅগ‫߲ڇڦ‬ஞ؋ᆩઠഔ‫ۯ‬ժኴႜ
ೕ୲෢௮ăሞྔև‫ڿ‬ሺఇ๕LjCTRLᆅগཞᄣᆩᇀഔ‫ۯ‬෢
௮Lj‫ڍ‬๟ೕ୲‫ڿ‬ሺक़߰ᆯCTRLᆅগ૶Ⴤ‫ۉگڦ‬ೝ‫ۉߛڟ‬
ೝገ࣑ኮक़‫้ڦ‬क़क़߰ਦۨă
D11 ዁ D0
0000 0000 0010
ሺଉຕ
ଇ߲ೕ୲ሺଉăኄ๟ೕ୲ሺଉ‫ڦ‬ፌၭኵă
0000 0000 0011
0000 0000 0100
…
1111 1111 1110
1111 1111 1111
ෙ߲ೕ୲ሺଉă
຺߲ೕ୲ሺଉă
…
4094߲ೕ୲ሺଉă
4095߲ೕ୲ሺଉă
ॽAD5932Պ‫ڇྺײ‬ೕ๼‫؜‬
ᅃ ‫ ׯ ྜ ڋ‬෢ ௮ Lj ᆩ ࢽ ᄲ ֪ ଉ ፌ ॅ ೕ ୲ ኵ ้ Lj ૩ ස 2.5
MHzLj੗ᅜ჋ስኄ߲ೕ୲ኵժ૶Ⴤ݀ໃăॽ2.5 MHzेሜ
‫ڟ‬FSTARTस٪ഗLj඗ࢫᆩߛ‫ۉ‬ೝൻ‫ۯ‬CTRLᆅগ৽੗ᅜ‫ڟڥ‬
๼‫؜‬ăሞCTRLᆅগฉኻᄲுᆶ‫ۉگ‬ೝ‫ۉߛڟ‬ೝ‫ڦ‬ገ࣑Lj
AD5932‫ڦ‬VOUTᆅগ৽੗ᅜ‫׼‬Ⴤ๼‫؜‬ፌॅೕ୲ă
ᄲऺ໙ཕኹೕ୲LjႴ๑ᆩසူࠅ๕ǖ
fSTOP = FSTART + NINCR × Δf
‫ړ‬FSTARTྺ1 MHzLjΔfྺ0.1 MHz้Ljᄲ๑ཕኹೕ୲ྺ10 MHzLj
Ⴔᄲ90߲ሺଉă
90)ๆ৊዆* = 5A = 0101 1010
ᅺُLj‫ܔ‬ᇀNINCRस٪ഗLjᄲेሜူ௬‫ڦ‬ຕ਍)ኡVI*ǖ
0001 0000 0101 1010
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AN08425-0-8/09(0)
Rev. 0 | Page 4 of 4
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