Freescale Semiconductor User’s Guide Document Number: KTVR500UG Rev. 1.0, 8/2014 KITVR500EVM Evaluation Board Figure 1. KITVR500EVM Contents 1 2 3 4 5 6 7 8 9 Important Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Getting to Know the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Installing the GUI and Setting up the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Board Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Board Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 © Freescale Semiconductor, Inc., 2014. All rights reserved. Important Notice 1 Important Notice Freescale provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical support services. Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will be replaced by a new kit. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typical”, must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where personal injury or death may occur. Should the Buyer purchase or use Freescale products for any such unintended or unauthorized application, the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges Freescale was negligent regarding the design or manufacture of the part.Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners.© Freescale Semiconductor, Inc. 2014 KTVR500UG Rev. 1.0 8/2014 2 Freescale Semiconductor, Inc. Getting Started 2 Getting Started 2.1 Kit Contents/Packing List The KITVR500EVM contents include: • Assembled and tested evaluation board/module in anti-static bag. • Warranty card and Technical support brochure 2.2 Jump Start Freescale’s analog product development boards help to easily evaluate Freescale products. These tools support analog mixed signal and power solutions including monolithic ICs using proven high-volume SMARTMOS mixed signal technology, and system-in-package devices utilizing power, SMARTMOS and MCU dies. Freescale products enable longer battery life, smaller form factor, component count reduction, ease of design, lower system cost and improved performance in powering state of the art systems. • Go to www.freescale.com/analogtools • Locate your kit • Review your Tool Summary Page • Look for Jump Start Your Design • Download documents, software and other information Once the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM and schematics. Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes everything needed for design. 2.3 Required Equipment and Software To use this kit, you need: • Power supply: • Output voltage range from 3.1 to 4.5 V • Current capability from 3.0 to 5.0 A (current requirement is dependent on output loading) • Supply to board connection cables (capable of withstanding up to 5.0 A current) • USB (male) to mini USB (male) communication cable • USB-enabled computer • Multimeter is recommended 2.4 System Requirements The kit requires the following to function properly with the software: • Windows XP or Windows 7 operating system • VR500_GUI_REV_1.1.zip: Graphical User Interface (GUI) for KITVR500EVM KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 3 Getting to Know the Hardware 3 Getting to Know the Hardware 3.1 Board Overview The KITVR500EVM evaluation board allows full evaluation capability of the 34VR500 PMIC for the QorlQ LS102x family of application processors. It provides access to all output voltage rails as well as control and signal pins through terminal block connectors for an easier out-of-the-box evaluation experience. A single terminal block connector for the input power supply allows the user to supply the board with an external DC power supply to fully evaluate the performance of the device. 3.2 Board Features The board features are as follows: • Input voltage operation range from 3.1 to 4.5 V • Output voltage supplies accessible through detachable terminal blocks • Four buck converters • Five general purpose LDO regulators • One DDR memory termination voltage reference • On/off push button support • Hardware configuration flexibility through various jumper headers and resistors • Integrated USB to I2C programming interface for full control/configuration • Onboard PMIC control through the I2C register map • On board connectors for interfacing with future evaluation/debug tools • Compact form factor (4 x 4 in2) 3.3 Device Features This evaluation board features the following Freescale products: Table 1. Features Device Description Features • Four buck converters MC34VR500 Multi-output DC/DC Regulator for QorIQ LS1 Family of Communications Processors • Five general purpose linear regulators • Programmable output voltage, sequence, and timing • DDR termination reference voltage • Power control logic with processor interface and event detection • Individually programmable ON, OFF, Standby, and Sleep modes • 8-bit HCS08 Central Processing Unit (CPU) MC9S08JM60 8-bit USB Cost-Effective JM MCUs • Up to 24 MHz internal bus (48 MHz HCS08 core) frequency offering 2.7 to 5.5 V across temperature range of -40 °C to +85 °C • Support for up to 32 peripheral interrupt/reset sources • On-chip Memory • Up to 60 k flash read/program/erase over the full operating voltage and temperature • Up to 4.0 k RAM • 256 Byte USB RAM • Support for up to 32 peripheral interrupt/reset sources KTVR500UG Rev. 1.0 8/2014 4 Freescale Semiconductor, Inc. Getting to Know the Hardware 3.4 Board Description Figure 2 describes the main blocks of the KITVR500EVM. Power supply Logic and monitoring outputs Power Management LDO’s outputs PC interface via the USB bus Buck regulators outputs Figure 2. Board Description Table 2. Board Description Name Summary Description Power Supply Main power supply connection (3.1 to 4.5 V) Logic and monitoring outputs I2C, INTB, EN, PORB and STBY connections for monitoring LDO’s outputs LDO1, 2, 3, 4, 5 REFOUT output connections (can be used to connect a load) Buck regulators outputs SW1, 2, 3, 4 output connections (can be used to connect a load) PC Interface To be connected to the PC running the GUI KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 5 Getting to Know the Hardware 3.5 Jumper Description Verify that the jumpers are placed in the right position as shown in Figure 3. For a detailed description of the jumper functionality, refer to Table 3. KITVR500EVM Figure 3. Default Jumper Configuration Diagram KTVR500UG Rev. 1.0 8/2014 6 Freescale Semiconductor, Inc. Getting to Know the Hardware Table 3. Jumper Description Jumper Default Description J6 Closed Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings on the switching supplies J7 Closed Shorts PVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to PVIN net. (debugging option) J8 Closed Short EN to the MCU J9 Open Short to pull STBY to PVIN voltage supply J10 Open Short to hold EN pin low J11 Open Shorts SWVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to SWVIN net. (debugging option) J12, J13, J14 Closed Short to connect VLDOIN to VIN J15 Closed Short to connect SCL and SDA to the MCU J16 Closed Short to connect EN to PVIN J17 1-2 J19, J23, J24 Closed J22 1-2 3-4 J25 2-3 3.6 VCCI2C Supply selector • 1-2: Connect VCCI2C to 3V3 LDO • 3-4: Connect VCCI2C to SW2 output Buck regulators input power path isolation Short these jumpers to allow PVINx to be powered from the SWVIN supply Buck regulators input power path isolation Control Interface input supply selector • 1-2: Enables PVIN node as the input supply source for the control interface • 2-3: Enables USB power as the input supply source for the control interface Connectors and Terminal Blocks Description Table 4 presents pin connection for each header present on the KITVR500EVM. Table 4. Terminal Blocks Descriptions Terminal Block Function Pin definition Pin 1 – GND Pin 2 – PVIN Pin 3 – SWVIN J1 Main Input Supply J2 I²C Signals J3 VCCI2C Pin 1 – VCCI2C Pin 2 – GND J4 Interfacing 1 Pin 1 – INT_B Pin 3 – POR_B J5 Interfacing 2 Pin 1 – STBY Pin 2 – EN Pin 3 – GND J18 LDO4 / LDO5 Pin 1 – LDO4 Output Pin 2 – GND Pin 3 – LDO5 Output J21 LDO2 / LDO3 Pin 1 – LDO2 Output Pin 2 – GND Pin 3 – LDO3 Output J27 REFOUT / LDO1 J29 SW1 Pin 1 – SCL Pin 2 – SDA Pin 1 – REFOUT Output Pin 2 – GND Pin 3 – LDO1 Output Pin 1 – SW1 Output Pin 2 – GND KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 7 Getting to Know the Hardware Table 4. Terminal Blocks Descriptions (continued) J30 SW4 Pin 1 – SW4 Output Pin 2 – GND J31 SW2 Pin 1 – SW2 Output Pin 2 – GND J32 SW3 Pin 1 – SW3 Output Pin 2 – GND Table 5. Connector Description Connector Function J20 Debug Port 1 J26 Pin definition Debugging connector for future development tools Pin 1 - BKGD_JM60 Pin 2 - GND Pin 3 - NC Pin 4 - RST_JM60 Pin 5 - NC Pin 6 - USB_PWR BDM Connector Pin 1 - VBUS Pin 2 - DPin 3 - D+ Pin 4 - NC Pin 5 - GND Chassis - GND J28 Mini USB Connector J33 Debug Port 2 Debugging connector for future development tools J34 Debug Port 3 Debugging connector for future development tools J35 Debug Port 4 Debugging connector for future development tools 3.6.1 LDO Input Supply Source Selection It is possible to modify the LDO input supply sources by removing the Jumpers J12, J13, J14, J17 and connecting another power supply, as one of the buck converters outputs. LDO OUTPUT SENSE POINTS LDO INPUT SENSE POINTS TP11 VLDOIN45 TP13 VLDOIN23 TP12 VLDOIN1 DNP DNP DNP VIN J12 2 1 VLDOIN1 17 VLDOIN23 27 HDR 1X2 TH J13 2 1 HDR 1X2 TH LDO1 VLDOIN1 LDO2 VLDOIN23 LDO J14 2 1 VLDOIN45 40 HDR 1X2 TH C33 1.0UF LDO4 VLDOIN45 30 29 TP37 REFIN DNP V_SW3 0 18 V_LDO1 26 V_LDO2 28 V_LDO3 39 V_LDO4 41 V_LDO5 C63 1.0UF Default: 1-2 shunt R11 LDO3 LDO5 C54 1.0UF TP30 V_LDO1 TP40 V_LDO2 TP36 V_LDO3 TP18 V_LDO4 TP9 V_LDO5 DNP DNP DNP DNP DNP V_LDO1 V_LDO2 V_LDO3 V_LDO4 V_LDO5 U1B C62 4.7uF REFIN REF REG REFOUT 31 C32 2.2UF C34 4.7uF C10 2.2UF C4 2.2UF REFOUT VHALF MC34VR500V1ES TP34 REFOUT REFOUT REFIN DNP C35 0.1UF C31 1.0UF VHALF TP38 VHALF DNP C29 1.0UF C37 0.1UF Figure 4. LDO Schematic Configuration KTVR500UG Rev. 1.0 8/2014 8 Freescale Semiconductor, Inc. Getting to Know the Hardware TP10 VR500_EN PVIN DNP 1 EN EN 3,5 2 2 HDR 1X2 TH Default: No shunt 2 DNP Default: 1-2 shunt J10 SW1 FSMSM DNP 1 TP8 VIN_SENSE VIN 2 HDR 1X2 TH 1 R7 1M J8 VR500_EN PVIN TP14 VBG DNP TP15 VCC DNP C52 1.0UF V_SW2 3V3 C7 1.0UF C53 0.22uF 50 51 VBG 52 VCC 49 VBIAS 43 C8 0.47uF 55 VIN VDIG EN VBG POR VCC STBY VBIAS Control INT 56 J9 HDR 1X2 TH Default: No shunt 3 TP3 POR_B 4 1 POR_B INT_B DNP TP5 INT_B DNP TP4 STBY R10 10.0K R8 10.0K 1 VDIG DNP VIN VDIG 2 U1A TP16 1 J16 HDR 1X2 TH Default: 1-2 shunt C51 1.0UF DNP POR_B 3 INT_B 3 VCCI2C STBY J17 STBY VCCI2C 1 3 2 4 3 VCCI2C 54 HDR 2X2 C3 1.0UF DNP Default: 1-2 shunt C6 0.1UF 53 SCL ICTEST1 SDA ICTEST2 5 47 C2 1.0UF R9 100K VCCI2C MC34VR500V1ES R5 4.7K J15 3,5 3,5 MCU_SCL MCU_SDA MCU_SCL MCU_SDA 1 3 2 4 I2C_SCL I2C_SDA R6 4.7K TP6 SCL DNP TP7 SDA DNP HDR 2X2 Default: 1-2 shunt, 3-4 shunt. Figure 5. Logic and Core Supplies Schematic KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 9 Getting to Know the Hardware Table 6. LDO Input Supply Configuration Chart Input Pin Input options VLDOIN1 Input supply for LDO1: J12 Closed: VIN J12 Open: User's choice VLDOIN23 Input supply for LDO2 and LDO3: J13 Closed: VIN J13 Open: User's choice VLDOIN45 Input supply for LDO4 and LDO5: J14 Closed: VIN J14 Open: User's choice REFIN VCCI2C Input supply for REFOUT: R11 = V_SW3 R11 removed: User's choice Input supply for VCCI2C: 1 - 2: 3V3 3 - 4: V_SW2 3.6.2 Test point All test points are clearly marked on the evaluation board. Figure 6 shows the location of various test points of interest during evaluation. PORB INTB STBY EN VBG LDO5 VDIG SW1 VCC LDO4 LDO1 SW3 REFOUT SW2 LDO3 SW4 LDO2 Figure 6. Key Test Point Locations KTVR500UG Rev. 1.0 8/2014 10 Freescale Semiconductor, Inc. Getting to Know the Hardware 3.7 Miscellaneous Components 3.7.1 Power on Push Button A footprint for a normally open, momentary push-button is provided at the EN terminal to allow a momentary low state by pressing the push button. J8 allows isolation of the EN terminal from the MCU GPIO controlling this pin. TP10 VR500_EN PVIN DNP 1 EN EN 3,5 2 2 HDR 1X2 TH Default: No shunt 2 DNP Default: 1-2 shunt J10 SW1 FSMSM DNP 1 TP8 VIN_SENSE VIN 2 HDR 1X2 TH 1 R7 1M J8 VR500_EN PVIN C51 1.0UF TP14 VBG DNP TP15 VCC DNP C52 1.0UF V_SW2 3V3 C53 0.22uF C7 1.0UF 50 51 VBG 52 VCC 49 VBIAS 43 C8 0.47uF 55 VIN VDIG EN VBG POR VCC STBY VBIAS Control INT 56 J9 HDR 1X2 TH Default: No shunt 3 TP3 POR_B 4 1 POR_B INT_B DNP TP5 INT_B DNP TP4 STBY R10 10.0K R8 10.0K 1 VDIG DNP VIN VDIG 2 U1A TP16 1 J16 HDR 1X2 TH Default: 1-2 shunt DNP POR_B 3 INT_B 3 VCCI2C STBY J17 STBY VCCI2C 1 3 2 4 3 VCCI2C 54 HDR 2X2 C3 1.0UF DNP Default: 1-2 shunt C6 0.1UF 53 SCL ICTEST1 SDA ICTEST2 5 47 C2 1.0UF R9 100K VCCI2C MC34VR500V1ES R5 4.7K J15 3,5 3,5 MCU_SCL MCU_SDA MCU_SCL MCU_SDA 1 3 2 4 I2C_SCL I2C_SDA R6 4.7K TP6 SCL DNP TP7 SDA DNP HDR 2X2 Default: 1-2 shunt, 3-4 shunt. Figure 7. Power on Circuit KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 11 Getting to Know the Hardware 3.7.2 PMIC LED Indicators LED indicators are provided to notify the PMIC status to the user. Figure 8 shows the PMIC status LEDs D2 and D4, and a Reserved LED indicator D3, that allows for an external rework connection to the transistor gate if any given signal debug is required. PVIN PVIN 2 SHUTDOWN INDICATOR 2 INTERRUPT INDICATOR RESET INDICATOR PVIN Q1 INT_B 1 3 ,5 Q3 FDV302P EN EN 1 POR_B POR_B S 2 3 G Q2 FDV302P PVIN D 4 D 6 R1 200 OHM 3 IN T_B 3 3 3 R4 200 OHM 1 G 1 3 4 D3 LED_RED-GRN POR_B A A Grn R2 200 OHM Red R3 200 OHM 5 2 S FDC6327C INT_B EN C D1 LED Red C D2 LED Red Figure 8. PMIC Status Indicators Table 7 describes the meaning of the LED state. Table 7. LED State Description LED Description D2 Interrupt Notification ON = PMIC has detected an unmasked interrupt OFF = No interrupt detected D3 PORB Notification Green = PMIC is in regulation and operating properly Red = PMIC is out of regulation D1 Reserved debug LED ON = Q3 gate (R84 pad) is low OFF = Q3 gate (R84 pad) is high or floating KTVR500UG Rev. 1.0 8/2014 12 Freescale Semiconductor, Inc. Installing the GUI and Setting up the Hardware 4 Installing the GUI and Setting up the Hardware 4.1 Installing the GUI Interface The new “driverless” environment allows automatically detecting and recognizing the board connected through the USB port, enabling the specific features and controls for each board. 1. Create a directory on your PC as follows: C:\Freescale\KITVR500GUI 2. Extract the KITVR500GUI.zip file into that directory. 3. Launch the "setup.exe" program. 4. When the following popup dialog appears, click the “Install” button. Figure 9. KITVR500EVM Installation Window KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 13 Installing the GUI and Setting up the Hardware 4.2 Configuring the Hardware The KITVR500EVM operates with a single power supply from 3.1 to 4.5 V and is controlled via USB with help of an integrated USB-I2C communication bridge. By applying the input voltage supply, the KITVR500EVM powers up according to the default power-up sequence (34VR500V1) described in the MC34VR500 Data Sheet. Connect the power supply and the USB communication cables as shown in Figure 10. Multimeter is optional but it is recommended in order to accurately verify that each one of the output supplies is providing the correct voltage level. Figure 10. KITVR500EVM Board Setup Note: The KITVR500EVM allows the selection of SW2 regulator output or an external 3.3 V LDO output as the VCCI2C/I2C pull-up supply. By default, the 3.3 V LDO regulator is the source for the VDDIO supply (J17 = 1–2). If the SW2 regulator is to be set below 3.0 V then make sure the 3.3 V LDO output is connected to VCCI2C. KTVR500UG Rev. 1.0 8/2014 14 Freescale Semiconductor, Inc. Installing the GUI and Setting up the Hardware 4.2.1 Step-by-step Instructions for Setting up the Hardware using GUI To perform the demonstration examples, the following connections and setup must be performed: 1. Connect the power supply to J1, PVIN, and GND pins. 2. Switch on the power supply with a voltage set up between 3.1 and 4.5 V. 3. Connect the mini USB cable to J28 and to the computer. 4. Launch the VR500GUI, the description on how to use the GUI is provided in KTVR500SWUG Figure 11. KITVR500GUI The main features of the KITVR500GUI are: • Automatic detection of the KITVR500EVM • Read/write access to the 34VR500 PMIC • Intuitive interface for controlling the 34VR500 • Monitoring all interrupts manually or continuously • Scrip editor for prototyping, test emulation, or customized operation of the 34VR500 device • Saving and recalling customized scripts files KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 15 Schematic 5 Schematic LDO OUTPUT SENSE POINTS LDO INPUT SENSE POINTS TP11 VLDOIN45 TP13 VLDOIN23 TP12 VLDOIN1 DNP DNP DNP VIN TP30 V_LDO1 TP40 V_LDO2 TP36 V_LDO3 TP18 V_LDO4 TP9 V_LDO5 DNP DNP DNP DNP DNP J12 2 1 VLDOIN1 17 HDR 1X2 TH J13 2 1 VLDOIN23 27 HDR 1X2 TH LDO1 VLDOIN1 LDO2 VLDOIN23 LDO3 LDO J14 1 2 VLDOIN45 40 HDR 1X2 TH LDO4 VLDOIN45 LDO5 C54 1.0UF C33 1.0UF 30 29 TP37 REFIN DNP 0 R11 18 V_LDO1 26 V_LDO2 28 V_LDO3 39 V_LDO4 41 V_LDO5 C63 1.0UF Default: 1-2 shunt V_SW3 V_LDO1 V_LDO3 V_LDO2 V_LDO4 V_LDO5 U1B C62 4.7uF REFIN REF REG REFOUT 31 C32 2.2UF C34 4.7uF C4 2.2UF C10 2.2UF REFOUT VHALF MC34VR500V1ES TP34 REFOUT REFOUT REFIN DNP C35 0.1UF C31 1.0UF TP38 VHALF DNP C29 1.0UF VHALF C37 0.1UF TP10 VR500_EN PVIN DNP EN EN 3,5 2 2 HDR 1X2 TH Default: No shunt 2 DNP 1 J10 SW1 FSMSM DNP 1 TP8 VIN_SENSE VIN 2 HDR 1X2 TH 1 R7 1M Default: 1-2 shunt J8 VR500_EN PVIN TP14 VBG DNP TP15 VCC DNP C52 1.0UF V_SW2 3V3 C53 0.22uF 50 51 VBG 52 VCC 49 VBIAS C7 1.0UF C8 0.47uF 43 55 VIN VDIG EN VBG POR VCC STBY VBIAS Control INT 56 J9 3 HDR 1X2 TH Default: No shunt TP3 POR_B 4 1 POR_B INT_B DNP TP5 INT_B DNP TP4 STBY R10 10.0K R8 10.0K 1 VDIG DNP VIN VDIG 2 U1A TP16 1 J16 HDR 1X2 TH Default: 1-2 shunt C51 1.0UF DNP POR_B 3 INT_B 3 VCCI2C STBY J17 STBY VCCI2C 1 3 2 4 3 VCCI2C 54 HDR 2X2 C3 1.0UF DNP Default: 1-2 shunt C6 0.1UF 53 SCL ICTEST1 SDA ICTEST2 5 47 C2 1.0UF R9 100K VCCI2C MC34VR500V1ES R5 4.7K J15 3,5 3,5 MCU_SCL MCU_SDA MCU_SCL MCU_SDA 1 3 2 4 I2C_SCL I2C_SDA R6 4.7K TP6 SCL DNP TP7 SDA DNP HDR 2X2 Default: 1-2 shunt, 3-4 shunt. Figure 12. Evaluation Board Schematic, Part 1 KTVR500UG Rev. 1.0 8/2014 16 Freescale Semiconductor, Inc. Schematic SWVIN PVIN Default: No shunt SWVIN J1 2 3 2 1 1 J4 HDR 1X2 TH INT_B 1 2 POR_B 3 IN T_B 2 3 2 3 J6 J7 HDR 1X2 TH HDR 1X2 TH Default: 1-2 shunt Default: 1-2 shunt 1 SUB_TB_3X1 1 SWVIN PVIN GND I2C Terminal Blocks VR500 - CONTROL SIGNALS TERMINAL BLOCK SECTION VIN J11 POR_B 3,5 3,5 MCU_SCL MCU_SDA MCU_SCL 1 MCU_SDA 2 SUB_TB_3X1 SUB_TB_2X1 VCCI2C J3 J5 Input Terminal Block J1 pin 2 VIN VR500 Main chip supply & Input supply for LDO. Feed the power from PVIN by shunting the header J7 (or) Feed the power from SWVIN by shunting the header J11. INTERRUPT INDICATOR SHUTDOWN INDICATOR PVIN PVIN 3 RESET INDICATOR IN T_B INT_B 2 Input Terminal Block J1 pin 3 (or) Feed the power from PVIN by shunting the header J6. 2 SWVIN VR500 Swithcing Regulator input SUB_TB_2X1 SUB_TB_3X1 1 Q3 FDV302P EN 3 PVIN 3 ,5 EN 1 Q2 FDV302P 3 PVIN Main Input supply to the board VCCI2C 1 2 GND 1 2 3 STBY EN GND 3 ST BY 3 ,5 E N Input Source Supply J2 Q1 3 POR_B POR_B S 2 3 G PVIN D 4 D 6 S 5 R3 200 OHM R1 200 OHM R2 200 OHM R4 200 OHM A D1 LED Red INT_B EN C D2 LED Red C Grn D3 LED_RED-GRN POR_B 3 4 Red 2 FDC6327C 1 A 1 G VR500 - LDO & REFOUT O/P HEADER SECTION V_LDO1 J34 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 V_LDO2 V_LDO3 V_LDO4 V_LDO5 REFOUT V_LDO1 V_LDO2 V_LDO3 V_LDO4 V_LDO5 REFOUT CON_2X10 Figure 13. Evaluation Board Schematic, Part 2 KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 17 Schematic VR500 - CONTROL/I2C SIGNALS HEADER J33 3 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 STBY ST BY EN INT_B EN 3,5 INT_B 3 POR_B POR_B VCCI2C MCU_SCL MCU_SDA PVIN SWVIN VCCI2C 3 MCU_SCL MCU_SDA 3,5 3,5 PVIN SWVIN CON_2X10 VR500 - LDO & REFOUT O/P TERMINAL BLOCK SECTION V_LDO1 REFOUT J27 1 2 3 REFOUT GND V_LDO1 REFOUT= DDR memory reference voltage,10 mA. V_LDO1= 0.80 to 1.55 V, 250 mA SUB_TB_3X1 V_LDO3 V_LDO2 J21 V_LDO2 GND V_LDO3 1 2 3 V_LDO2 = 1.8 to 3.3 V, 100 mA V_LDO3 = 1.8 to 3.3 V, 350 mA SUB_TB_3X1 V_LDO5 V_LDO4 J18 V_LDO4 GND V_LDO5 1 2 3 V_LDO4 = 1.8 to 3.3 V, 100 mA V_LDO5 = 1.8 to 3.3 V, 200 mA SUB_TB_3X1 GROUND TEST POINTS MOUNTING HOLES BH3 BH1 BH4 BH2 TP2 GND MTG MTG MTG MTG DNP TP1 GND DNP TP42 GND DNP TP41 GND TP31 GND DNP DNP TP28 GND DNP Figure 14. KITVR500EVM LDO/Control Schematic Part 3 KTVR500UG Rev. 1.0 8/2014 18 Freescale Semiconductor, Inc. Schematic TP17 TP25 TP26 PVIN1_1 PVIN1_2 PVIN1_3 SWVIN J19 DNP DNP U1C TP21 LX1 DNP PVIN1_1 PVIN1_2 PVIN1_3 2 4 6 1 3 5 HDR 2X3 Default: 1-2 shunt, 3-4 shunt, 5-6 shunt. C19 C21 C56 C55 C64 C59 4.7uF 0.1UF 4.7uF 0.1UF 4.7uF 0.1UF 7 10 12 LX1_1 LX1_2 LX1_3 SW1 FB1 8 9 11 J22 LX1 DNP V_SW1 2 6.0A C26 22UF DNP FB1 13 C15 22UF DNP C14 22UF DNP C13 22UF DNP C24 22UF C25 22UF C22 22UF TP23 PVIN3_1 TP19 PVIN3_2 DNP DNP HDR 2X2 Default: 1-2 shunt, 3-4 shunt. C65 4.7uF 0.1UF DNP PVIN2_1 PVIN2_2 LX2 SW2 FB2 22 L4 1uH 1 LX2 C11 22UF DNP V_SW2 2 2.4A C42 22UF DNP FB2 25 C43 22UF DNP C45 22UF DNP C44 22UF DNP C40 22UF C41 22UF TP24 LX3 TP22 V_SW3 V_SW3 PVIN3_1 PVIN3_2 C58 C57 C17 C18 4.7uF 0.1UF 4.7uF 0.1UF 34 37 PVIN3_1 PVIN3_2 LX3_1 LX3_2 SW3 FB3 35 36 DNP L2 1uH DNP V_SW3 2 1 LX3 2.65A FB3 38 C36 22UF DNP C27 22UF DNP C20 22UF DNP C1 22UF DNP C16 22UF C9 22UF TP32 LX4 C28 22UF C30 22UF TP39 V_SW4 V_SW4 Default: DNP DNP PVIN4 C66 C61 4.7uF 0.1UF SW4 PVIN4 LX4 FB4 DNC1 DNC2 DNC3 DNC4 DNC5 DNC6 DNC7 DNC8 21 L3 1UH 1 LX4 DNP V_SW4 2 2.0A 19 C47 22UF DNP FB4 2 6 16 33 42 44 45 46 C48 22UF DNP C46 22UF DNP C49 22UF DNP C38 22UF C39 22UF MC34VR500V1ES 57 14 15 32 48 SGND1 SGND2 SGND3 SGND4 HDR 1X2 TH 20 EPGND J24 1-2 shunt 2 1 C12 22UF V_SW2 PVIN2 C60 23 24 TP29 PVIN4 SWVIN C23 22UF TP35 V_SW2 TP33 LX2 DNP 2 4 1 3 1uH 1 Default: J23 1-2 shunt 1 2 HDR 1X2 TH SWVIN L1 DNP TP27 PVIN2 SWVIN TP20 V_SW1 V_SW1 PVIN1_1 PVIN1_2 PVIN1_3 VR500-SWITHCING REGULATOR O/P TERMINAL BLOCK SECTION VR500-SWITHCING REGULATOR O/P HDR J35 V_SW1 1 3 5 7 9 11 13 15 17 19 V_SW1 SW1 SUB_TB_2X1 V_SW1 V_SW4 J29 1 2 V_SW4 V_SW2 0.625 to 1.875 V 4.5 A (Max. Peak) V_SW2 V_SW3 V_SW3 V_SW2 V_SW1 2 4 6 8 10 12 14 16 18 20 V_SW1 V_SW4 V_SW4 V_SW2 V_SW2 V_SW3 V_SW3 CON_2X10 SW2 J31 1 2 PROGRAMMING INTERFACE 0.625 to 1.975V , 1.0 A (Max. Peak) SUB_TB_2X1 3V3 V_SW3 J32 1 2 SUB_TB_2X1 C5 0.1UF J20 SW3 0.625 to 1.975 V , 2.5 A (Max. Peak) 3,5 MCU_SDA GPIO1 MCU_SDA 5 GPIO1 2 4 6 8 1 3 5 7 3V3 MCU_SCL EN GPIO2 MCU_SCL EN 3,5 GPIO2 5 3,5 HDR 2X4 LDO REGULATOR 3.3 V V_SW4 Layout Note : Place this LDO section on the bottom side of the PCB. SW4 J30 1 2 SUB_TB_2X1 1.0 A operates in VTT mode provide DDR termination at 50% of SW3 VIN_USB 3V3 C79 1.0UF U3 VIN_USB 1 3V3 5 3V3 R21 LD0_3V3_EN 12.0K LD0_3V3_EN LDO_3V3_ADJ 4 C71 R22 20K 3 470PF 2 IN OUT 5 3V3 EN ADJ C74 2.2uF DNP + C80 2.2UF GND MIC5205 R1 R2 VOUT = 1.242 X ( (R2/R1) + 1) = 3.3V R2 = ((VOUT/1.242) -1) X R1 Figure 15. KITVR500EVM Switching Regulators Schematic KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 19 Schematic ESD PROTECTION LED INDICATORS ID1 USB_PWR USB_PWR A MCU_SCL A IDO GPIO1 GPIO2 R20 R19 0 0 32 33 36 37 PTD0 PTD1 2 3 40 RST_JM60_B BKGD_JM60 34 17 VDDAD/VREFH VDD LED_RED_ON 9 10 11 12 13 14 15 16 PTE0/TxD1 PTE1/RxD1 PTE2/TPM1CH0 PTE3/TPM1CH1 PTE4/MISO1 PTE5/MOSI1 PTE6/SPSCK1 PTE7/SS1 LD0_3V3_EN LED_GRN_ON LED_RED_ON LD0_3V3_EN 5 CRYSTAL SECTION XTAL_JM60 PTC0/SCL PTC1/SDA PTC2 PTC3/TxD2 PTC4 PTC5/RxD2 4 5 6 7 8 PTF0/TPM1CH2 PTF1/TPM1CH3 PTF4/TPM2CH0 PTF5/TPM2CH1 PTF6 22 23 38 39 41 42 PTG0/KBIP0 PTG1/KBIP1 PTG2/KBIP6 PTG3/KBIP7 PTG4/XTAL PTG5/EXTAL PTD0/ADP8/ACMP+ PTD1/ADP9/ACMPPTD2/KBIP2/ACMPO PTD7 IRQ/TPMCLK RESET BKGD/MS C70 0.1uF C67 12PF Y1 12MHz C68 12PF EXTAL_JM60 VUSB33 21 19 20 VUSB33 USBDN USBDP VUSB33 + C77 0.47UF Layout Note : Place the crstal section on the bottom side of the PCB as close as possible to the JM60 MCU. C75 4.7UF 35 18 43 49 MC9S08JM60CGTE R18 1M GND1 GPIO1 GPIO2 MCU_SCL MCU_SDA R15 470 LED_GRN_ON GND2 5 5 3,5 3,5 44 45 46 47 1 48 PTB0/MISO2/ADP0 PTB1/MOSI2/ADP1 PTB2/SPSCK2/ADP2 PTB3/SS2/ADP3 PTB4/KBIP4/ADP4 PTB5/KBIP5/ADP5 R14 470 Layout Note : Place this JM60 MCU on the bottom side of the PCB. 1 4 C72 0.1uF MCU_SCL MCU_SDA C78 10UF 2 3 ID1 IDO PTA0 PTA5 VSSAD/VREFL VSS VSSOSC GND 26 27 28 29 30 31 EN + C76 0.1uF U2 24 25 C73 0.1uF C VIN_USB Layout Note : Place the ESD diodes on the bottom side of the PCB. EN C C ESD9L5.0ST5G D9 C69 0.1uF 3 ,5 D5 LED Red D4 LED Green A C ESD9L5.0ST5G D8 A C ESD9L5.0ST5G D7 A D6 A ESD9L5.0ST5G C MCU_SDA VUSB33 R23 1.5K DNP R24 1.5K DNP JM60_USB_DN 90 JM60_USB_DP Ohm JM60_USB_DN 5 JM60_USB_DP 5 BDM PROGRAMMER USB_PWR USB_PWR R12 4.7K R13 4.7K USB_PWR J26 BKGD_JM60 1 3 5 2 4 6 RST_JM60_B HDR 2X3 USB SECTION USB_PWR L5 2 1 VUSB_L 2 F1 1 Default: HI1812V101R-10 0.5A J28 USB-MiniB C50 10UF USB_PWR 2-3 shunt J25 HDR 1X3 PVIN VIN_USB D+ D- VBUS 3 2 1 S1 S3 + 1 VUSB 2 USB_DN 3 USB_DP 90 Ohm ID 4 G 5 R16 33 R17 33 JM60_USB_DN 90 Ohm JM60_USB_DP JM60_USB_DN 5 JM60_USB_DP 5 L6 USB_GND 1 2 S2 S4 HI1812V101R-10 Figure 16. KITVR500EVM Control/programming Interface Schematic KTVR500UG Rev. 1.0 8/2014 20 Freescale Semiconductor, Inc. Board Layout 6 Board Layout 6.1 Silkscreen KITVR500EVM KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 21 Board Bill of Materials 7 Board Bill of Materials Table 8. Bill of Materials (1) Item Qty Schematic Label Value Description Part Number Assy Opt Active Components 1 1 U1 Freescale IC POWER MANAGEMENT COMMUNICATION -0.3-4.8 V QFN56 MC34VR500V1ES (3) 2 1 U2 Freescale IC MCU 8-bit 48 MHZ 60 KB FLASH 2.7-5.5V QFN48 MC9S08JM60CGTE (3) 3 1 U3 Micrel IC LIN VREG LDO 1.5-15 V 150 MA 2.5-16 V SOT23-5 MIC5205YM5 (3) 4 1 Y1 12 MHz Aker XTAL 12 MHZ 12PF -- 3.2X2.5MM C3E-12.000-12-3030-R SMT (3) Mounting Hole 5 4 BH1,BH2,BH3,BH4 MOUNTING HOLE 0.130 INCH, no part to order Capacitors 6 16 C1,C13,C14,C15,C20,C 26,C27,C36,C42,C43,C4 22 F 4,C45,C46,C47,C48,C49 CAP CER 22 F 10 V 20% X5R 0805 LMK212BJ226MG-T 7 9 C2,C7,C29,C31,C33,C5 1,C52,C54,C63 1.0 F CAP CER 1.0 F 10 V 10% X5R 0402 CC0402KRX5R6BB105 8 1 C3 1.0 F CAP CER 1.0 F 10V 10% X5R 0402 CC0402KRX5R6BB105 9 3 C4,C10,C32 2.2 F CAP CER 2.2 F 6.3 V 20% X5R 0402 C0402C225M9PACTU 10 11 C5,C6,C18,C21,C35,C3 0.1 F 7,C55,C57,C59,C61,C65 11 1 C8 12 14 C9,C11,C12,C16,C22,C 23,C24,C25,C28,C30,C3 22 F 8,C39,C40,C41 CAP CER 22 F 10 V 20% X5R 0805 LMK212BJ226MG-T 13 7 C17,C19,C56,C58,C60, C64,C66 4.7 F CAP CER 4.7 F 10 V 10% X5R 0603 LMK107BJ475KA-T 14 2 C34,C62 4.7 F CAP CER 4.7 F 6.3 V 20% X5R 0402 C0402X5R6R3-475MNP 0.47 F CAP CER 0.1 F 10 V 10% X5R 0402 (2) (2) C0402C104K8PAC CAP CER 0.47 F 16 V 10% X5R 0402 C1005X5R1C474K (3) 15 2 C50,C78 10 F CAP TANT 10 F 16 V 10% -- 3216-18 TAJA106K016R 16 1 C53 0.22 F CAP CER 0.22 F 16 V 10% X7R 0402 GRM155R71C224KA12D 17 2 C67,C68 12 PF CAP CER 12 PF 25 V 5% C0G 0402 CC0402JRNPO8BN120 18 5 C69,C70,C72,C73,C76 0.1 F CAP CER 0.1 F 16 V 10% X5R 0402 C1005X5R1C104K 19 1 C71 470 PF CAP CER 470 PF 50 V 5% COG 0603 06035A471JAT2A 20 1 C74 2.2 F CAP CER 2.2 F 16 V 10% X5R 0603 GRM188R61C225KE15D 21 1 C75 4.7 F CAP TANT 4.7 F 10 V 10% -- 3216-18 T491A475K010AT 22 1 C77 0.47 F CAP CER 0.47 F 16V 10% X7R 0603 C0603C474K4RAC 23 1 C79 1.0 F CAP CER 1.0 F 16 V 10% X5R 0603 C1608X5R1C105K 24 1 C80 2.2 F CAP TANT ESR=1.800 OHMS 2.2 F 10 V 10% 3216-18 TPSA225K010R1800 (2) Diodes 25 3 D1,D2,D5 LED Red LED RED SGL 30MA 0603 SML-LXFM0603SIC-TR 26 1 D3 LED_RED-GR N LED DUAL GRN/RED 30MA SMT LTST-C195KGJRKT KTVR500UG Rev. 1.0 8/2014 22 Freescale Semiconductor, Inc. Board Bill of Materials Table 8. Bill of Materials (1) (continued) Item Qty Schematic Label Value Description Part Number 27 1 D4 LED Green LED GRN SGL 30MA SMT 0603 SML-LXFM0603SUGCTR 28 4 D6,D7,D8,D9 ESD9L5.0ST5 G DIODE TVS ESD PROT ULT LOW CAP 5-5.4V SOD-923 ESD9L5.0ST5G Assy Opt Resistors 29 4 R1,R2,R3,R4 200 RES MF 200 1/10W 1% 0402 ERJ2RKF2000X 30 4 R5,R6,R12,R13 4.7 K RES MF 4.7 K 1/16W 1% 0402 RK73H1ETTP4701F 31 2 R7,R18 1.0 M RES MF 1.0 M 1/16W 1% AEC-Q200 0402 CRCW04021M00FKED 32 2 R8,R10 10 K RES MF 10 K 1/16W 1% AEC-Q200 0402 CRCW040210K0FKED 33 1 R9 100 K RES MF 100 K 1/16W 5% 0402 RK73B1ETTP104J 34 1 R11 ZERO RES MF ZERO 1/10W 1% 0603 MC0603SAF0000T5E 35 2 R14,R15 470 RES MF 470 1/16W 1% 0402 CR-02FL6--470R 36 2 R16,R17 33 RES MF 33 1/16W 1% 0402 CR-02FL6---33R 37 2 R19,R20 ZERO RES MF ZERO 1/10W -- 0402 ERJ-2GE0R00X 38 1 R21 12 K RES MF 12 K 1/10W 1% 0603 RK73H1JTTD1202F 39 1 R22 20 K RES MF 20 K 1/10W 5% 0603 CR0603-JW-203ELF 40 2 R23,R24 1.5 K RES MF 1.5 K 1/16W 5% 0402 CRCW04021K50JNED (2) 41 1 L1 1 H Coilcraft IND PWR 1 H@100 KHz 6 A 20% SMT XAL4020-102MEC (3) 42 1 L2 1 H Coilcraft IND PWR 1 H@100 KHZ 2.65 A 20% SMT LPS5015-102MLC (3) 43 1 L3 1 H TDK IND PWR 1 H@1 MHZ 2 A 30% SMT VLS252010T-1R0N (3) 44 1 L4 1 H Coilcraft IND PWR 1 H@100 KHZ 2.4 A 30% SMT LPS4012-102NLC (3) 45 2 L5,L6 HI1812V101R10 IND FER 100 @100 MHZ 8 A 25% SMD/1812 HI1812V101R-10 0.5 A FUSE PLYSW 0.5A 13.2V SMT MICROSMD050F-2 210-80542,211-79574 210-80539,211-79573 Inductors Switches, Connectors, Jumpers, and Test Points 46 1 F1 47 6 J1,J4,J5,J18,J21,J27 SUB_TB_3X1 SUBASSEMBLY HDR 1X3 TH 197MIL 374H SN 138L + CON 1X3 PLUG TB TH 5MM 449H 48 6 J2,J3,J29,J30,J31,J32 SUB_TB_2X1 SUBASSEMBLY HDR 1X2 TH 197MIL 374H SN 138L + CON 1X2 PLUG TB TH 5MM 449H 49 12 J6,J7,J8,J9,J10,J11,J12, J13,J14,J16,J23,J24 HDR 1X2 TH HDR 1X2 TH 100MIL SP 339H AU 118L 210-91-02GB01 50 3 J15,J17,J22 HDR 2X2 HDR 2X2 TH 100MIL CTR 340H SN 105L 5-146258-2 51 2 J19,J26 HDR 2X3 HDR 2X3 TH 100MIL CTR 335H AU 95L TSW-103-07-S-D 52 1 J20 HDR 2X4 HDR 2X4 TH 100MIL CTR 425H AU 310L TSW-104-16-G-D 53 1 J25 HDR 1X3 HDR 1X3 TH 100MIL SP 340H AU 118L M20-9990345 54 1 J28 USB-MiniB CON 5 USB MINI-B RA SHLD SKT SMT 31MIL SP AU 675031340 KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 23 Board Bill of Materials Table 8. Bill of Materials (1) (continued) Qty 55 3 J33,J34,J35 CON_2X10 CON 2X10 SKT SMT 100MIL CTR 390H AU SSW-110-22-F-D-VS-N 56 1 Q1 FDC6327C TRAN MOSFET DUAL N & P CHANNEL 2.5V S-SOT6 FDC6327C 57 2 Q2,Q3 FDV302P TRAN PMOS SW 120MA 25V SOT23 FDV302P 58 1 SW1 FSMSM SW SPST PB 12V 50MA SMT 1437566-4 (2) 42 TP1,TP2,TP3,TP4,TP5, TP6,TP7,TP8,TP9,TP10, TP11,TP12,TP13,TP14, TP15,TP16,TP17,TP18, TP19,TP20,TP21,TP22, TP23,TP24,TP25,TP26, TP27,TP28,TP29,TP30, TP31,TP32,TP33,TP34, TP35,TP36,TP37,TP38, TP39,TP40,TP41,TP42 TEST POINT RED TEST POINT RED 40 MIL DRILL 180 MIL TH 109L 5000 (2) 59 Schematic Label Value Description Part Number Assy Opt Item Notes 1. Freescale does not assume liability, endorse, or warrant components from external manufacturers are referenced in circuit drawings or tables. While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their application. 2. Do not populate 3. Critical components. For critical components, it is vital to use the manufacturer listed. KTVR500UG Rev. 1.0 8/2014 24 Freescale Semiconductor, Inc. References 8 References Following are URLs where you can obtain information on related Freescale products and application solutions: Freescale.com Support Pages Description URL KITVR500EVM Tool Summary Page http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITVR500EVM MC34VR500 Product Summary Page http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC34VR500 KTVR500SWUG Software User Guide http://cache.freescale.com/files/analog/doc/user_guide/KTVR500SWUG.pdf 8.1 Support Visit www.freescale.com/support for a list of phone numbers within your region. 8.2 Warranty Visit www.freescale.com/warranty for a list of phone numbers within your region. KTVR500UG Rev. 1.0 8/2014 Freescale Semiconductor, Inc. 25 Revision History 9 Revision History Revision 1.0 Date 8/2014 Description of Changes • Initial Release KTVR500UG Rev. 1.0 8/2014 26 Freescale Semiconductor, Inc. How to Reach Us: Information in this document is provided solely to enable system and software implementers to use Freescale products. Home Page: freescale.com There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based Web Support: freescale.com/support Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no on the information in this document. warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. SMARTMOS is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2014 Freescale Semiconductor, Inc. Document Number: KTVR500UG Rev. 1.0 8/2014