doc7834

Features
• Operating Voltage: 3.3V
• Access Time:
– 15 ns
• Very Low Power Consumption
•
•
•
•
•
•
•
•
•
– Active: 650 mW (Max) @ 15 ns, 540 mW (Max) @ 25 ns
– Standby: 3.3 mW (Typ)
Wide Temperature Range: -55 to +125⋅C
TTL-Compatible Inputs and Outputs
Asynchronous
Designed on 0.25 µm Radiation Hardened Process
No Single Event Latch Up below LET Threshold of 80 [email protected]°C
Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
500 Mils Wide FP36 Package
ESD better than 4000V
Quality Grades:
– QML-Q or V
– ESCC
Description
The AT60142H is a very low power CMOS static RAM organized as 524 288 x 8 bits.
Rad Hard
512K x 8
Very Low Power
CMOS SRAM
AT60142H
Atmel brings the solution to applications where fast computing is as mandatory as low
consumption, such as aerospace electronics, portable instruments, or embarked
systems.
Utilizing an array of six transistors (6T) memory cells, the AT60142H combines an
extremely low standby supply current (Typical value = 1 mA) with a fast access time at
15 ns or better over the full military temperature range. The high stability of the 6T cell
provides excellent protection against soft errors due to noise.
The AT60142H is processed according to the methods of the latest revision of the MIL
PRF 38535 or ESCC 9000.
It is produced on a radiation hardened 0.25 µm CMOS process.
7834C–AERO–11/13
Block Diagram
A0
A1
A2
A3
A4
CS
I/O1
I/O2
Vcc
GND
I/O3
I/O4
WE
A5
A6
A7
A8
A9
Note:
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36 - pin -Flatpack - 500 Mils
Pin Configuration
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O8
I/O7
GND
Vcc
I/O6
I/O5
A14
A13
A12
A11
A10
NC
NC pins are not bonded internally. So, they can be connected to GND or Vcc.
AT60142H
7834C–AERO–11/13
AT60142H
Pin Description
Table 1. Pin Names
Name
Description
A0 - A18
Address Inputs
I/O1 - I/O8
Data Input/Output
CS
Chip Select
WE
Write Enable
OE
Output Enable
Vcc
Power Supply
GND
Ground
Table 2. Truth Table(1)
CS
WE
OE
Inputs/Outputs
Mode
H
X
X
Z
Deselect / Power Down
L
H
L
Data Out
Read
L
L
X
Data In
Write
L
H
H
Z
Output Disable
Note:
1. L=low, H=high, X= L or H, Z=high impedance.
3
7834C–AERO–11/13
Electrical Characteristics
Absolute Maximum Ratings*
Supply Voltage to GND Potential: ....................... -0.5V + 4.6V
Stresses beyond those listed under "Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the
device at these or any other conditions
beyond those indicated in the operational
sections of this specification is not implied.
Exposure between recommended DC
operating and absolute maximum rating
conditions for extended periods may
affect device reliability.
*NOTE:
Voltage range on any input: ...................... GND -0.5V to 4.6V
Voltage range on any ouput: ..................... GND -0.5V to 4.6V
Storage Temperature: ................................... -65⋅C to + 150⋅C
Output Current from Output Pins: ................................ 20 mA
Electrostatic Discharge Voltage: ............................... > 4000V
(MIL STD 883D Method 3015)
Military Operating Range
Operating Voltage
Operating Temperature
3.3 + 0.3V
-55⋅C to + 125⋅C
Recommended DC Operating Conditions
Parameter
Description
Min
Typ
Max
Unit
Vcc
Supply voltage
3.0
3.3
3.6
V
GND
Ground
0.0
0.0
0.0
V
VIL
Input low voltage
GND - 0.3
0.0
0.8
V
VIH
Input high voltage
2.2
–
VCC + 0.3
V
Capacitance
Parameter
Note:
4
Description
Min
Typ
Max
Unit
Cin(1)
Input capacitance
–
–
12
pF
Cout(1)
Output capacitance
–
–
12
pF
1. Guaranteed but not tested.
AT60142H
7834C–AERO–11/13
AT60142H
DC Parameters
DC Test Conditions
TA = -55°C to + 125°C; Vss = 0V; VCC = 3.0V to 3.6V
Parameter
Minimum
Typical
Maximum
Unit
Input leakage current
-1
–
1
μA
Output leakage current
-1
–
1
μA
VOL(2)
Output low voltage
–
–
0.4
V
VOH(3)
Output high voltage
2.4
–
–
V
IIX (1)
IOZ
(1)
Description
1.
GND < VIN < VCC, GND < VOUT < VCC Output Disabled.
2.
VCC min. IOL = 8 mA
3.
VCC min. IOH = -4 mA.
Consumption
Symbol
TAVAV/TAVAW
Test Condition
AT60142H-15
Unit
Value
ICCSB (1)
Standby Supply Current
–
2.5
mA
max
ICCSB1 (2)
Standby Supply Current
–
2.0
mA
max
Dynamic Operating Current
15 ns
25 ns
50 ns
1 µs
180
150
75
10
mA
max
Dynamic Operating Current
15 ns
25 ns
50 ns
1 µs
150
130
120
100
mA
max
ICCOP(3)
Read
ICCOP(4) Write
1.
2.
3.
4.
Description
CS >VIH
CS > VCC - 0.3V
F = 1/TAVAV, Iout = 0 mA, WE = OE = VIH, VIN = GND/VCC, VCC max.
F = 1/TAVAW, Iout = 0 mA, WE = VIL, OE = VIH , VIN = GND/VCC, VCC max.
5
7834C–AERO–11/13
Data Retention Mode
Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules insure data retention:
1. During data retention chip select CS must be held high within VCC to VCC -0.2V.
2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation.
3. During power-up and power-down transitions CS and OE must be kept between VCC +
0.3V and 70% of VCC.
4. The RAM can begin operation > tR ns after VCC reaches the minimum operation voltages
(3V).
Figure 1. Data Retention Timing
Data Retention Characteristics
Parameter
Description
Min
Typ TA = 25⋅C
Max
Unit
VCCDR
VCC for data retention
2.0
–
–
V
tCDR
Chip deselect to data retention time
0.0
–
–
ns
–
–
ns
0.700
1.5
mA
tR
Operation recovery time
ICCDR (2)
Data retention current
1.
2.
6
tAVAV
–
(1)
TAVAV = Read cycle time.
CS = VCC, VIN = GND/VCC.
AT60142H
7834C–AERO–11/13
AT60142H
AC Characteristics
Test Conditions
Temperature Range:................................................................................................ -55 +125 °C
Supply Voltage: ........................................................................................................... 3.3 +0.3V
Input and Output Timing Reference Levels: ........................................................................ 1.5V
Test Loads and Waveforms
Figure 2. Test Loads
VCC
R L = 50 Ω
DUT
ZO = 50 Ω
VL = 1.5V
30pF
Figure 3. Test Loads specific to TWLQZ, TWHQX, TELQX, TEHQZ, TGLQX, TGHQZ
VCC
V CC
R 1 = 319 Ω
V L = 1.5V
DUT
R 2 = 353 Ω
5pF
Figure 4. CMOS Input Pulses
3.0V
GND
90%
10%
Rise time > 3 ns
90%
10%
Fall time > 3 ns
7
7834C–AERO–11/13
Write Cycle
Symbol
Parameter
AT60142H-15
Unit
Value
TAVAW
Write cycle time
15
ns
min
TAVWL
Address set-up time
0
ns
min
TAVWH
Address valid to end of write
8
ns
min
TDVWH
Data set-up time
7
ns
min
TELWH
CS low to write end
12
ns
min
TWLQZ
Write low to high Z(1)
6
ns
max
TWLWH
Write pulse width
8
ns
min
TWHAX
Address hold from end of write
0
ns
min
TWHDX
Data hold time
0
ns
min
TWHQX
Write high to low Z(1)
3
ns
min
Note:
Write Cycle 1
1. Parameters guaranteed, not tested, with output loading 5 pF. (See Figure 3 on page 7.)
WE Controlled, OE High During Write
E
8
AT60142H
7834C–AERO–11/13
AT60142H
Write Cycle 2
WE Controlled, OE Low
E
Write Cycle 3
CS Controlled
E
Note:
The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate a write and either signal can terminate a write by going in active
mode. The data input setup and hold timing should be referenced to the active edge of the signal
that terminates the write.
Data out is high impedance if OE= VIH.
9
7834C–AERO–11/13
Read Cycle
Symbol
Parameter
AT60142H-15
Unit
Value
TAVAV
Read cycle time
15
ns
min
TAVQV
Address access time
15
ns
max
TAVQX
Address valid to low Z
5
ns
min
TELQV
Chip-select access time
15
ns
max
TELQX
CS low to low Z(1)
5
ns
min
TEHQZ
CS high to high Z(1)
6
ns
max
TGLQV
Output Enable access time
6
ns
max
TGLQX
OE low to low Z(1)
2
ns
min
TGHQZ
OE high to high Z(1)
5
ns
max
Note:
1. Parameters guaranteed, not tested, with output loading 5 pF. (See Figure 3 on page 7.)
Read Cycle 1
Address Controlled (CS = OE = VIL, WE = VIH)
Read Cycle 2
Chip Select Controlled (WE = VIH)
10
AT60142H
7834C–AERO–11/13
AT60142H
Ordering Information
Part Number
Temperature Range
Speed
AT60142H-DS15M-E
Package
Flow
25⋅C
15 ns/3.3V
FP36.5 grounded lid
Engineering Samples
5962-0520804QYC
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5 grounded lid
QML Q
5962-0520804VYC
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5 grounded lid
QML V
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5 grounded lid
QML V RHA
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5 grounded lid
ESCC
25⋅C
15 ns/3.3V
Die
Engineering Samples
-55⋅ to +125⋅C
15 ns/3.3V
Die
Space Level B
5962R0520804VYC
AT60142H-DS15-SCC
(2)
AT60142H-DD15M-E(1)
AT60142H-DD15MSV
Note:
(1)
1. Contact Atmel for availability
2. Will be replaced by ESCC part number when available.
11
7834C–AERO–11/13
Package Drawing
36-lead Flat Pack (500 Mils)
12
AT60142H
7834C–AERO–11/13
AT60142H
Document Revision History
Creation from AT60142F document with the following changes :
•
Package DC removed
•
Update of parameters ICCSB, ICCSB1, ICCDR
Changes from Rev. A to Rev. B
Update : Atmel P/N replaced by SMD P/N in “Ordering Information” section
Changes from Rev. B to Rev. C
Update: Test conditions,Test Loads and Waveform in “AC Characteristics” section
13
7834C–AERO–11/13
Headquarters
International
Atmel Corporation
2325 Orchard Parkway
San Jose, CA 95131
USA
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600
Atmel Asia
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimshatsui
East Kowloon
Hong Kong
Tel: (852) 2721-9778
Fax: (852) 2722-1369
Atmel Europe
Le Krebs
8, Rue Jean-Pierre Timbaud
BP 309
78054 Saint-Quentin-enYvelines Cedex
France
Tel: (33) 1-30-60-70-00
Fax: (33) 1-30-60-71-11
Atmel Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
Tel: (81) 3-3523-3551
Fax: (81) 3-3523-7581
Technical Support
Enter Product Line E-mail
Sales Contact
www.atmel.com/contacts
Product Contact
Web Site
www.atmel.com
Literature Requests
www.atmel.com/literature
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property
right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON
ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS
PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES
(INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR
INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties
with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without
notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not
be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
© 2008 Atmel Corporation. All rights reserved. Atmel ®, logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.
7834C–AERO–11/13
Similar pages