AT60142F - Complete

Features
• Operating Voltage: 3.3V
• Access Time:
– 15 ns (AT60142F)
• Very Low Power Consumption
•
•
•
•
•
•
•
•
•
– Active: 650 mW (Max) @ 15 ns, 540 mW (Max) @ 25 ns
– Standby: 3.3 mW (Typ)
Wide Temperature Range: -55 to +125°C
TTL-Compatible Inputs and Outputs
Asynchronous
Designed on 0.25 µm Radiation Hardened Process
No Single Event Latch Up below LET Threshold of 80 [email protected]°C
Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
500 Mils Wide FP36 Package
ESD Better than 4000V
Quality Grades: ESCC with 9301/052, QML-Q or V with smd 5962-05208
Description
The AT60142F is a very low power CMOS static RAM organized as 524 288 x 8 bits.
Atmel brings the solution to applications where fast computing is as mandatory as low
consumption, such as aerospace electronics, portable instruments, or embarked
systems.
Rad Hard
512K x 8
Very Low Power
CMOS SRAM
AT60142F
Utilizing an array of six transistors (6T) memory cells, the AT60142F combines an
extremely low standby supply current (Typical value = 1 mA) with a fast access time at
15 ns or better over the full military temperature range. The high stability of the 6T cell
provides excellent protection against soft errors due to noise.
The AT60142F is processed according to the methods of the latest revision of the MIL
PRF 38535 or ESCC 9000.
It is produced on a radiation hardened 0.25 µm CMOS process.
4408H–AERO–05/10
1
AT60142F
Block Diagram
Pin Configuration
A0
A1
A2
A4
CS
I/O1
I/O2
Vcc
GND
I/O3
I/O4
WE
A5
A6
A7
A8
A9
36 - pin -Flatpack - 500 Mils
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O8
I/O7
GND
Vcc
I/O6
I/O5
A14
A13
A12
A11
A10
N/C
2
4408H–AERO–05/10
Pin Description
Table 1. Pin Names
Name
Description
A0 - A18
Address Inputs
I/O1 - I/O8
Data Input/Output
CS
Chip Select
WE
Write Enable
OE
Output Enable
Vcc
Power Supply
GND
Ground
Table 2. Truth Table(1)
CS
WE
OE
Inputs/Outputs
Mode
H
X
X
Z
Deselect/
Power-down
L
H
L
Data Out
Read
L
L
X
Data In
Write
L
H
H
Z
Output Disable
Note:
3
1. L=low, H=high, X= L or H, Z=high impedance.
AT60142F
4408H–AERO–05/10
AT60142F
Electrical Characteristics
Absolute Maximum Ratings*
Supply Voltage to GND Potential: ....................... -0.5V + 4.6V
*NOTE:
Voltage range on any input: ...................... GND -0.5V to 4.6V
Voltage range on any ouput: ..................... GND -0.5V to 4.6V
Storage Temperature: ................................... -65⋅C to + 150⋅C
Output Current from Output Pins: ................................ 20 mA
Electrostatic Discharge Voltage: ............................... > 4000V
(MIL STD 883D Method 3015.3)
Stresses beyond those listed under "Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the
device at these or any other conditions
beyond those indicated in the operational
sections of this specification is not implied.
Exposure between recommended DC
operating and absolute maximum rating
conditions for extended periods may
affect device reliability.
Military Operating Range
Operating Voltage
Operating Temperature
3.3 + 0.3V
-55°C to + 125°C
Military
Recommended DC Operating Conditions
Parameter
Description
Vcc
Supply voltage
GND
Ground
Min
Typ
Max
Unit
3
3.3
3.6
V
0.0
0.0
0.0
V
VIL
Input low voltage
GND - 0.3
0.0
0.8
V
VIH
Input high voltage
2.2
–
VCC + 0.3
V
Description
Min
Typ
Max
Unit
Capacitance
Parameter
Note:
Cin(1)
Input capacitance
–
–
12
pF
Cout(1)
Output capacitance
–
–
12
pF
1. Guaranteed but not tested.
4
4408H–AERO–05/10
DC Parameters
Parameter
Minimum
Typical
Maximum
Unit
Input leakage current
-1
–
1
μA
IOZ(1)
Output leakage
current
-1
–
1
μA
VOL(2)
Output low voltage
–
–
0.4
V
VOH(3)
Output high voltage
2.4
–
–
V
IIX
(1)
Description
1.
GND < VIN < VCC, GND < VOUT < VCC Output Disabled.
2.
VCC min. IOL = 8 mA
3.
VCC min. IOH = -4 mA.
Consumption
TAVAV/TAVAW
Test Condition
AT60142F-15
Unit
Value
Standby Supply
Current
–
2
mA
max
Standby Supply
Current
–
1.8
mA
max
Read
Dynamic Operating
Current
15 ns
25 ns
50 ns
1 µs
180
150
75
10
mA
max
ICCOP(4) Write
Dynamic Operating
Current
15 ns
25 ns
50 ns
1 µs
150
130
120
100
mA
max
Symbol
Description
ICCSB (1)
ICCSB1 (2)
ICCOP(3)
1.
2.
3.
4.
5
CS >VIH
CS > VCC - 0.3V
F = 1/TAVAV, Iout = 0 mA, WE = OE = VIH, VIN = GND/VCC, VCC max.
F = 1/TAVAW, Iout = 0 mA, WE = VIL, OE = VIH , VIN = GND/VCC, VCC max.
AT60142F
4408H–AERO–05/10
AT60142F
Data Retention Mode
Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage
and supply current are guaranteed over temperature. The following rules insure data
retention:
1. During data retention chip select CS must be held high within VCC to VCC -0.2V.
2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation.
3. During power-up and power-down transitions CS and OE must be kept between
VCC + 0.3V and 70% of VCC.
4. The RAM can begin operation > tR ns after VCC reaches the minimum operation
voltages (3V).
Figure 1. Data Retention Timing
Data Retention Characteristics
Parameter
Description
Min
Typ TA = 25°C
Max
Unit
VCCDR
VCC for data
retention
2.0
–
–
V
tCDR
Chip deselect
to data
retention time
0.0
–
–
ns
tR
Operation
recovery time
tAVAV
–
–
ns
ICCDR (2)
Data retention
current
–
0.700
1.3
mA
1.
2.
(1)
TAVAV = Read cycle time.
CS = VCC, VIN = GND/VCC.
6
4408H–AERO–05/10
AC Characteristics
Temperature Range:................................................ -55 +125°C
Supply Voltage:........................................................ 3.3 +0.3V
Input Pulse Levels: .................................................. GND to 3.0V
Input Rise and Fall Times:....................................... 3ns (10 - 90%)
Input and Output Timing Reference Levels: ............ 1.5V
Output Loading IOL/IOH:............................................ See Figure 2
Figure 2. AC Test Loads Waveforms
7
AT60142F
4408H–AERO–05/10
AT60142F
Write Cycle
Symbol
Parameter
AT60142F-15
Unit
Value
TAVAW
Write cycle time
15
ns
min
TAVWL
Address set-up time
0
ns
min
TAVWH
Address valid to end of write
8
ns
min
TDVWH
Data set-up time
7
ns
min
TELWH
CS low to write end
12
ns
min
TWLQZ
Write low to high Z(1)
6
ns
max
TWLWH
Write pulse width
8
ns
min
TWHAX
Address hold from end of write
0
ns
min
TWHDX
Data hold time
0
ns
min
TWHQX
Write high to low Z(1)
3
ns
min
Notes:
1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.)
Figure 3. Write Cycle 1. WE Controlled, OE High During Write
E
Figure 4. Write Cycle 2. WE Controlled, OE Low
E
8
4408H–AERO–05/10
Figure 5. Write Cycle 3. CS Controlled(1)
E
Note:
9
The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate
a write and either signal can terminate a write by going in active mode. The data input setup and hold timing should be referenced to the active edge of the signal that terminates the write.
Data out is high impedance if OE= VIH.
AT60142F
4408H–AERO–05/10
AT60142F
Read Cycle
Symbol
Parameter
AT60142F-15
Unit
Value
TAVAV
Read cycle time
15
ns
min
TAVQV
Address access time
15
ns
max
TAVQX
Address valid to low Z
5
ns
min
TELQV
Chip-select access time
15
ns
max
TELQX
CS low to low Z(1)
5
ns
min
TEHQZ
CS high to high Z(1)
6
ns
max
TGLQV
Output Enable access time
6
ns
max
TGLQX
OE low to low Z(1)
2
ns
min
TGHQZ
OE high to high Z (1)
5
ns
max
Note:
1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.)
Figure 6. Read Cycle nb 1: Address Controlled (CS = OE = VIL, WE = VIH)
Figure 7. Read Cycle nb 2: Chip Select Controlled (WE = VIH)
10
4408H–AERO–05/10
Ordering Information
Part Number
Temperature Range
Speed
Package
Flow
25°C
15 ns/3.3V
FP36.5 grounded lid
Engineering Samples
AT60142F-DS15M-E
5962-0520802QYC
-55° to +125°C
15 ns/3.3V
FP36.5 grounded lid
QML Q
5962-0520802VYC
-55° to +125°C
15 ns/3.3V
FP36.5 grounded lid
QML V
-55° to +125°C
15 ns/3.3V
FP36.5 grounded lid
QML V RHA
-55° to +125°C
15 ns/3.3V
FP36.5 grounded lid
ESCC
5962R0520802VYC
AT60142F-DS15-SCC
(3)
(1)
25°C
15 ns/3.3V
Die
Engineering Samples
-55° to +125°C
15 ns/3.3V
Die
QML V
5962-0520802QXC
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5
QML Q
5962-0520802VXC
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5
QML V
5962R0520802VXC
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5
QML V RHA
930105202
-55⋅ to +125⋅C
15 ns/3.3V
FP36.5
ESCC
AT60142F-DD15M-E
AT60142F-DD15MSV(1) (2)
Not recommended for new designs
Note:
1. Contact Atmel for availability.
2. Will be replaced by SMD part number when available.
3. Will be replaced by ESCC part number when available.
11
AT60142F
4408H–AERO–05/10
AT60142F
Package Drawings
36-lead Flat Pack (500 Mils)
Notes:
1. package DC : lid is NOT connected to GROUND
2. package DS : lid is connected to GROUND
12
4408H–AERO–05/10
Document Revision History
Changes from Rev. E to Rev. F
1. Split datasheet into two separate documents: removed AT60142FT from this
document. Please refer to document 7726 on the Atmel web site.
Changes from Rev. F to Rev. G
1. Suppression of version AT60142G
2. Update of “Absolute Maximum Ratings” section
Changes from Rev. G to Rev. H
1. In “Features” section page 1 :
–
“MeV/mg/cm2” unit replaced by [email protected]°C”
2. In “AC Characteristics” section page 7 :
–
“See figure 1” replaced by “See figure 2”
3. In “Ordering Information” section page 11 :
–
13
All parts supplied in FP36.5 without gounded lid are not recommended for
new designs.
AT60142F
4408H–AERO–05/10
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