LT6108-1/LT6108-2 High Side Current Sense Amplifier with Reference and Comparator FEATURES DESCRIPTION Current Sense Amplifier – Fast Step Response: 500ns – Low Offset Voltage: 125µV Maximum – Low Gain Error: 0.2% Maximum n Internal 400mV Precision Reference n Internal Comparator – Fast Response Time: 500ns – Total Threshold Error: ±1.25% Maximum – Latching or Non-Latching Comparator Option n Wide Supply Range: 2.7V to 60V n Supply Current: 450µA n Low Shutdown Current: 5µA Maximum n Specified for –40°C to 125°C Temperature Range n Available in 8-Lead MSOP and 8-Lead (2mm × 3mm) DFN Packages The LT®6108 is a complete high side current sense device that incorporates a precision current sense amplifier, an integrated voltage reference and a comparator. Two versions of the LT6108 are available. The LT6108-1 has a latching comparator and the LT6108-2 has a non-latching comparator. In addition, the current sense amplifier and comparator inputs and outputs are directly accessible. The amplifier gain and comparator trip point are configured by external resistors. The open-drain comparator output allows for easy interface to other system components. n APPLICATIONS n n n n n n n Overcurrent and Fault Detection Current Shunt Measurement Battery Monitoring Motor Control Automotive Monitoring and Control Remote Sensing Industrial Control The overall propagation delay of the LT6108 is typically only 1.4µs, allowing for quick reaction to overcurrent conditions. The 1MHz bandwidth allows the LT6108 to be used for error detection in critical applications such as motor control. The high threshold accuracy of the comparator, combined with the ability to latch the comparator, ensures the LT6108 can capture high speed events. The LT6108 is fully specified for operation from –40°C to 125°C, making it suitable for industrial and automotive applications. The LT6108 is available in the small 8-lead MSOP and 8-lead DFN packages. L, LT, LTC, LTM, TimerBlox, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Response to Overcurrent Event Circuit Fault Protection with Very Fast Latching Load Disconnect 0.1Ω 12V 1k 6.2V* IRF9640 TO LOAD 0.1µF 100Ω 0V SENSEHI SENSELO V+ 3.3V 1k 2N2700 10k OUTA VOUT ILOAD 200mA/DIV LT6108-1 RESET 250mA DISCONNECT 6.04k EN/RST OUTC V– 0mA VOUTC 5V/DIV 0V INC 1.6k 610812 TA01a *CMH25234B VLOAD 10V/DIV 250mA DISCONNECT 5µs/DIV 610812 TA01b 610812fa 1 LT6108-1/LT6108-2 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–)..................................60V Maximum Voltage (SENSELO, SENSEHI, OUTA)................................ V+ + 1V Maximum V+ – (SENSELO or SENSEHI).....................33V Maximum EN, EN/RST Voltage..................................60V Maximum Comparator Input Voltage.........................60V Maximum Comparator Output Voltage......................60V Input Current (Note 2)...........................................–10mA SENSEHI, SENSELO Input Current........................ ±10mA Differential SENSEHI or SENSELO Input Current...±2.5mA Amplifier Output Short-Circuit Duration (to V–)... Indefinite Operating Temperature Range (Note 3) LT6108I.................................................–40°C to 85°C LT6108H............................................. –40°C to 125°C Specified Temperature Range (Note 3) LT6108I.................................................–40°C to 85°C LT6108H............................................. –40°C to 125°C Maximum Junction Temperature........................... 150°C Storage Temperature Range................... –65°C to 150°C MSOP Lead Temperature (Soldering, 10 sec)......... 300°C PIN CONFIGURATION LT6108-1 LT6108-2 TOP VIEW SENSELO EN/RST OUTC V– 1 2 3 4 8 7 6 5 SENSEHI V+ OUTA INC TOP VIEW SENSELO EN OUTC V– 1 2 3 4 8 7 6 5 SENSEHI V+ OUTA INC MS8 PACKAGE 8-LEAD PLASTIC MSOP θJA = 163°C/W, θJC = 45°C/W MS8 PACKAGE 8-LEAD PLASTIC MSOP θJA = 163°C/W, θJC = 45°C/W TOP VIEW TOP VIEW 8 SENSEHI SENSELO 1 EN/RST 2 OUTC 3 V– 4 + 9 7 V 6 OUTA 5 INC DCB PACKAGE 8-LEAD (2mm × 3mm) PLASTIC DFN θJA = 64°C/W, θJC = 10°C/W EXPOSED PAD (PIN 9) IS V–, PCB CONNECTION OPTIONAL 8 SENSEHI SENSELO 1 EN 2 OUTC 3 V– 4 9 7 V+ 6 OUTA 5 INC DCB PACKAGE 8-LEAD (2mm × 3mm) PLASTIC DFN θJA = 64°C/W, θJC = 10°C/W EXPOSED PAD (PIN 9) IS V–, PCB CONNECTION OPTIONAL 610812fa 2 LT6108-1/LT6108-2 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT6108AIMS8-1#PBF LT6108AIMS8-1#TRPBF LTFND 8-Lead Plastic MSOP –40°C to 85°C LT6108IMS8-1#PBF LT6108IMS8-1#TRPBF LTFND 8-Lead Plastic MSOP –40°C to 85°C LT6108AHMS8-1#PBF LT6108AHMS8-1#TRPBF LTFND 8-Lead Plastic MSOP –40°C to 125°C LT6108HMS8-1#PBF LT6108HMS8-1#TRPBF LTFND 8-Lead Plastic MSOP –40°C to 125°C LT6108AIMS8-2#PBF LT6108AIMS8-2#TRPBF LTFNG 8-Lead Plastic MSOP –40°C to 85°C LT6108IMS8-2#PBF LT6108IMS8-2#TRPBF LTFNG 8-Lead Plastic MSOP –40°C to 85°C LT6108AHMS8-2#PBF LT6108AHMS8-2#TRPBF LTFNG 8-Lead Plastic MSOP –40°C to 125°C LT6108HMS8-2#PBF LT6108HMS8-2#TRPBF LTFNG 8-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT6108IDCB-1#TRMPBF LT6108IDCB-1#TRPBF LFNF 8-Lead (2mm × 3mm) Plastic DFN –40°C to 85°C LT6108HDCB-1#TRMPBF LT6108HDCB-1#TRPBF LFNF 8-Lead (2mm × 3mm) Plastic DFN –40°C to 125°C LT6108IDCB-2#TRMPBF LT6108IDCB-2#TRPBF LFNH 8-Lead (2mm × 3mm) Plastic DFN –40°C to 85°C LT6108HDCB-2#TRMPBF LT6108HDCB-2#TRPBF LFNH 8-Lead (2mm × 3mm) Plastic DFN TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ –40°C to 125°C 610812fa 3 LT6108-1/LT6108-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating + + temperature range, otherwise specifications are at TA = 25°C. V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) SYMBOL PARAMETER V+ Supply Voltage Range IS Supply Current (Note 4) CONDITIONS MIN l TYP 2.7 V+ = 2.7V, RIN = 1k, VSENSE = 5mV V+ = 60V, RIN = 1k, VSENSE = 5mV 60 450 V+ = 2.7V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V V µA 650 950 µA µA 3 5 7 µA µA 7 11 13 µA µA l V+ = 60V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V UNITS 550 l Supply Current in Shutdown MAX l EN/RST Pin Current VEN/RST = 0V, V+ = 60V (LT6108-1 Only) –200 nA EN Pin Current VEN = 0V, V+ = 60V (LT6108-2 Only) –100 nA VIH EN/RST Pin Input High V+ = 2.7V to 60V (LT6108-1 Only) l VIL EN/RST Pin Input Low V+ = 2.7V to 60V (LT6108-1 Only) l VIH EN Pin Input High V+ = 2.7V to 60V (LT6108-2 Only) l EN Pin Input Low V+ = 2.7V to 60V (LT6108-2 Only) l VIL 1.9 V 0.8 1.9 V V 0.8 V 125 350 250 450 µV µV µV µV Current Sense Amplifier VSENSE = 5mV, LT6108A VSENSE = 5mV, LT6108 VSENSE = 5mV, LT6108A VSENSE = 5mV, LT6108 l l Input Offset Voltage Drift VSENSE = 5mV l Input Bias Current (SENSELO, SENSEHI) V+ = 2.7V to 60V IOS Input Offset Current V+ = 2.7V to 60V IOUTA Output Current (Note 5) PSRR Power Supply Rejection Ratio (Note 6) V+ = 2.7V to 60V Common Mode Rejection Ratio V+ = 36V, VSENSE = 5mV, VICM = 2.7V to 36V VOS ∆VOS/∆T IB CMRR Input Offset Voltage ±0.8 60 l V+ = 60V, V VSENSE(MAX) –125 –350 –250 –450 µV/°C 300 350 ±5 l 1 l 120 114 SENSE = 5mV, VICM = 27V to 60V l 110 103 nA nA nA mA 127 dB dB 125 dB 125 dB dB Full-Scale Input Sense Voltage (Note 5) RIN = 500Ω l 500 mV Gain Error (Note 7) V+ = 2.7V to 12V V+ = 12V to 60V, VSENSE = 5mV to 100mV, MS8 Package V+ = 12V to 60V, VSENSE = 5mV to 100mV, DFN Package l l –0.2 –0.3 SENSELO Voltage (Note 8) V+ = 2.7V, VSENSE = 100mV, ROUT = 2k V+ = 60V, VSENSE = 100mV l l 2.5 27 Output Swing High (V+ to VOUTA) V+ = 2.7V, VSENSE = 27mV l 0.2 V V+ = 12V, VSENSE = 120mV l 0.5 V –0.08 0 0 % % % V V BW Signal Bandwidth IOUT = 1mA IOUT = 100µA 1 140 MHz kHz tr Input Step Response (to 50% of Final Output Voltage) V+ = 2.7V, VSENSE = 24mV Step, Output Rising Edge V+ = 12V to 60V, VSENSE = 100mV Step, Output Rising Edge 500 500 ns ns tSETTLE Settling Time to 1% VSENSE = 10mV to 100mV, ROUT = 2k 2 µs 610812fa 4 LT6108-1/LT6108-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating + + temperature range, otherwise specifications are at TA = 25°C. V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS l l 395 392 400 400 405 408 mV mV 3 10 15 mV l –50 Reference and Comparator VTH(R) (Note 9) Rising Input Threshold Voltage V+ = 2.7V to 60V, LT6108A V+ = 2.7V to 60V, LT6108 VHYS VHYS = VTH(R) – VTH(F) V+ = 2.7V to 60V Comparator Input Bias Current VINC = 0V, V+ = 60V VOL Output Low Voltage IOUTC = 500µA, V+ = 2.7V nA 60 l High to Low Propagation Delay 5mV Overdrive 100mV Overdrive Output Fall Time tRESET Reset Time LT6108-1 Only tRPW Valid RST Pulse Width LT6108-1 Only Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Input and output pins have ESD diodes connected to ground. The SENSEHI and SENSELO pins have additional current handling capability specified as SENSEHI, SENSELO Input Current. Note 3: The LT6108I is guaranteed to meet specified performance from –40°C to 85°C. LT6108H is guaranteed to meet specified performance from –40°C to 125°C. Note 4: Supply current is specified with the comparator output high. When the comparator output goes low the supply current will increase by 75µA typically. 150 220 3 0.5 µs µs 0.08 µs 0.5 l 2 mV mV µs 15 µs Note 5: The full-scale input sense voltage and the maximum output current must be considered to achieve the specified performance. Note 6: Supply voltage and input common mode voltage are varied while amplifier input offset voltage is monitored. Note 7: The specified gain error does not include the effect of external resistors RIN and ROUT. Although gain error is only guaranteed between 12V and 60V, similar performance is expected for V+ < 12V, as well. Note 8: Refer to SENSELO, SENSEHI Range in the Applications Information section for more information. Note 9: The input threshold voltage which causes the output voltage of the comparator to transition from high to low is specified. The input voltage which causes the comparator output to transition from low to high is the magnitude of the difference between the specified threshold and the hysteresis. 610812fa 5 LT6108-1/LT6108-2 TYPICAL PERFORMANCE CHARACTERISTICS Performance characteristics taken at TA = 25°C, + + V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) Supply Current vs Supply Voltage Start-Up Supply Current Enable/Disable Response 600 SUPPLY CURRENT (µA) 500 V+ 5V/DIV 400 VEN/RST 2V/DIV 0V 0V 300 200 100 0 IS 500µA/DIV IS 500µA/DIV 0µA 0µA 0 10 20 30 40 SUPPLY VOLTAGE (V) 50 60 10µs/DIV 100µs/DIV 610812 G02 610812 G03 610812 G01 Input Offset Voltage vs Temperature 100 5 TYPICAL UNITS 200 Offset Voltage Drift Distribution 12 5 TYPICAL UNITS 80 10 100 0 –100 PERCENTAGE OF UNITS (%) 60 OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) 300 Amplifier Offset Voltage vs Supply Voltage 40 20 0 –20 –40 –60 –200 8 6 4 2 –80 –300 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) –100 0 10 30 40 20 SUPPLY VOLTAGE (V) 610812 G04 25 –0.08 RIN = 100Ω –0.10 –0.12 –0.14 –016 50 25 0 75 TEMPERATURE (°C) 0.50 VSENSE = 5mV TO 100mV 0.45 0.40 20 V+ = 12V VSENSE = 120mV 0.35 0.30 15 0.25 0.20 10 V+ = 2.7V VSENSE = 27mV 0.15 0.10 5 0.05 VSENSE = 5mV TO 100mV –0.18 –50 –25 Amplifier Output Swing vs Temperature V+ – VOUTA (V) GAIN ERROR (%) –0.06 PERCENTAGE OF UNITS (%) 0 RIN = 1k –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 OFFSET VOLTAGE DRIFT (µV/°C) 610812 G38 Amplifier Gain Error Distribution 0.02 –0.04 0 60 610812 G05 Amplifier Gain Error vs Temperature –0.02 50 100 125 610812 G06 0 –0.048 –0.052 –0.056 –0.060 –0.064 –0.068 GAIN ERROR (%) 610812 G07 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 610812 G18 610812fa 6 LT6108-1/LT6108-2 TYPICAL PERFORMANCE CHARACTERISTICS Performance characteristics taken at TA = 25°C, + + V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) Common Mode Rejection Ratio vs Frequency 46 120 VSENSE 100mV/DIV 0V G = 100, ROUT = 10k 40 VOUTA 1V/DIV 0V 100 80 GAIN (dB) COMMON MODE REJECTION RATIO (dB) LT6108-1 Step Response Amplifier Gain vs Frequency 140 60 G = 50, ROUT = 5k 34 28 VOUTC 2V/DIV G = 20, ROUT = 2k 0V 40 20 0 VEN/RST 5V/DIV 0V ROUT = 2k 100mV INC OVERDRIVE 22 1 10 100 1k 10k 100k FREQUENCY (Hz) 1M 16 10M IOUTA = 1mA IOUTA = 100µA 1k 10k 100k 1M FREQUENCY (Hz) 2µs/DIV 610812 G11 610812 G10 610812 G09 Amplifier Input Bias Current vs Temperature LT6108-2 Step Response Amplifier Step Response (VSENSE = 0mV to 100mV) 100 ROUT = 2k,100mV INC OVERDRIVE RIN = 100Ω G = 100V/V 90 INPUT BIAS CURRENT (nA) VSENSE 100mV/DIV 0V 10M VOUTA 1V/DIV 0V VOUTC 2V/DIV 0V 2µs/DIV 610812 G12 80 70 SENSEHI 60 50 VOUTA 2V/DIV SENSELO 0V 40 30 20 VSENSE 50mV/DIV 10 0V 0 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 2µs/DIV 610812 G14 610812 G13 Amplifier Step Response (VSENSE = 0mV to 100mV) Amplifier Step Response (VSENSE = 10mV to 100mV) RIN = 1k ROUT = 20k G = 20V/V RIN = 1k ROUT = 20k G = 20V/V RIN = 100Ω G = 100V/V VOUTA 2V/DIV Amplifier Step Response (VSENSE = 10mV to 100mV) VOUTA 1V/DIV VOUTA 1V/DIV 0V 0V VSENSE 100mV/DIV 0V VSENSE 100mV/DIV 0V 0V VSENSE 50mV/DIV 0V 2µs/DIV 2µs/DIV 2µs/DIV 610812 G15 610812 G16 610912 G17 610812fa 7 LT6108-1/LT6108-2 TYPICAL PERFORMANCE CHARACTERISTICS Performance characteristics taken at TA = 25°C, + + V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) 160 408 25 120 100 80 60 40 COMPARATOR THRESHOLD (mV) 140 20 PERCENTAGE OF UNITS (%) POWER SUPPLY REJECTION RATIO (dB) Comparator Threshold vs Temperature Comparator Threshold Distribution Power Supply Rejection Ratio vs Frequency 15 10 5 20 0 1 10 100 1k 10k 100k FREQUENCY (Hz) 1M 0 10M 396 397.6 399.2 400.8 402.8 COMPARATOR THRESHOLD (mV) 610812 G08 Hysteresis Distribution 10 5 16 14 12 10 8 6 4 0 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 4.6 6.2 7.7 9.3 10.9 12.5 14.1 15.7 17.3 COMPARATOR HYSTERESIS (mV) LT6108-1 EN/RST Current vs Voltage 10 8 6 4 2 0 0 10 30 V+ (V) 20 40 50 60 610812 G23 LT6108-2 EN Current vs Voltage 50 50 0 0 –50 –50 EN CURRENT (nA) EN/RST CURRENT (nA) 5 TYPICAL UNITS 12 610812 G22 610812 G21 –100 –100 –150 –150 –200 –250 394 Hysteresis vs Supply Voltage 2 3 396 14 COMPARATOR HYSTERESIS (mV) 125°C 15 0 398 Hysteresis vs Temperature COMPARATOR HYSTERESIS (mV) PERCENTAGE OF UNITS (%) 25°C 400 610812 G20 18 –40°C 402 392 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 404 20 20 404 610812 G19 30 25 5 TYPICAL UNITS 406 –200 0 10 20 30 40 EN/RST VOLTAGE (V) 50 60 610812 G24 –250 0 10 20 30 40 EN VOLTAGE (V) 50 60 610812 G25 610812fa 8 LT6108-1/LT6108-2 TYPICAL PERFORMANCE CHARACTERISTICS Performance characteristics taken at TA = 25°C, + + V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) Comparator Input Bias Current vs Input Voltage Comparator Input Bias Current vs Input Voltage 10 5 0 –5 –10 125°C 25°C –40°C –15 0 20 40 COMPARATOR INPUT VOLTAGE (V) 0.75 0 –5 –10 0 0.2 0.4 0.6 0.8 COMPARATOR INPUT VOLTAGE (V) 8 –40°C AND 25°C 0 50 60 20 30 40 10 COMPARATOR OUTPUT PULL-UP VOLTAGE (V) 4.0 3.5 RISING INPUT LT6108-1 AND LT6108-2 3.0 2.5 2.0 FALLING INPUT LT6108-2 1.5 1000 FALLING INPUT LT6108-2 100 RISING INPUT LT6108-1 AND LT6108-2 1.0 0.5 0 3 VOH = 0.9 • VPULLUP VOL = 0.1 • VPULLUP 100mV INC OVERDRIVE CL = 2pF 4.5 0 40 120 160 200 80 COMPARATOR INPUT OVERDRIVE (mV) 610812 G30 10 1 10 100 RC PULL-UP RESISTOR (kΩ) V+ = 5V 1000 610812 G32 610812 G31 LT6108-1 Comparator Step Response (100mV INC Overdrive) LT6108-1 Comparator Step Response (5mV INC Overdrive) VINC 0.5V/DIV 0V 2 Comparator Rise/Fall Time vs Pull-Up Resistor RISE/FALL TIME (ns) COMPARATOR PROPAGATION DELAY (µs) OUTC LEAKAGE CURRENT (nA) 125°C 1 610812 G29 10000 5.0 13 0 IOUTC (mA) Comparator Propagation Delay vs Input Overdrive 23 –2 0 1.0 610812 G28 Comparator Output Leakage Current vs Pull-Up Voltage 3 0.50 0.25 125°C 25°C –40°C –15 610812 G27 18 125°C 25°C –40°C 5 –20 60 1.00 VOL OUTC (V) COMPARATOR INPUT BIAS CURRENT (nA) COMPARATOR INPUT BIAS CURRENT (nA) 10 –20 Comparator Output Low Voltage vs Output Sink Current VINC 0.5V/DIV 0V V+ = 5V VOUTC 2V/DIV VOUTC 2V/DIV 0V 0V VEN/RST 5V/DIV 0V VEN/RST 5V/DIV 0V 5µs/DIV 5µs/DIV 610812 G33 610812 G34 610812fa 9 LT6108-1/LT6108-2 TYPICAL PERFORMANCE CHARACTERISTICS Performance characteristics taken at TA = 25°C, + + V = 12V, VPULLUP = V , VEN = VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3) LT6108-2 Comparator Step Response (5mV INC Overdrive) VINC 0.5V/DIV 0V V+ = 5V LT6108-2 Comparator Step Response (100mV INC Overdrive) VINC 0.5V/DIV 0V LT6108-1 Comparator Reset Response V+ = 5V VOUTC 5V/DIV 0V VOUTC 1V/DIV VOUTC 1V/DIV 0V 0V VEN/RST 2V/DIV 0V 5µs/DIV 5µs/DIV 610812 G35 5µs/DIV 610812 G36 610812 G37 PIN FUNCTIONS SENSELO (Pin 1): Sense Amplifier Input. This pin must be tied to the load end of the sense resistor. EN/RST (Pin 2, LT6108-1 Only): Enable and Latch Reset Input. When the EN/RST pin is pulled high the LT6108-1 is enabled. When the EN/RST pin is pulled low for longer than typically 40µs, the LT6108-1 will enter the shutdown mode. Pulsing this pin low for between 2µs and 15µs will reset the comparator of the LT6108-1. EN (Pin 2, LT6108-2 Only): Enable Input. When the enable pin is pulled high the LT6108-2 is enabled. When the enable pin is pulled low for longer than typically 40µs, the LT6108-2 will enter the shutdown mode OUTC (Pin 3): Open-Drain Comparator Output. Off-state voltage may be as high as 60V above V–, regardless of V+ used. V– (Pin 4): Negative Supply Pin. This pin is normally connected to ground. INC (Pin 5): This is the inverting input of the comparator. The other comparator input is internally connected to the 400mV reference. OUTA (Pin 6): Current Output of the Sense Amplifier. This pin will source a current that is equal to the sense voltage divided by the external gain setting resistor, RIN. V+ (Pin 7): Positive Supply Pin. The V+ pin can be connected directly to either side of the sense resistor, RSENSE. When V+ is tied to the load end of the sense resistor, the SENSEHI pin can go up to 0.2V above V+. Supply current is drawn through this pin. SENSEHI (Pin 8): Sense Amplifier Input. The internal sense amplifier will drive SENSEHI to the same potential as SENSELO. A resistor (typically RIN) tied from supply to SENSEHI sets the output current, IOUT = VSENSE/RIN, where VSENSE is the voltage developed across RSENSE. Exposed Pad (Pin 9, DCB Package Only): V–. The exposed pad may be left open or connected to device V–. Connecting the exposed pad to a V– plane will improve thermal management in high voltage applications. The exposed pad should not be used as the primary connection for V–. 610812fa 10 LT6108-1/LT6108-2 BLOCK DIAGRAMS 7 V+ LT6108-1 100Ω 8 1 SENSEHI 3k SENSELO 3k 34V – + OUTA V– 6 V– V+ V– 6V 200nA 2 EN/RST ENABLE AND RESET TIMING RESET V+ INC – 3 OVERCURRENT FLAG OUTC + V– 5 400mV REFERENCE V– 4 610812 F01 Figure 1. LT6108-1 Block Diagram (Latching Comparator) 7 V+ LT6108-2 100Ω 8 1 SENSEHI 3k SENSELO 3k 34V – + OUTA V– V– 6V 6 V– V+ 100nA OVERCURRENT FLAG OUTC + 3 V+ V– 4 INC – 2 EN 5 400mV REFERENCE V– 610812 F02 Figure 2. LT6108-2 Block Diagram (Non-Latching Comparator) 610812fa 11 LT6108-1/LT6108-2 APPLICATIONS INFORMATION The LT6108 high side current sense amplifier provides accurate monitoring of currents through an external sense resistor. The input sense voltage is level-shifted from the sensed power supply to a ground referenced output and is amplified by a user-selected gain to the output. The output voltage is directly proportional to the current flowing through the sense resistor. The LT6108 comparator has a threshold set with a built-in 400mV precision reference and has 10mV of hysteresis. The open-drain output can be easily used to level shift to digital supplies. Amplifier Theory of Operation An internal sense amplifier loop forces SENSEHI to have the same potential as SENSELO as shown in Figure 3. Connecting an external resistor, RIN, between SENSEHI and VSUPPLY forces a potential, VSENSE, across RIN. A corresponding current, IOUTA, equal to VSENSE/RIN, will flow through RIN. The high impedance inputs of the sense amplifier do not load this current, so it will flow through an internal MOSFET to the output pin, OUTA. The output current can be transformed back into a voltage by adding a resistor from OUTA to V–(typically ground). The output voltage is then: VOUT = V– + IOUTA • ROUT where ROUT = R1 + R2 as shown in Figure 3. Table 1. Example Gain Configurations GAIN RIN ROUT VSENSE FOR VOUT = 5V IOUTA AT VOUT = 5V 20 499Ω 10k 250mV 500µA 50 200Ω 10k 100mV 500µA 100 100Ω 10k 50mV 500µA Useful Equations Input Voltage: VSENSE = ISENSE •RSENSE Voltage Gain: VOUT R = OUT VSENSE RIN Current Gain: IOUTA RSENSE = ISENSE RIN Note that VSENSE(MAX) can be exceeded without damaging the amplifier, however, output accuracy will degrade as VSENSE exceeds VSENSE(MAX), resulting in increased output current, IOUTA. Selection of External Current Sense Resistor The external sense resistor, RSENSE, has a significant effect on the function of a current sensing system and must be chosen with care. First, the power dissipation in the resistor should be considered. The measured load current will cause power dissipation as well as a voltage drop in RSENSE. As a result, the sense resistor should be as small as possible while still providing the input dynamic range required by the measurement. Note that the input dynamic range is the difference between the maximum input signal and the minimum accurately reproduced signal, and is limited primarily by input DC offset of the internal sense amplifier of the LT6108. To ensure the specified performance, RSENSE should be small enough that VSENSE does not exceed VSENSE(MAX) under peak load conditions. As an example, an application may require the maximum sense voltage be 100mV. If this application is expected to draw 2A at peak load, RSENSE should be set to 50mΩ. Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or dynamic range required. The minimum signal that can be accurately represented by this sense amplifier is limited by the input offset. As an example, the LT6108 has a maximum input offset of 125µV. If the minimum current is 20mA, a sense resistor of 6.25mΩ will set VSENSE to 125µV. This is the same value as the input offset. A larger sense resistor will reduce the error due to offset by increasing the sense voltage for a given load current. Choosing a 50mΩ RSENSE will maximize the dynamic range and provide a system that has 100mV across the sense resistor at peak load (2A), while input offset causes an error equivalent to only 2.5mA of load current. In the previous example, the peak dissipation in RSENSE is 200mW. If a 5mΩ sense resistor is employed, then the effective current error is 25mA, while the peak sense voltage is reduced to 10mV at 2A, dissipating only 20mW. 610812fa 12 LT6108-1/LT6108-2 APPLICATIONS INFORMATION The low offset and corresponding large dynamic range of the LT6108 make it more flexible than other solutions in this respect. The 125µV maximum offset gives 72dB of dynamic range for a sense voltage that is limited to 500mV max. Selection of External Input Gain Resistor, RIN RIN should be chosen to allow the required speed and resolution while limiting the output current to 1mA. The maximum value for RIN is 1k to maintain good loop stability. For a given VSENSE, larger values of RIN will lower power dissipation in the LT6108 due to the reduction in IOUT while smaller values of RIN will result in faster response time due to the increase in IOUT . If low sense currents must be resolved accurately in a system that has a very wide dynamic range, a smaller RIN may be used if the maximum IOUTA current is limited in another way, such as with a Schottky diode across RSENSE (Figure 4). This will reduce the high current measurement accuracy by limiting the result, while increasing the low current measurement resolution. Sense Resistor Connection Kelvin connection of the SENSEHI and SENSELO inputs to the sense resistor should be used in all but the lowest power applications. Solder connections and PC board interconnections that carry high currents can cause significant error in measurement due to their relatively large resistances. One 10mm × 10mm square trace of 1oz copper is approximately 0.5mΩ. A 1mV error can be caused by as little as 2A flowing through this small interconnect. This will cause a 1% error for a full-scale VSENSE of 100mV. A 10A load current in the same interconnect will cause a 5% error for the same 100mV signal. By isolating the sense traces from the high current paths, this error can be reduced by orders of magnitude. A sense resistor with integrated Kelvin sense terminals will give the best results. Figure 3 illustrates the recommended method for connecting the SENSEHI and SENSELO pins to the sense resistor. V+ RSENSE DSENSE 610812 F04 LOAD Figure 4. Shunt Diode Limits Maximum Input Voltage to Allow Better Low Input Resolution Without Overranging VSUPPLY + VSENSE RIN – + LOAD V ISENSE = SENSE RSENSE SENSEHI 8 – V– V+ V+ 7 C1 2 EN/RST VRESET OUTA 6 VPULLUP RC V+ 3 OUTC CLC IOUTA + OVERCURRENT FLAG LT6108-1 1 SENSELO INC 5 – RSENSE *ROUT = R1 + R2 R2* CL R1* 400mV REFERENCE V– VOUT 610812 F03 4 Figure 3. LT6108-1 Typical Connection 610812fa 13 LT6108-1/LT6108-2 APPLICATIONS INFORMATION This approach can be helpful in cases where occasional bursts of high currents can be ignored. Care should be taken when designing the board layout for RIN, especially for small RIN values. All trace and interconnect resistances will increase the effective RIN value, causing a gain error. The power dissipated in the sense resistor can create a thermal gradient across a printed circuit board and consequently a gain error if RIN and ROUT are placed such that they operate at different temperatures. If significant power is being dissipated in the sense resistor then care should be taken to place RIN and ROUT such that the gain error due to the thermal gradient is minimized. Selection of External Output Gain Resistor, ROUT Amplifier Error Sources The current sense system uses an amplifier and resistors to apply gain and level-shift the result. Consequently, the output is dependent on the characteristics of the amplifier, such as gain error and input offset, as well as the matching of the external resistors. Ideally, the circuit output is: VOUT = VSENSE • ROUT ; VSENSE = RSENSE •ISENSE RIN In this case, the only error is due to external resistor mismatch, which provides an error in gain only. However, offset voltage, input bias current and finite gain in the amplifier can cause additional errors: The output resistor, ROUT , determines how the output current is converted to voltage. VOUT is simply IOUTA • ROUT . Typically, ROUT is a combination of resistors configured as a resistor divider which has a voltage tap going to the comparator input to set the comparator threshold. Output Voltage Error, ∆VOUT(VOS), Due to the Amplifier DC Offset Voltage, VOS In choosing an output resistor, the maximum output voltage must first be considered. If the subsequent circuit is a buffer or ADC with limited input range, then ROUT must be chosen so that IOUTA(MAX) • ROUT is less than the allowed maximum input range of this circuit. The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. As VSENSE is increased, accuracy improves. This is the dominant error of the system and it limits the available dynamic range. In addition, the output impedance is determined by ROUT . If another circuit is being driven, then the input impedance of that circuit must be considered. If the subsequent circuit has high enough input impedance, then almost any useful output impedance will be acceptable. However, if the subsequent circuit has relatively low input impedance, or draws spikes of current such as an ADC load, then a lower output impedance may be required to preserve the accuracy of the output. More information can be found in the Output Filtering section. As an example, if the input impedance of the driven circuit, RIN(DRIVEN), is 100 times ROUT, then the accuracy of VOUT will be reduced by 1% since: VOUT = IOUTA • ∆VOUT(VOS) = VOS • ROUT RIN Output Voltage Error, ∆VOUT(IBIAS), Due to the Bias Currents IB+ and IB– The amplifier bias current IB+ flows into the SENSELO pin while IB– flows into the SENSEHI pin. The error due to IB is the following: R ∆VOUT(IBIAS) = ROUT IB+ • SENSE –IB– RIN Since IB+ ≈ IB– = IBIAS, if RSENSE << RIN then, ∆VOUT(IBIAS) = –ROUT (IBIAS) It is useful to refer the error to the input: ROUT •RIN(DRIVEN) ∆VVIN(IBIAS) = –RIN (IBIAS) ROUT +RIN(DRIVEN) For instance, if IBIAS is 100nA and RIN is 1k, the input referred error is 100µV. This error becomes less significant as the value of RIN decreases. The bias current error can = IOUTA •ROUT • 100 = 0.99 •IOUTA •ROUT 101 610812fa 14 LT6108-1/LT6108-2 APPLICATIONS INFORMATION be reduced if an external resistor, RIN+, is connected as shown in Figure 5, the error is then reduced to: VOUT(IBIAS) = ±ROUT • IOS; IOS = IB+ – IB– Minimizing low current errors will maximize the dynamic range of the circuit. V+ V+ LT6108 RIN RSENSE 8 SENSEHI – 1 SENSELO + RIN+ PS = IS • V+ VOUT ROUT – 4 610812 F05 Figure 5. RIN+ Reduces Error Due to IB Output Voltage Error, ∆VOUT(GAIN ERROR), Due to External Resistors The LT6108 exhibits a very low gain error. As a result, the gain error is only significant when low tolerance resistors are used to set the gain. Note the gain error is systematically negative. For instance, if 0.1% resistors are used for RIN and ROUT then the resulting worst-case gain error is –0.4% with RIN = 100Ω. Figure 6 is a graph of the maximum gain error which can be expected versus the external resistor tolerance. RESULTING GAIN ERROR (%) 10 1 RIN = 100Ω 0.1 0.01 0.01 POUT = (VSENSEHI – VOUTA) • IOUTA There is also power dissipated due to the quiescent power supply current: OUTA 6 V ISENSE The LT6108 can deliver a continuous current of 1mA to the OUTA pin. This current flows through RIN and enters the current sense amplifier via the SENSEHI pin. The power dissipated in the LT6108 due to the output signal is: Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA 7 VBATT Output Current Limitations Due to Power Dissipation The comparator output current flows into the comparator output pin and out of the V– pin. The power dissipated in the LT6108 due to the comparator is often insignificant and can be calculated as follows: POUTC = (VOUTC – V–) • IOUTC The total power dissipated is the sum of these dissipations: PTOTAL = POUTA + POUTC + PS At maximum supply and maximum output currents, the total power dissipation can exceed 150mW. This will cause significant heating of the LT6108 die. In order to prevent damage to the LT6108, the maximum expected dissipation in each application should be calculated. This number can be multiplied by the θJA value, 163°C/W for the MS8 package or 64°C/W for the DFN, to find the maximum expected die temperature. Proper heat sinking and thermal relief should be used to ensure that the die temperature does not exceed the maximum rating. Output Filtering RIN = 1k 0.1 1 RESISTOR TOLERANCE (%) 10 610812 F06 Figure 6. Gain Error vs Resistor Tolerance The AC output voltage, VOUT, is simply IOUTA • ZOUT. This makes filtering straightforward. Any circuit may be used which generates the required ZOUT to get the desired filter response. For example, a capacitor in parallel with ROUT will give a lowpass response. This will reduce noise at the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit 610812fa 15 LT6108-1/LT6108-2 APPLICATIONS INFORMATION such as a MUX or ADC. This output capacitor in parallel with ROUT will create an output pole at: 1 2 • π •ROUT • CL SENSELO, SENSEHI Range The difference between VBATT (see Figure 7) and V+, as well as the maximum value of VSENSE, must be considered to ensure that the SENSELO pin doesn’t exceed the range listed in the Electrical Characteristics table. The SENSELO and SENSEHI pins of the LT6108 can function from 0.2V above the positive supply to 33V below it. These operating voltages are limited by internal diode clamps shown in Figures 1 and 2. On supplies less than 35.5V, the lower range is limited by V– + 2.5V. This allows the monitored supply, VBATT , to be separate from the LT6108 positive supply as shown in Figure 7. Figure 8 shows the range of operating voltages for the SENSELO and SENSEHI inputs, for different supply voltage inputs (V+). The SENSELO and SENSEHI range has been designed to allow the LT6108 to monitor its own supply current (in addition to the load), as long as VSENSE is less than 200mV. This is shown in Figure 9. Minimum Output Voltage 7 RIN V+ RSENSE ISENSE 8 SENSEHI – 1 SENSELO + VALID SENSELO/ SENSEHI RANGE 30 27 20.2V 20 10 2.8 2.5 2.7 10 20 30 35.5 40 V+ (V) 50 60 610812 F08 Figure 8. Allowable SENSELO, SENSEHI Voltage Range 7 V+ LT6108 VBATT RIN RSENSE 8 SENSEHI – 1 SENSELO + OUTA 6 V– 4 VOUT ROUT 610812 F09 Figure 9. LT6108 Supply Current Monitored with Load 120 G = 100 100 80 VOS = –125µV 60 40 VOS = 125µV 20 OUTA 6 VOUT ROUT V– 4 0 0 100 200 300 400 500 600 700 800 900 1000 INPUT SENSE VOLTAGE (µV) 610812 F10 610812 F07 Figure 7. V+ Powered Separately from Load Supply (VBATT) 16 40.2V 40 OUTPUT VOLTAGE (mV) V+ LT6108 50 ISENSE The output of the LT6108 current sense amplifier can produce a non-zero output voltage when the sense voltage is zero. This is a result of the sense amplifier VOS being forced across RIN as discussed in the Output Voltage Error, ∆VOUT(VOS) section. Figure 10 shows the effect of the input offset voltage on the transfer function for parts at the VOS limits. With a negative offset voltage, zero input VBATT ALLOWABLE OPERATING VOLTAGE ON SENSELO AND SENSHI INPUTS (V) f –3dB = 60 Figure 10. Amplifier Output Voltage vs Input Sense Voltage 610812fa LT6108-1/LT6108-2 APPLICATIONS INFORMATION sense voltage produces an output voltage. With a positive offset voltage, the output voltage is zero until the input sense voltage exceeds the input offset voltage. Neglecting VOS, the output circuit is not limited by saturation of pull-down circuitry and can reach 0V. Response Time The LT6108 amplifier is designed to exhibit fast response to inputs for the purpose of circuit protection or current monitoring. This response time will be affected by the external components in two ways, delay and speed. If the output current is very low and an input transient occurs, there may be an increased delay before the output voltage begins to change. The Typical Performance Characteristics show that this delay is short and it can be improved by increasing the minimum output current, either by increasing RSENSE or decreasing RIN. Note that the Typical Performance Characteristics are labeled with respect to the initial sense voltage. The speed is also affected by the external components. Using a larger ROUT will decrease the response time, since VOUT = IOUTA • ZOUT where ZOUT is the parallel combination of ROUT and any parasitic and/or load capacitance. Note that reducing RIN or increasing ROUT will both have the effect of increasing the voltage gain of the circuit. If the output capacitance is limiting the speed of the system, RIN and ROUT can be decreased together in order to maintain the desired gain and provide more current to charge the output capacitance. The response time of the comparator is the sum of the propagation delay and the fall time. The propagation delay is a function of the overdrive voltage on the input of the comparator. A larger overdrive will result in a lower propagation delay. This helps achieve a fast system response time to fault events. The fall time is affected by the load on the output of the comparator as well as the pull-up voltage. The LT6108 amplifier has a typical response time of 500ns and the comparators have a typical response time of 500ns. When configured as a system, the amplifier output drives the comparator input causing a total system response time which is typically greater than that implied by the individually specified response times. This is due to the overdrive on the comparator input being determined by the speed of the amplifier output. Internal Reference and Comparator The integrated precision reference and comparator combined with the high precision current sense allow for rapid and easy detection of abnormal load currents. This is often critical in systems that require high levels of safety and reliability. The LT6108-1 comparator is optimized for fault detection and is designed with a latching output. The latching output prevents faults from clearing themselves and requires a separate system or user to reset the output. In applications where the comparator output can intervene and disconnect loads from the supply, a latched output is required to avoid oscillation. The latching output is also useful for detecting problems that are intermittent. The comparator output on the LT6108-2 is non-latching and can be used in applications where a latching output is not desired. The comparator has one input available externally. The other comparator input is connected internally to the 400mV precision reference. The input threshold (the voltage which causes the output to transition from high to low) is designed to be equal to that of the reference. The reference voltage is established with respect to the device V– connection. Comparator Input The comparator input can swing from V– to 60V regardless of the supply voltage used. The input current for inputs well above the threshold is just a few pAs. With decreasing input voltage, a small bias current begins to be drawn out of the input near the threshold, reaching 50nA max when at ground potential. Note that this change in input bias current can cause a small nonlinearity in the OUTA transfer function if the comparator input is coupled to the amplifier output with a voltage divider. For example, if the maximum comparator input current is 50nA, and the resistance seen looking out of the comparator input is 1k, then a change in output voltage of 50µV will be seen on the analog output when the comparator input voltage passes through its threshold. 610812fa 17 LT6108-1/LT6108-2 APPLICATIONS INFORMATION Setting Comparator Threshold The comparator has an internal 400mV precision reference. In order to set the trip point of the LT6108 comparator as configured in Figure 11, the input sense voltage at which the comparator will trip, VSENSE(TRIP) must be calculated: VSENSE(TRIP) = ISENSE(TRIP) • RSENSE The selection of RIN is discussed in the Selection of External Input Gain Resistor RIN section. Once RIN is selected, ROUT can be calculated: ROUT = RIN 400mV R1= RIN 400mV VSENSE(TRIP) The gain is now: AV = R1+R2 RIN This gain equation can be easily solved for R2: VSENSE(TRIP) R2 = AV • RIN – R1 Since the amplifier output is connected directly to the comparator input, the gain from VSENSE to VOUT is: AV = As shown in Figure 12, R2 can be used to increase the gain from VSENSE to VOUT without changing VSENSE(TRIP). As before, R1 can be easily calculated: 400mV If the configuration of Figure 11 gives too much gain, R2 can be used to reduce the gain without changing VSENSE(TRIP) as shown in Figure 13. AV can be easily calculated: VSENSE(TRIP) AV = R1 RIN VSUPPLY RSENSE + VSENSE RIN – + LOAD V ISENSE = SENSE RSENSE SENSEHI 8 – V– V+ V+ 7 C1 2 EN/RST VRESET OUTA 6 VPULLUP CLC 3 OUTC VOUT IOUTA + RC V+ CL INC 5 – OVERCURRENT FLAG LT6108-1 1 SENSELO ROUT 400mV REFERENCE V– 610812 F11 4 Figure 11. Basic Comparator Configuration 610812fa 18 LT6108-1/LT6108-2 APPLICATIONS INFORMATION VSUPPLY RSENSE + VSENSE RIN – LT6108-1 1 SENSELO + LOAD V ISENSE = SENSE RSENSE – V– V+ V+ C1 7 2 EN/RST VRESET OUTA 6 VPULLUP V+ 3 OUTC CLC VOUT IOUTA R2 INC 5 – RC OVERCURRENT FLAG SENSEHI 8 CL R1 400mV REFERENCE + V– 610812 F12 4 Figure 12: Comparator Configuration with Increased AV VSUPPLY VSENSE RIN – + LOAD V ISENSE = SENSE RSENSE VRESET RC SENSEHI 8 – V– V+ V+ 7 C1 2 EN/RST OUTA 6 V+ VPULLUP OVERCURRENT FLAG LT6108-1 1 SENSELO IOUTA 3 OUTC CL INC 5 R2 CLC + + – RSENSE 400mV REFERENCE V– VOUT R1 610812 F13 4 Figure 13: Comparator Configuration with Reduced AV 610812fa 19 LT6108-1/LT6108-2 APPLICATIONS INFORMATION This gain equation can be easily solved for R1: circuitry will have an effect on both the rising and falling input thresholds, VTH (the actual internal threshold remains unaffected). R1 = AV • RIN The value of R2 can be calculated: R2 = Figure 15 shows how to add additional hysteresis to the comparator. 400mV •RIN – VSENSE(TRIP) •R1 VSENSE(TRIP) R5 can be calculated from the amplifier output current which is required to cause the comparator output to trip, IOVER. Hysteresis The comparator has a typical built-in hysteresis of 10mV to simplify design, ensure stable operation in the presence of noise at the input, and to reject supply noise that might be induced by state change load transients. The hysteresis is designed such that the threshold voltage is altered when the output is transitioning from low to high as is shown in Figure 14. R3 should be chosen to allow sufficient VOL and comparator output rise time due to capacitive loading. R2 can be calculated: V – 390mV R2 = R1• DD VHYS(EXTRA) INCREASING VINC Note that the hysteresis being added, VHYS(EXTRA), is in addition to the typical 10mV of built-in hysteresis. For very large values of R2 PCB related leakage may become an issue. A tee network can be implemented to reduce the required resistor values. 610812 F14 VHYS 400mV , Assuming (R1+R2) >> R5 IOVER To ensure (R1 + R2) >> R5, R1 should be chosen such that R1 >> R5 so that VOUTA does not change significantly when the comparator trips. External positive feedback circuitry can be employed to increase the effective hysteresis if desired, but such OUTC R5 = VTH Figure 14. Comparator Output Transfer Characteristics V+ 7 V+ LT6108-1 RIN V+ 8 SENSEHI – 1 SENSELO + RSENSE ILOAD V– V+ V+ R4 INC 5 – R3 OUTA 6 3 OUTC R1 VTH R5 400mV REFERENCE + V– VDD 4 R2 610812 F15 Figure 15. Inverting Comparator with Added Hysteresis 20 610812fa LT6108-1/LT6108-2 APPLICATIONS INFORMATION The approximate total hysteresis is: EN/RST Pin (LT6108-1 Only) V – 390mV VHYS = 10mV +R1• DD R2 The EN/RST pin performs the two functions of resetting the latch on the comparator as well as shutting down the LT6108-1. When this pin is pulled high the LT6108-1 is enabled. After powering on the LT6108-1, the comparator must be reset in order to guarantee a valid state at its output. For example, to achieve IOVER = 900µA with 50mV of total hysteresis, R5 = 442Ω. Choosing R1 = 4.42k, R3 = 10k and VDD = 5V results in R2 = 513k. The analog output voltage will also be affected when the comparator trips due to the current injected into R5 by the positive feedback. Because of this, it is desirable to have (R1 + R2) >> R5. The maximum VOUTA error caused by this can be calculated as: R5 ∆VOUTA = VDD • R1+R2 +R5 In the previous example, this is an error of 4.3mV at the output of the amplifier or 43µV at the input of the amplifier assuming a gain of 100. When using the comparator with its input decoupled from the output of the amplifier it may be driven directly by a voltage source. It is useful to know the threshold voltage equations with additional hysteresis. The input rising edge threshold which causes the output to transition from high to low is: R1 VTH(R ) = 400mV • 1+ R2 The input falling edge threshold which causes the output to transition from low to high is: Applying a pulse to the EN/RST pin will reset the comparator from its tripped low state as long as the input on the comparator is below the threshold and hysteresis. For example, if VINC is pulled higher than 400mV and latches the comparator, a reset pulse will not reset that comparator unless its input is held below the threshold by a voltage greater than the 10mV typical hysteresis. The comparator output typically unlatches in 0.5µs with 2pF of capacitive load. Increased capacitive loading on the comparator output will cause an increased unlatch time. Figure 16 shows the reset functionality of the EN/RST pin. The width of the pulse applied to reset the comparator must be greater than tRPW(MIN) (2µs) but less than tRPW(MAX) (15µs). Applying a pulse that is longer than 40µs typically (or tying the pin low) will cause the part to enter shutdown. Once the part has entered shutdown, the supply current will be reduced to 3µA typically and the amplifier, comparator and reference will cease to function until the EN/RST pin is transitioned high. When the part is disabled, both the amplifier and comparator outputs are high impedance. RESET PULSE WIDTH LIMITS EN/RST tRPW(MIN) 2µs R1 R1 VTH(F ) = 390mV 1+ – VDD R2 R2 Comparator Output The comparator output can maintain a logic-low level of 150mV while sinking 500µA. The output can sink higher currents at elevated VOL levels as shown in the Typical Performance Characteristics. Load currents are conducted to the V– pin. The output off-state voltage may range between 0V and 60V with respect to V–, regardless of the supply voltage used. COMPARATOR RESET tRPW(MAX) 15µs 610812 F16 OUTC tRESET 0.5µs (TYPICAL) Figure 16. Comparator Reset Functionality When the EN/RST pin is transitioned from low to high to enable the part, the amplifier output PMOS can turn on momentarily causing typically 1mA of current to flow into the SENSEHI pin and out of the OUTA pin. Once the amplifier is fully on, the output will go to the correct 610812fa 21 LT6108-1/LT6108-2 APPLICATIONS INFORMATION Power Up current. Figure 17 shows this behavior and the impact it has on VOUTA. Circuitry connected to OUTA can be protected from these transients by using an external diode to clamp VOUTA, or a capacitor to filter VOUTA. After powering on the LT6108-1, the comparator must be reset in order to guarantee a valid state at its output. Fast supply ramps may cause a supply current transient during start-up as shown in the Typical Performance Characteristics. This current can be lowered by reducing the edge speed of the supply. V+ = 60V RIN = 100Ω ROUT = 10k VEN/RST 2V/DIV Reverse-Supply Protection 0V The LT6108 is not protected internally from external reversal of supply polarity. To prevent damage that may occur during this condition, a Schottky diode should be added in series with V– (Figure 18). This will limit the reverse current through the LT6108. Note that this diode will limit the low voltage operation of the LT6108 by effectively reducing the supply voltage to the part by VD. VOUTA 2V/DIV 0V 50µs/DIV 610812 F17 Figure 17. Amplifier Enable Response Also note that the comparator reference, comparator output and EN/RST input are referenced to the V– pin. In order to preserve the precision of the reference and to avoid driving the comparator inputs below V–, R2 must connect to the V– pin. This will shift the amplifier output voltage up by VD. VOUTA can be accurately measured EN Pin (LT6108-2) When this pin is pulled high, the LT6108-2 is enabled. When the enable pin is pulled low for longer than 40µs typically, the LT6108-2 will enter the shutdown mode. V+ 7 V+ LT6108-1 RIN V+ 8 SENSEHI – 1 SENSELO + RSENSE VDD ILOAD R3 OUTA 6 V– + V+ R1 3 OUTC – VDD INC 5 VOUTA R2 + VDD 2 EN/RST 400mV REFERENCE – V– 4 + 610812 F18 VD – Figure 18. Schottky Prevents Damage During Supply Reversal 610812fa 22 LT6108-1/LT6108-2 APPLICATIONS INFORMATION differentially across R1 and R2. The comparator output low voltage will also be shifted up by VD. The EN/RST pin threshold is referenced to the V– pin. In order to provide valid input levels to the LT6108 and avoid driving EN/RST below V– the negative supply of the driving circuit should be tied to V– of the LT6108. TYPICAL APPLICATIONS Overcurrent Battery Fault Protection 12 LITHIUM 40V CELL STACK IRF9640 0.1Ω + 10µF 100k R10 100Ω + 8 + 7 SENSEHI SENSELO V+ 5V + 10k OUTA LT6108-1 2 RESET 3 EN/RST INC 6.2V* 1 6 0.8A OVERCURRENT 5 DETECTION VOUT 9.53k 100k 475Ω V– OUTC TO LOAD 2N7000 4 610812 TA02 *CMH25234B MCU Interfacing with Hardware Interrupts 0.1Ω V+ TO LOAD 5V 100Ω 8 7 AtMega1280 5 PB0 6 PB1 7 PCINT2 2 PCINT3 3 ADC2 1 PB5 3 5V VOUT/ADC IN 10k OUTC GOES LOW 0V SENSEHI SENSELO V+ OUTA 1 6 VOUT ADC IN LT6108-1 RESET 2 Example: 8.66k EN/RST OUTC MCU INTERUPT V– INC OVERCURRENT ROUTINE 5 4 The comparator is set to have a 300mA overcurrent threshold. The MCU will receive the comparator output as 1.33k 6108 TA03 RESET COMPARATOR 610812 TA03b a hardware interrupt and immediately run an appropriate fault routine. 610812fa 23 LT6108-1/LT6108-2 TYPICAL APPLICATIONS Simplified DC Motor Torque Control VMOTOR 100µF 1k 8 7 SENSEHI SENSELO V+ OUTA 6 LT6108-1 RESET 2 3 EN/RST INC 0.1Ω 1 5 CURRENT SET POINT (0V TO 5V) VOUT 0.47µF 100k 9k 5V 2 1k OUTC BRUSHED DC MOTOR (0A TO 5A) MABUCHI RS-540SH 1µF 3 V– – + 4 7 4 6 1 LTC6246 78.7k 5 V+ 6 MOD OUT LTC6992-1 3 1N5818 4 SET DIV GND 2 IRF640 100k 1M 280k 5V 610812 TA04 The figure above shows a simplified DC motor control circuit. The circuit controls motor current, which is proportional to motor torque; the LT6108 is used to provide current feedback to an integrator that servos the motor current to the current set point. The LTC®6992 is used to convert the output of the difference amp to the motors PWM control signal. Power-On Reset or Disconnect Using TimerBlox® Circuit 5V 7 V+ LT6108-1 RIN 100Ω 8 R7 10k RSENSE 1 SENSEHI – SENSELO + ILOAD Q1 2N2222 OPTIONAL: DISCHARGES C1 WHEN SUPPLY IS DISCONNECTED OUTA 6 V– R1 9.53k V+ 5V R6 30k V+ CREATES A DELAYED C1 10µs RESET PULSE 0.1µF ON START-UP R4 1M TRIG OUT LTC6993-3 GND V+ SET DIV 3 2 INC 5 – OUTC + 400mV REFERENCE R2 499Ω EN/RST V– 4 610812 TA06 R5 487k The LTC6993-3 provides a 10µs reset pulse to the LT6108‑1. The reset pulse is delayed by R4 and C1 whose time constant must be greater than 10ms and longer than the supply turn-on time. Optional components R6 and Q1 discharge capacitor C1 when the supply and/or ground are disconnected. This ensures that when the power supply and/or 24 ground are restored, capacitor C1 can fully recharge and trigger the LTC6993-3 to produce another comparator reset pulse. These optional components are particularly useful if the power and/or ground connections are intermittent, as can occur when PCB are plugged into a connector. 610812fa LT6108-1/LT6108-2 TYPICAL APPLICATIONS LT6108-2 with External Latch and Power-On Reset or Disconnect 5V 7 V+ LT6108-2 RIN 100Ω 8 R3 10k RSENSE 1 SENSEHI – SENSELO + V+ OUTA 6 ILOAD V– V+ 3 INC 5 – OUTC + R1 24.9k VTH R7 9.53k R8 499Ω 400mV REFERENCE V– R9* 30k Q1* 2N2222 C1 0.1µF VDD R4* 3.4k R5* 100k R2 200k 4 610812 TA06 R6 1M An external latch is implemented with positive feedback. R6 and C1 provide a reset pulse on power-up. The time constant formed by R6 and C1 should be set slower than that of the supply. Optional components R9 and Q1 discharge capacitor C1 when the supply and/or ground are disconnected. This ensures that when the power supply and/or ground are restored, capacitor C1 can fully recharge. While C1 is charging, the NOR gate output is low, ensuring that the comparator powers up in the correct state. These optional components are particularly useful if the power and/or ground connections are intermittent, as can occur when PCB are plugged into a connector. R4 and R5 are optional and minimize the movement of the rising input threshold voltage. *OPTIONAL COMPONENT The input rising edge threshold which causes the output to transition from high to low is: 400mV VTH(R ) = 400mV if R4 = R5 • VDD – 400mV The input falling edge which causes the output to transition from low to high is: 1 VDD • R1 1 VTH(F ) = 390mV • R1 • + – R1 R2+R4||R5 R2+R4||R5 610812fa 25 LT6108-1/LT6108-2 TYPICAL APPLICATIONS Precision Power-On Reset Using TimerBlox Circuit 5V 7 V+ LT6108-1 RIN 100Ω 8 R3 10k RSENSE 1 SENSEHI – SENSELO + ILOAD V+ OUTA 6 V– R1 9.53k V+ R8 100k C1 0.1µF 3 1 SECOND DELAY ON START-UP 10µs RESET PULSE GENERATOR TRIG OUT LTC6994-1 V+ GND TRIG OUT LTC6993-1 GND V+ SET R7 191k DIV R6 1M R5 681k SET DIV 2 C2 0.1µF INC 5 – OUTC + 400mV REFERENCE R2 499Ω EN/RST V– 4 610812 TA08 R4 487k 610812fa 26 LT6108-1/LT6108-2 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ±0.127 (.035 ±.005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.0165 ±.0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8) 0307 REV F NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 610812fa 27 LT6108-1/LT6108-2 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DCB Package 8-Lead Plastic DFN (2mm × 3mm) (Reference LTC DWG # 05-08-1718 Rev A) 0.70 ±0.05 1.35 ±0.05 3.50 ±0.05 1.65 ±0.05 2.10 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.45 BSC 1.35 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 TYP R = 0.05 5 TYP 2.00 ±0.10 (2 SIDES) 0.40 ±0.10 8 1.35 ±0.10 1.65 ±0.10 3.00 ±0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER PIN 1 BAR TOP MARK (SEE NOTE 6) (DCB8) DFN 0106 REV A 4 0.200 REF 1 0.23 ±0.05 0.45 BSC 0.75 ±0.05 1.35 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 610812fa 28 LT6108-1/LT6108-2 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 12/12 Addition of A-grade Performance and Electrical Characteristics Addition of A-grade Order Information Clarification to Absolute Maximum Short Circuit Duration Clarification to nomenclature used in Typical Performance Characteristics 1, 3, 4, 5, 12, 13, 16 (Fig10), 28 2 2 6, 7, 9 Clarification to Description of EN/RST Pin Function 10 Internal Reference Block redrawn for consistency 11, 13, 18, 19 Additional information provided to Reverse Supply Protection 22 Correction to Overcurrent Battery Fault Protection diagram 23 610812fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 29 LT6108-1/LT6108-2 TYPICAL APPLICATION ADC Driving Application IN SENSE HIGH SENSE LOW 0.1Ω OUT 0.1µF VCC VREF 100Ω 8 SENSEHI SENSELO 7 VCC 10k V+ RESET 2 OUTA LT6108-1 6 OUTC IN+ 8.66k EN/RST 3 COMP 1 V– INC LTC2470 TO MCU 0.1µF 5 4 1.33k OVERCURRENT 6108 TA05 The low sampling current of the LTC2470 16-bit delta sigma ADC is ideal for the LT6108. RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1787 Bidirectional High Side Current Sense Amplifier 2.7V to 60V, 75µV Offset, 60µA Quiescent, 8V/V Gain LTC4150 Coulomb Counter/Battery Gas Gauge Indicates Charge Quantity and Polarity LT6100 Gain-Selectable High Side Current Sense Amplifier 4.1V to 48V, Gain Settings: 10, 12.5, 20, 25, 40, 50V/V LTC6101 High Voltage High Side Current Sense Amplifier Up to 100V, Resistor Set Gain, 300µV Offset, SOT-23 LTC6102 Zero Drift High Side Current Sense Amplifier Up to 100V, Resistor Set Gain, 10µV Offset, MSOP8/DFN LTC6103 Dual High Side Current Sense Amplifier 4V to 60V, Resistor Set Gain, 2 Independent Amps, MSOP8 LTC6104 Bidirectional High Side Current Sense Amplifier 4V to 60V, Separate Gain Control for Each Direction, MSOP8 LT6105 Precision Rail-to-Rail Input Current Sense Amplifer –0.3V to 44V Input Range, 300µV Offset, 1% Gain Error LT6106 Low Cost High Side Current Sense Amplifier 2.7V to 36V, 250µV Offset, Resistor Set Gain, SOT-23 LT6107 High Temperature High Side Current Sense Amplifier 2.7V to 36V, –55°C to 150°C, Fully Tested: –55°C, 25°C, 150°C LT6109 High Side Current Sense Amplifier with Reference and Comparators 2.7V to 60V, 125µV, Resistor Set Gain, ±1.25% Threshold Error LT6700 Dual Comparator with 400mV Reference 1.4V to 18V, 6.5µA Supply Current 610812fa 30 Linear Technology Corporation LT 1212 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2011