INFINEON IPF04N03LA

OptiMOS®2 Power-Transistor
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Product Summary
Features
• Ideal for high-frequency dc/dc converters
• Qualified according to JEDEC1) for target applications
V DS
25
V
R DS(on),max (SMD version)
3.8
mΩ
ID
50
A
• N-channel, logic level
• Excellent gate charge x R DS(on) product (FOM)
• Superior thermal resistance
• 175 °C operating temperature
Type
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Package
P-TO252-3-11
P-TO252-3-23
P-TO251-3-11
P-TO251-3-21
Ordering Code
Q67042-S4177
Q67042-S4197
Q67042-S4243
Q67042-S4198
Marking
04N03LA
04N03LA
04N03LA
04N03LA
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C2)
50
T C=100 °C
50
Pulsed drain current
I D,pulse
T C=25 °C3)
350
Avalanche energy, single pulse
E AS
I D=40 A, R GS=25 Ω
890
Reverse diode dv /dt
dv /dt
I D=50 A, V DS=20 V,
di /dt =200 A/µs,
T j,max=175 °C
6
Gate source voltage4)
V GS
Power dissipation
P tot
Operating and storage temperature
T j, T stg
T C=25 °C
IEC climatic category; DIN IEC 68-1
Rev. 1.8
Unit
A
mJ
kV/µs
±20
V
115
W
-55 ... 175
°C
55/175/56
page 1
2004-05-19
Parameter
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
1.3
minimal footprint
-
-
75
6 cm2 cooling area5)
-
-
50
25
-
-
Thermal characteristics
Thermal resistance, junction - case
R thJC
SMD version, device on PCB
R thJA
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
Gate threshold voltage
V GS(th)
V DS=V GS, I D=80 µA
1.2
1.6
2
Zero gate voltage drain current
I DSS
V DS=25 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=25 V, V GS=0 V,
T j=125 °C
-
10
100
V
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
10
100
nA
Drain-source on-state resistance
R DS(on)
V GS=4.5 V, I D=50 A
-
4.8
5.9
mΩ
V GS=4.5 V, I D=50 A,
SMD version
-
4.6
5.7
V GS=10 V, I D=50 A
-
3.4
4.0
V GS=10 V, I D=50 A,
SMD version
-
3.2
3.8
-
1.3
-
Ω
48
96
-
S
Gate resistance
RG
Transconductance
g fs
|V DS|>2|I D|R DS(on)max,
I D=50 A
1)
J-STD20 and JESD22
2)
Current is limited by bondwire; with an R thJC=1.3 K/W the chip is able to carry 136 A.
3)
See figure 3
4)
T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V
5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.8
page 2
2004-05-19
Parameter
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Values
Symbol Conditions
Unit
min.
typ.
max.
-
3909
5199
-
1488
1979
Dynamic characteristics
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
174
261
Turn-on delay time
t d(on)
-
14
21
Rise time
tr
-
11
16
Turn-off delay time
t d(off)
-
44
66
Fall time
tf
-
6.6
10
Gate to source charge
Q gs
-
12
16
Gate charge at threshold
Q g(th)
-
6.3
8.3
Gate to drain charge
Q gd
-
8.1
12
Switching charge
Q sw
-
14
19
Gate charge total
Qg
-
31
41
Gate plateau voltage
V plateau
-
3.0
-
Gate charge total, sync. FET
Q g(sync)
V DS=0.1 V,
V GS=0 to 5 V
-
28
37
Output charge
Q oss
V DD=15 V, V GS=0 V
-
32
43
-
-
50
-
-
350
V GS=0 V, V DS=15 V,
f =1 MHz
V DD=15 V, V GS=10 V,
I D=25 A, R G=2.7 Ω
pF
ns
Gate Charge Characteristics 6)
V DD=15 V, I D=25 A,
V GS=0 to 5 V
nC
V
nC
Reverse Diode
Diode continous forward current
IS
Diode pulse current
I S,pulse
Diode forward voltage
V SD
V GS=0 V, I F=50 A,
T j=25 °C
-
0.89
1.2
V
Reverse recovery charge
Q rr
V R=15 V, I F=I S,
di F/dt =400 A/µs
-
-
15
nC
6)
Rev. 1.8
T C=25 °C
A
See figure 16 for gate charge parameter definition
page 3
2004-05-19
1 Power dissipation
2 Drain current
P tot=f(T C)
I D=f(T C); V GS≥10 V
140
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
60
120
50
100
40
I D [A]
P tot [W]
80
30
60
20
40
10
20
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25 °C; D =0
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
1000
10
1 µs
limited by on-state
resistance
10 µs
1
0.5
100 µs
100
DC
Z thJC [K/W]
I D [A]
0.2
1 ms
0.1
0.1
0.05
0.02
10
0.01
single pulse
10 ms
0.01
1
0.1
1
10
100
V DS [V]
Rev. 1.8
0.001
0
0
0
0
0
0
1
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
page 4
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
5 Typ. output characteristics
6 Typ. drain-source on resistance
I D=f(V DS); T j=25 °C
R DS(on)=f(I D); T j=25 °C
parameter: V GS
parameter: V GS
16
120
2.8 V
10 V
4.5 V
3.4 V
3.2 V
3.6 V
3.8 V
14
3.8 V
100
3V
12
3.6 V
60
R DS(on) [mΩ]
I D [A]
80
3.4 V
40
10
8
6
3.2 V
4.5 V
4
10 V
3V
20
2
2.8 V
0
0
0
1
2
0
3
20
40
V DS [V]
60
80
100
I D [A]
7 Typ. transfer characteristics
8 Typ. forward transconductance
I D=f(V GS); |V DS|>2|I D|R DS(on)max
g fs=f(I D); T j=25 °C
parameter: T j
100
120
100
80
80
I D [A]
g fs [S]
60
60
40
40
20
175 °C
20
25 °C
0
0
0
1
2
3
4
5
Rev. 1.8
0
10
20
30
40
50
60
I D [A]
V GS [V]
page 5
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R DS(on)=f(T j); I D=50 A; V GS=10 V
V GS(th)=f(T j); V GS=V DS
parameter: I D
8
2.5
7
2
6
1.5
V GS(th) [V]
R DS(on) [mΩ]
800 µA
5
98 %
4
typ
80 µA
1
3
2
0.5
1
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T j [°C]
T j [°C]
11 Typ. capacitances
12 Forward characteristics of reverse diode
C =f(V DS); V GS=0 V; f =1 MHz
I F=f(V SD)
parameter: T j
10000
1000
25 °C, 98%
Ciss
100
25 °C
1000
175 °C, 98%
175 °C
I F [A]
C [pF]
Coss
10
Crss
100
1
0
5
10
15
20
25
30
V DS [V]
Rev. 1.8
0.0
0.5
1.0
1.5
2.0
V SD [V]
page 6
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
13 Avalanche characteristics
14 Typ. gate charge
I AS=f(t AV); R GS=25 Ω
V GS=f(Q gate); I D=25 A pulsed
parameter: Tj(start)
parameter: V DD
100
12
25 °C
15 V
10
100 °C
5V
20 V
150 °C
V GS [V]
I AV [A]
8
10
6
4
2
1
0
1
10
100
1000
0
20
40
60
80
Q gate [nC]
t AV [µs]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V BR(DSS)=f(T j); I D=1 mA
29
V GS
28
Qg
27
V BR(DSS) [V]
26
25
24
V g s(th)
23
22
Q g(th)
21
Q sw
Q gs
20
-60
-20
20
60
100
140
Q g ate
Q gd
180
T j [°C]
Rev. 1.8
page 7
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Package Outline
P-TO252-3-11: Outline
Footprint:
Packaging:
Dimensions in mm
Rev. 1.8
page 8
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Package Outline
P-TO252-3-23: Outline
Footprint:
Dimensions in mm
Rev. 1.8
page 9
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Package Outline
P-TO251-3-11: Outline
P-TO251-3-21: Outline
Dimensions in inch [mm]
Rev. 1.8
page 10
2004-05-19
IPD04N03LA
IPF04N03LA
IPS04N03LA
IPU04N03LA
Published by
Infineon Technologies AG
Bereich Kommunikation
St.-Martin-Straße 53
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices, please contact your
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(see address list).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies office.
Infineon Technologies' components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.8
page 11
2004-05-19