CT1990/1991 MIL-STD-1553B RT, BC, Passive Monitor (6/04)

CT1990/1 Series
MIL-STD-1553B Remote Terminal, BUS Controller,
or Passive Monitor Hybrid with Status Word Control
www.aeroflex.com/Avionics
June 13, 2005
FEATURES
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Performs the Complete Dual-Redundant Remote Terminal, Bus Controller Protocol and Passive Monitor Functions of MIL-STD-1553B
Automated Self-Test Functions
Allows Setting of the Message Error Bit on Illegal Commands
Provides Programmable Control over Terminal Flag and Subsystem Flag Status Bits
50mW Typical Power Consumption
+5V DC Operation
Full Military (-55°C to +125°C) Temperature Range
Advanced Low Power VLSI Technology
Compatible with all Aeroflex-Plainview Driver/Receiver Units
Designed for Commercial, Industrial and Aerospace Applications
MIL-PRF-38534 compliant devices available
Aeroflex-Plainview is a Class H & K MIL-PRF-38534 Manufacturer
Packaging – Hermetic Ceramic Plug-In - 90 Pin, 2.4"L x 1.6"W x .225"Ht
DESC SMD# 5962–94775: Released CT1990, Pending CT1991
Encoder
ASIC
Decoder
"O"
T/R
Hybrid
BUS "0"
ASIC
T/R
Hybrid
BUS "1"
Sub Address
&
Word Count
Outputs
Interface
Unit
Status
Word
Control
Program
Inputs
Discrete
Outputs
Driver
Select
&
Enable
Decoder
"1"
Control
Inputs
Internal
Highway
Control
Terminal
Address
Inputs
CT1990/1
Figure 1 – BLOCK DIAGRAM (WITH TRANSFORMERS)
DESCRIPTION
The Aeroflex-Plainview CT1990/1 Series is a monolithic implementation of the MIL-STD-1553B Bus Controller,
Remote Terminal and Passive Monitor functions. All protocol functions of MIL-STD-1553B are incorporated and
a number of options are included to improve flexibility. These features include programming of the status word,
illegalizing specific commands and an independent loop back self-test which is initiated by the subsystem. This
unit is directly compatible with all microprocessor interfaces such as the CT1611 and CT1800 produced by
Aeroflex.
SCDCT1990 Rev C
ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max
Units
VCC
-0.3
7.0
V
Input or Output Voltage at any Pin
-0.3
VCC + 0.3V
V
Storage Case Temperature
-65
+150
°C
-
+300
°C
Load Temperature (Soldering 10 Sec)
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Test Conditions
VCC (Logic)
Min
Typ
Max
Unit
Notes
4.5
5.0
5.5
V
-
VIH
VCC = 5.0V
2.2
-
-
V
1,2
VIL
VCC = 5.0V
-
-
0.7
V
1,2
ELECTRICAL CHARACTERISTICS
(TA = -55°C to +125°C)
Parameter
Test Conditions
Min
Typ
Max
Unit
Notes
VOH High Level Output Voltage
VCC = 4.5V
2.4
-
-
V
4
VOL Low Level Output Voltage
VCC = 4.5V
-
-
0.4
V
4
IIH High Level Input Current
VCC = 5.5V,
VIN = 2.7V
-200
-25
-
-700
-400
µA
µA
2
3
IIL Low Level Input Current
VCC = 5.5V,
VIN = 0.4V
-400
-25
-
-900
-400
µA
µA
2
3
ICC Supply Current
VCC = 5.5V
-
-
20
mA
4
NOTES:
1/ RTAD 0/1/2/3/4 and RTADPAR ONLY.
2/ ALL Inputs and Bidirectionals other than those in Note 1.
3/ IOL max = 3mA / IOH max = -2mA TX INHIBIT 0/1 and TX DATA/DATA ONLY.
IOL max = 2mA / IOH max = -1mA – ALL remaining Outputs and Bidirectionals.
4/ Input Clock (running) = 6MHz, ALL remaining Inputs are Open and ALL Outputs and Bidirectionals have no load
CLOCK REQUIREMENTS
Parameter
Frequency:
Stability -55°C to +125°C:
Maximum Asymmetry:
Rise/Fall Time:
Output Level:
Range
6.0 MHz
±0.01% (100ppm)
48 - 52%
10ns MAX
Logic "0" 0.4V MAX
Logic "1" 2.4V MIN
SCDCT1990 Rev C
2
REMOTE TERMINAL OPERATION
Receive Data Operation
All valid data words associated with a valid receive data command word for the RT are passed to the subsystem.
The RT examines all command words from the bus and will respond to valid (i.e. correct Manchester, parity
coding etc.) commands which have the correct RT address (or broadcast address if the RT broadcast option is
enabled). When the data words are received, they are decoded and checked by the RT and, if valid, passed to the
subsystem on a word by word basis at 20µs intervals. This applies to receive data words in both Bus Controller to
RT and RT to RT messages. When the RT detects that the message has finished, it checks that the correct number
of words have been received and if the message is fully valid, then a Good Block Received signal is sent to the
subsystem, which must be used by the subsystem as permission to use the data just received.
The subsystem must therefore have a temporary buffer store up to 32 words long into which these data words can
be placed. The Good Block Received signal will allow use of the buffer store data once the message has been
validated.
If a block of data is not validated, then Good Block Received will not be generated. This may be caused by any
sort of message error or by a new valid command for the RT being received on another bus to which the RT must
switch.
Transmit Data Operation
If the RT receives a valid transmit data command addressed to the RT, then the RT will request the data words
from the subsystem for transmission on a word by word basis. To allow maximum time for the subsystem to
collect each data word, the next word is requested by the RT as soon as the transmission of the current word has
commenced.
It is essential that the subsystem should provide all the data words requested by the RT once a transmit sequence
has been accepted. Failure to do so will be classed by the RT as a subsystem failure and reported as such to the Bus
Controller.
Control of Data Transfers
This section describes the detailed operation of the data transfer mechanism between the RT and subsystems. It
covers the operations of the signals DTRQ, DTAK, IUSTB, H/L, GBR, NBGT, TX/RX during receive data and
transmit data transfers.
Figure 7 shows the operation of the data handshaking signals during a receive command with two data words.
When the RT has fully checked the command word, NBGT is pulsed low, which can be used by the subsystem as
an initialization signal. TX/RX will be set low indicating a receive command. When the first data word has been
fully validated, DTRQ is set low. The subsystem must then reply within approximately 1.5µs by setting DTAK
low. This indicates to the RT that the subsystem is ready to accept data. The data word is then passed to the
subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the byte
indicator (high byte first followed by low byte). Data is valid about both edges of IUSTB. Signal timing for this
handshaking is shown in Figure 12.
If the subsystem does not declare itself busy, then it must respond to DTRQ going low by setting DTAK low
within approximately 1.5µs. Failure to do so will be classed by the RT as a subsystem failure and reported as such
to the Bus Controller.
It should be noted that IUSTB is also used for internal working in the RT. DTRQ being low should be used as an
enable for clocking data to the subsystem with IUSTB.
Once the receive data block has finished and been checked by the RT, GBR is pulsed low if the block is entirely
correct and valid. This is used by the subsystem as permission to make use of the data block. If no GBR signal is
generated, then an error has been detected by the RT and the entire data block is invalid and no data words in it
may be used.
SCDCT1990 Rev C
3
If the RT is receiving data in an RT to RT transfer, the data handshaking signals will operate in an identical fashion
but there will be a delay of approx 70µs between NBGT going low and DTRQ first going low. See Figure 10.
Figure 6 shows the operation of the data handshaking signals during transmit command with three data words. As
with the receive command discussed previously, NBGT is pulsed low if the command is valid and for the RT.
TX/RX will be set high indicating a transmit data command. While the RT is transmitting its status word, it
requests the first data word from the subsystem by setting DTRQ low. The subsystem must then reply within
approximately 13.5µs by setting DTAK low. By setting DTAK low, the subsystem is indicating that it has the data
word ready to pass to the RT. Once DTAK is set low by the subsystem, DTRQ should be used together with H/L
and TX/RX to enable first the high byte and then the low byte of the data word onto the internal highway
IH08-IH715. The RT will latch the data bytes during IUSTB, and will then return DTRQ high. Data for each byte
must remain stable until IUSTB has returned low. Signal timing for this handshaking is shown in Figure 11.
Additional Data Information Signals
At the same time as data transfers take place, a number of information signals are made available to the
subsystem. These are INCMD, the subaddress lines SA0-SA4, the word count lines WC0-WC4 and current word
count lines CWC0-CWC4. Use of these signals is optional.
INCMD will go active low while the RT is servicing a valid command for the RT. The subaddress,
transmit/receive bit, and word count from the command word are all made available to the subsystem as
SA0-SA4, TX/RX and WC0-WC4 respectively. They may be sampled when INCMD goes low and will remain
valid while INCMD is low.
The subaddress is intended to be used by the subsystem as an address pointer for the data block. Subaddress 0 and
31 are mode commands, and there can be no receive or transmit data blocks associated with these. (Any data word
associated with a mode command uses different handshaking operations. If the subsystem does not use all the
subaddresses available, then some of the subaddress lines may be ignored.
The TX/RX signal indicates the direction of data transfer across the RT - subsystem interface. Its use is described
in the previous section.
The word count tells the subsystem the number of words to expect to receive or transmit in a message, up to 32
words. A word count of all 0s indicates a count of 32 words.
The current word count is set to 0 at the beginning of a new message and is incremented following each data word
transfer across the RT - subsystem interface. (It is clocked on the falling edge of the second IUSTB pulse in each
word transfer). It should be noted that there is no need for the subsystem to compare the word count and current
word count to validate the number of words in a message. This is done by the RT.
SUBSYSTEM USE OF STATUS BITS AND MODE COMMANDS
General Description
Use of the status bits and the mode commands is one of the most confusing aspects of MIL-STD-1553B. This is
because much of their use is optional, and also because some involve only the RT while others involve both the RT
and the subsystem.
The CT1990/1 allows full use to be made of all the Status Bits, and also implements all the Mode Commands.
External programming of the Terminal Flag and Subsystem Flag Bits plus setting of the Message Error Bit on
reception of an illegal command when externally decoded is available. The subsystem is given the opportunity to
make use of Status Bits, and is only involved in Mode Commands which have a direct impact on the subsystem.
The mode commands in which the subsystem may be involved are Synchronize, Sychronize with data word,
Transmit Vector Word, Reset and Dynamic Bus Control Acceptance. The Status Bits to which the subsystem has
access, or control are Service Request, Busy, Dynamic Bus Control Acceptance, Terminal Flag, Subsystem Flag,
and Message Error Bit. Operation of each of these Mode Commands and of the Status Bits is described in the
following sections.
SCDCT1990 Rev C
4
All other Mode Commands are serviced internally by the RT. The Terminal Flag and Message Error Status Bits
and BIT Word contents are controlled by the RT; however the subsystem has the option to set the Message Error
Bit and to control the reset conditions for the Terminal Flag and Subsystem Flag Bits in the Status Word, and the
Transmitter Timeout, Subsystem Handshake, and Loop Test Fail Bits in the BIT Word.
Synchronize Mode Commands
Once the RT has validated the command word and checked for the correct address, the SYNC line is set low. The
signal WC4 will be set low for a Synchronize mode command (See Figure 16), and high for a Synchronize with
data word mode command (See Figure 15). In a Synchronize with data word mode command, SYNC remains low
during the time that the data word is received. Once the data word has been validated, it is passed to the subsystem
on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the byte indicator
(high byte first followed by low byte). SYNC being low should be used on the enable to allow IUSTB to clock
synchronize mode data to the subsystem.
If the subsystem does not need to implement either of these mode commands, the SYNC signal can be ignored,
since the RT requires no response from the subsystem.
Transmit Vector Word Mode Command
Figure 14 illustrates the relevant signal timings for an RT receiving a valid Transmit Vector Word mode command.
The RT requests data by setting VECTEN low. The subsystem should use H/L to enable first the high byte and
then the low byte of the Vector word onto the internal highway IH08-IH715.
It should be noted that the RT expects the Vector word contents to be already prepared in a latch ready for enabling
onto the internal highway when VECTEN goes low. If the subsystem has not been designed to handle the Vector
word mode command, it will be the fault of the Bus Controller if the RT receives such a command. Since the
subsystem is not required to acknowledge the mode command, the RT will not be affected in any way by Vector
word circuitry not being implemented in the subsystem. It will however transmit a data word as the Vector word,
but this word will have no meaning.
Reset Mode Command
Figure 8 shows the relevant signal timings for an RT receiving a valid reset mode command. Once the command
word has been fully validated and serviced, the RESET signal is pulsed low. This signal may be used as a reset
function for subsystem interface circuitry.
Dynamic Bus Allocation
This mode command is intended for use with a terminal which has the capability of configuring itself into a bus
controller on command from the bus. The line DBCREQ cannot go true unless the DBCACC line was true at the
time of the valid command, i.e. tied low. For terminals acting only as RTs, the signal DBCACC should be tied
high (inactive), and the signal DBCREQ should be ignored and left unconnected.
Use of the Busy Status Bit
The Busy Bit is used by the subsystem to indicate that it is not ready to handle data transfers either to or from the
RT.
The RT sets the bit to logic one if the BUSY line from the subsystem is active low at the time of the second falling
edge of INCLK after INCMD goes low. This is shown in Figure 13. Once the Busy bit is set, the RT will stop all
receive and transmit data word transfers to and from the subsystem. The data transfers in the Synchronize with
data word and Transmit Vector word mode commands are not affected by the Busy bit and will take place even if
it has been set.
It should be noted that a minimum of 0.5µs subaddress decoding time is given to the subsystem before setting of
status bits. This allows the subsystem to selectively set the Busy bit if for instance one subaddress is busy but
others are ready. This option will prove useful when an RT is interfacing with multiple subsystems.
SCDCT1990 Rev C
5
Use of the Service Request Status Bit
The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous service is
requested.
The timing of the setting of this bit is the same as the Busy bit and is shown in Figure 13. Use of SERVREQ has
no effect on the RT apart from setting the Service Request bit.
It should be noted that certain mode commands require that the last status word be transmitted by the RT instead
of the current one, and therefore a currently set status bit will not be seen by the Bus Controller. Therefore the user
is advised to hold SERVREQ low until the requested service takes place.
Use of the Subsystem Status Bit
This status bit is used by the RT to indicate a subsystem fault condition. If the subsystem sets SSERR low at any
time, the subsystem fault condition in the RT will be set, and the Subsystem Flag status bit will subsequently be
set. The fault condition will also be set if a handshaking failure takes place during a data transfer to or from the
subsystem. The fault condition is cleared on power-up or by a Reset mode command.
Dynamic Bus Control Acceptance Status Bit
DBCACC, when set true, enables an RT to configure itself into a Bus Controller, if the subsystem has the
capability, by allowing DBCREQ to pulse true and BIT TIME 18 to be set in the status response. If Dynamic Bus
Control is not required then DBCACC must be tied high. DBCACC tied high inhibits DBCREQ and clears BIT
TIME 18 in the status response.
OPTIONAL STATUS WORD CONTROL
Message Error Bit
The CT1990/1 monitors all receptions for errors and sets the Message Error Bit as prescribed in MIL-STD-1553B.
The subsystem designer may, however, exercise the option of monitoring for illegal commands and forcing the
Message Error Bit to be set.
The word count and subaddress lines for the current command are valid when INCMD goes low. The subsystem
must then determine whether or not the word count or subaddress is to be considered illegal by the RT. If either of
them is considered illegal, the subsystem must produce a positive-going pulse called MEREQ. The positive-going
edge of MEREQ must occur within 500ns of the falling edge of INCMD .
Subsystem Flag and Terminal Flag Bits
The conditions that cause the Subsystem Flag and Terminal Flag Bits in the Status Word to be reset may be
controlled by the subsystem using the ENABLE, BIT DECODE, NEXT STATUS, and STATUS UPDATE inputs.
If ENABLE is inactive (high), then the Terminal Flag and Subsystem Flag behavior is the same as described
below: (i.e. the other three option lines are disabled).
Subsystem Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset
the remote terminal (code 01000).
This bit shall be set in the current status register if the subsystem error line, SSERR, from the subsystem
ever goes active low. This bit shall also be set if an RT/subsystem handshaking failure occurs. This bit, once
set, shall be repeatedly set until the detected error condition is known to be no longer present.
SCDCT1990 Rev C
6
Terminal Flag Bit
This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset
the remote terminal (code 01000). This bit can be set to logic one in the current status register in four
possible ways:
1) If the RX detects any message encoding error in the terminals transmission. A loop test failure,
LTFAIL, will be signalled which shall cause the Terminal Flag to be set and the transmission aborted.
2) If a transmitter timeout occurs while the terminal is transmitting.
3) If a remote terminal self test fails.
4) If there is a parity error in the hard wired address to the RX chip.
This bit, once set, shall be repeatedly set until the detected error condition is known to be no longer present.
The transmission of this bit as a logic one can be inhibited by a legal mode command to inhibit terminal flag
bit (code 00110). Similarly, this inhibit can be removed by a mode command to override inhibit terminal
flag bit (code 00111), a power up initialization or a legal mode command to reset remote terminal (code
01000).
If ENABLE is held low, then the three options described below are available and are essentially independent. Any,
all, or none may be selected. Also, reporting of faults by the subsystem requires that SSERR be latched (not
pulsed) low until the fault is cleared.
Resetting SSF and TF on Receipt of Valid Commands
If ENABLE is selected and the other three option lines are held high, then the Status Word Register will be reset
on receipt of any valid command with the exception of Transmit Status and Transmit Last Command. Note that in
this mode, the TF will never be seen in the Status Word, and the SSF will only be seen if SSERR is latched low.
Also note that the SSF will not be seen in response to Transmit Status or Transmit Last Command if the preceding
Status Word was clear, regardless of actions taken on the SSERR line after the clear status transmission.
Status Register Update at Fault Occurrence
If STATUS UPDATE is selected (held low), then the TF or SSF will appear in response to a Transmit Status or
Transmit Last Command issued as the first command after the fault occurs. Any other command (except as noted
in the Preserving the BIT Word section) will reset the TF and SSF. Repeated Transmit Status or Transmit Last
Command immediately following the fault will continue to show the TF and/or SSF in the Status Word. Note that
this behavior may not meet the "letter-of-the-spec" as described in MIL-STD-1553B, but is considered the
"preferred" behavior by some users.
TF and SSF Reporting in the Next Status Word
After the Fault
If NEXT STATUS is selected (held low), then the TF or SSF will appear in response to the very next valid
command after the fault except for Transmit Status or Transmit Last Command. The flag(s) will be reset on receipt
of any valid command following the status transmission with the flag(s) set except for Transmit Status, Transmit
Last Command, or as noted in the following section on Preserving the BIT Word.
Preserving the BIT Word
In order to preserve the Transmitter Timeout Flag, Subsystem Handshake Failure, and Loop Test Failure Bits in
the BIT Word, it is necessary to select BIT DECODE (hold it low). This will prevent resetting those bits if the
Transmit Bit Word Mode Command immediately follows the fault or follows a Transmit Last Command or
Transmit Status immediately following the fault. It will also prevent resetting the TF and SSF Bits in the Status
Word. Any other valid commands will cause those BIT Word Bits and the Status Word Bits to be reset.
SCDCT1990 Rev C
7
BUS DRIVER/RECEIVER INTERFACE
Receive Data
The decoder chip requires two TTL signals, RXDATA and RXDATA, to represent the data coming in from the
bus. PDIN should be driven to a logic level ‘1’ when the bus waveform exceeds a specified positive threshold and
NDIN should be driven to a logic level ‘1’ when a specified negative threshold is exceeded. During the quiet
period on the bus both signals should be at the same logic level. All the bus receivers must be permanently
enabled, the selection of the bus in use is controlled within the ASIC.
Transmit Data
The signals generated by the encoder chip, TXDATA and TXDATA, are of the same format as the receive data.
The only difference is that the TTL signals are negative logic, e.g. the signal is active when on logic level "0". This
means that when the encoder is quiet both TXDATA and TXDATA are at logic level "1". Both the signals should
be used in conjunction with TXINHIBIT 0 and TXINHIBIT 1. TX INHIBIT 0 and TX INHIBIT 1 enable the
appropriate driver when it should be transmitting. Figure 5 shows an example of a typical interface circuit between
the CT1990/1 and a driver/receiver unit.
BUS CONTROL OPERATION
To enable its use in a bus controller the ASIC has additional logic within it. This logic can be enabled by pulling
the pin labelled RT/BC low. Once the ASIC is in bus control mode, all data transfers must be initiated by the bus
control processor correctly commanding the ASIC via the subsystem interface. In bus control mode six inputs are
activated which in RT mode are inoperative and four signals with dual functions exercise the second function (the
first being for the RT operation).
To use the CT1990/1 as a 1553B bus control interface, the bus control processor must be able to carry out four
basic bus-related functions. Two inputs, BCOPA and BCOPB allow these four options to be selected. The option
is then initiated by sending a negative-going strobe on the BCOPSTB input. BCOPSTB must only be strobed low
when NDRQ is high. This is particularly important when two options are required during a single transfer.
With these options all message types and lengths can be handled. Normal BC/RT exchanges are carried out in
ASIC option zero. This is selected by setting BCOPA and BCOPB to a zero and strobing BCOPSTB. On receipt
of the strobe, the CT1990/1 loads the command word from an external latch using CWEN and H/L. The command
word is transmitted down the bus. The TX/RX bit is, however, considered by the ASIC as being its inverse and so
if a transmit command is sent to a RT (Figure 17), the ASIC in BC mode believes it has been given a receive
command. As the RT returns the requested number of data words plus its status, the BC carries out a full
validation check and passes the data into the subsystem using DTRQ, DTAK, H/L, IUSTB and CWC as in RT
operation. It also supplies GBR at the end of a valid transmission. Conversely, a receive command sent down the
bus is interpreted by the BC as a transmit command, and so the requisite data words are added to the command
word. See Figure 18.
For mode commands, where a single command word is required, option one is selected by strobing BCOPSTB
when BCOPA is high and BCOPB is low. On receiving the strobe, the command word is loaded from the external
latch using CWEN and H/L, the correct sync and parity bits are added and the word transmitted (See Figure 20).
Mode commands followed by a data word requires option two. Option two, selected by strobing BCOPSTB while
BCOPA is low and BCOPB is high, loads a data word via DWEN and H/L, adds sync and parity and transmits
them to the bus (See Figure 21). If the mode code transmitted required the RT to return a data word, then selecting
option three by strobing BCOPSTB when BCOPA and BCOPB are both high will identify that data word and if
validated, output it to the subsystem interface using RMDSTB and H/L. This allows data words resulting from
mode codes to be identified differently from ordinary data words and routed accordingly (See Figure 22). All
received status words are output to the subsystem interface using STATSTB and H/L.
SCDCT1990 Rev C
8
In BC option three, if the signal PASMON is active, then all data appearing on the selected bus is output to the
subsystem using STATSTB for command and status words or RMDSTB for data words.
RT to RT transfers require the transmission of two command words. A receive command to one RT is
contiguously followed by a transmit command to the other RT. This can be achieved by selecting option one
followed by option zero for the second command. The strobe (BCOPSTB) for option zero must be delayed until
NDRQ has gone low and returned high following the strobe for option one. The RT transmissions are checked and
transferred in the subsystem interface to the bus control processor (See Figure 19).
Note: For all BC operations, BCOPA and BCOPB must remain valid and stable for a minimum of 1µs following
the leading (negative going) edge of BCOPSTB.
PASSIVE MONITOR
The Monitor Mode may be utilized to analyze or collect all activities which occur on a selected bus. This is
initiated by selecting a bus, placing the unit in BC option three and setting PASMON low. All data appearing on
the selected bus is output to the subsystem using STATSTB for Command and Status Words or RMDSTB for Data
Words.
AUTOMATED SELF-TEST
The CT1991 has been designed to fully support a wrap-around self-test which ensures a high degree of fault
coverage. The monolithic circuit includes all circuitry required to perform the self-test.
Self-test can be an on-line or off-line function which is initiated by simple subsystem intervention. The DRVINH
signal selects on-line or off-line testing. The circuit accomplishes the on-line test without accessing the
MIL-STD-1553 data bus by providing an internal data path which connects the encoder circuitry directly to the
decoder circuitry. The transceiver is inhibited during this on-line test. The off-line test is designed to include the
transceiver as well as the protocol device. This mode will generally be useful as an off-line card test where no live
bus is in use.
To initiate the self-test a word is placed in the Vector Word Latch, Loop Test Enable (LTEN) is held low, and the
Loop Test Trigger (LTTRIG) signal is pulsed low. The primary bus will be tested with the word that resides in the
Vector Word Latch, encoded then looped back, decoded and presented to the subsystem as a normal data transfer
would be accomplished. The secondary bus is sequentially tested after the primary bus is completed via Request
Bus A (REQBUSA) utilizing the same word residing in the Vector Word Latch. Upon completion of each test,
pass/fail signals will be asserted reporting the results of the test. This test implementation verifies MIL-STD-1553
protocol compliance; proper sync character, 16 data bits, Manchester II coding, odd parity, contiguous word
checking and a bit by bit comparison of the transmitted data. The self-test circuitry increases the fault coverage by
insuring that the internal function blocks; encoder, decoder, and internal control circuitry are operating correctly.
An effective data pattern to accomplish this is HEX AA55 since each bit is toggled, (8 bit internal highway) on a
high/low byte basis. The total time required to complete the self-test cycle is 89 microseconds. The Loop Test
Enable signal must remain in the low state throughout the diagnostic cycle.
SCDCT1990 Rev C
9
PIN DESCRIPTION
Signal
Direction
Signal Description
RX DATA 0/1
INPUT
Positive Data In - This should be a TTL description of the positive,
half of the Manchester code data on the bus. It should be driven to a
logic level “1” when a predetermined positive threshold is exceeded
on the bus.
RX DATA 0/1
INPUT
Negative Data In - This should be a TTL description of the negative
half of the Manchester code data on the bus. It should be driven to a
logic level “1” when a predetermined negative threshold is exceeded
on the bus.
TX INHIBIT 0
OUTPUT
Transmitter Inhibit Bus 0 - Normally high. Goes low when the
transmitter is transmitting. Should be used to Inhibit the bus "0"
driver.
TX INHIBIT 1
OUTPUT
Transmitter Inhibit Bus - Normally high. Goes low when the
transmitter is transmitting. Should be used to Inhibit the bus "1"
driver.
TX DATA
OUTPUT
Positive Data Out - When this signal goes high the bus should be
driven positive.
TX DATA
OUTPUT
Negative Data Out - When this signal goes high the bus should be
driven negative.
RTAD 0-4
INPUT
RT address lines - These should be hardwired by the user. RTAD4 is
the most significant bit.
RTADPAR
INPUT
RT address parity line - This must be hardwired by the user to give
odd parity.
BIT DECODE
INPUT
Built-ln Test Decode - When held low, prevents resetting TXTO Bit,
HSFAIL Bit, and LTFAIL Bit in the BIT Word (as well as TF and
SSF Bits in the Status Word) upon receipt of a Transmit Bit Word
Mode Command.
BCSTEN 0/1
INPUT
Broadcast command enable Bus 0/1 - When low the recognition of
broadcast command is prevented on both Bus 0 and 1. CT1991 only.
BCSTEN 0
INPUT
Broadcast command enable Bus 0 - When low the recognition of
broadcast command is prevented on Bus 0. CT1990 only.
BCSTEN 1
INPUT
Broadcast command enable Bus 1 - When low the recognition of
broadcast command is prevented on Bus 1. CT1990 only.
6MCK
INPUT
6 Megahertz master clock.
IH 08 (LSB)
IH 19
IH 210
IH 311
IH 412
IH 513
IH614
IH715 (MSB)
DTRQ
BI-DIRECTIONAL
OUTPUT
Internal Highway - Bi-directional 8 bit highway on which 16 bit
words are passed in two bytes. IH 715 is the most significant bit of
each byte, the most significant byte being transferred first. The
highway should only be driven by the subsystem when data is to be
transferred to the RT.
Data Transfer Request - Goes low to request a data transfer
between the ASIC and subsystem. Goes high at the end of the
transfer.
SCDCT1990 Rev C
10
PIN DESCRIPTION (con’t)
Signal
Direction
Signal Description
DTAK
INPUT
Data Transfer Acknowledge - Goes low to indicate that the
subsystem is ready for the data transfer.
IUSTB
OUTPUT
Interface Unit Strobe - This is a double pulse strobe used to transfer
the two bytes of data
H/L
OUTPUT
High/Low - Indicates which byte of data is on the internal highway.
Logic level "0" for least significant byte.
GBR
OUTPUT
Good Block Received - Pulses low for 500ns when a block of data
has been received by the ASIC and has passed all the validity and
error checks.
NBGT
OUTPUT
New Bus Grant - Pulses low whenever a new command is accepted
by the ASIC.
MEREQ
INPUT
Message Error Request - Positive-going edge will cause Message
Error Bit in Status Word to be set.
TX/RX
OUTPUT
Transmit/Receive - The state of this line informs the subsystem
whether it is to transmit or receive data The signal is valid while
INCMD is low.
INCMD
OUTPUT
In Command - Goes low when the RT is servicing a valid command.
The subaddress and word count lines are valid while the signal is
low.
WC0-WC4
OUTPUT
Word Count - These five lines specify the requested number of data
words to be received or transmitted. Valid when INCMD is low.
SA0-SA4
OUTPUT
Sub Address - These five lines are a label for the data being
transferred. Valid when INCMD is low.
CWC0-CWC4
OUTPUT
Current Word Count - These five lines define which data word in
the message is currently being transferred.
SYNC
OUTPUT
Synchronize - Goes low when a synchronize mode code is being
serviced.
VECTEN/DWEN
OUTPUT
Vector Word Enable/DataWord Enable - In the RT mode, this
signal is provided to enable the contents of the vector word latch
(which is situated in the subsystem) onto the ASIC’s internal
highway. This signal, when in the Bus Controller mode, is used to
enable mode code data from the subsystem onto the internal
highway.
RESET
OUTPUT
Reset - This line pulses low for 500ns on completion of the servicing
of a valid and legal mode command to reset remote terminal.
SSERR
INPUT
Subsystem Error - By taking this line low, the subsystem can set the
Subsystem Flag in the Status Word.
BUSY
INPUT
Busy - This signal should be driven low if the subsystem is not ready
to perform a data transfer to or from the ASIC.
SERVREQ
INPUT
Service Request - This signal should be driven low to request an
asynchronous transfer and left low until the transfer has taken place.
SCDCT1990 Rev C
11
PIN DESCRIPTION (con’t)
Signal
Direction
INCLK
OUTPUT
Internal Clock (2 MHz) - This is made available for
synchronization use by the subsystem if required. However, many of
the outputs to the subsystem are asynchronous.
EOT
OUTPUT
End of Transmission - Goes low if a valid sync plus two data bits do
not appear in time to be contiguous with preceding word.
RTADER
OUTPUT
Remote Terminal Address Error - This line goes low if an error is
detected in the RT address parity of the selected receiver. Any
receiver detecting an error in the RT address will turn itself off.
HSFAIL
OUTPUT
Handshake Failure - This line pulses low if the allowable time for
DTAK response has been exceeded during the ASIC/subsystem data
transfer handshaking.
LSTCMD/CWEN
OUTPUT
Last Command/Command Word Enable - This line pulses low
when servicing a valid and legal mode command to transmit last
command. When in RT mode this line must not be used to enable
data from the subsystem. This line also pulses low, when in the Bus
Control mode, when a command word is required for transmission.
STATEN/STATSTB
OUTPUT
Status Enable/Status Strobe - This line pulses low to enable the
status word onto the internal highway for transmission. When in RT
mode this line must not be used to enable data from the subsystem.
This line also pulses high, when in the Bus Control mode, to strobe
received status words into the subsystem. When PASMON is true
this line pulses high for Command and Status words.
INPUT
Status Update - When held low, causes TF or SSF to appear in
Status Word response to Transmit Status or Transmit Last Command
issued immediately after fault occurrence
BITEN/RMDSTB
OUTPUT
Built In Test Enable/Receive Mode Data Strobe - This line pulses
low when servicing a valid and legal mode command to transmit the
internal BIT word. This signal is for information only and must not
be used to enable data from the subsystem. This line also pulses high
when in the Bus Control mode when mode data is received to be
passed to the subsystem and when data is passed to the subsystem
during PASMON.
DWSYNC
OUTPUT
Data Word Sync - This line goes low if a data word sync and two
Manchester biphase bits are valid. CT1990 only.
ENABLE
INPUT
CMSYNC
OUTPUT
Command Word Sync - This line goes low if a command word sync
and two Manchester biphase bits are valid. CT1990 only.
NDRQ
OUTPUT
No Data Required - This line goes low if the encoder transmit buffer
is full i.e. another word is going to be transmitted. This signal is for
information only and must not be used to enable data from the
subsystem.
STAT UPDATE
NEXT STAT
INPUT
Signal Description
Enable - When held low, enables Bit Decode, Next Status, and
Status Update program lines.
Next Status - When held low, causes TF or SSF to appear in very
next Status Word after fault occurrence (except for Transmit Status
or Transmit Last Command).
SCDCT1990 Rev C
12
PIN DESCRIPTION (con’t)
Signal
Direction
Signal Description
PASMON
INPUT
Passive Monitor - When functioning as a Bus Controller this line
acts as a passive monitor select. The active going edge of this line
will cause the REQBUS lines to be latched and that bus, now
selected will be monitored so long as PASMON remains low. All
traffic on the bus will be handed, after validation, to the subsystem
via STATSTB for status and commands words, and RMDSTB for
data words.
BCOPSTB
INPUT
Bus Controller Operation Strobe - When functioning as a Bus
Controller a low going pulse on this line will initiate the selected bus
controller operation on the requested bus, using BCOPA & B and
REQBUS A&B.
RMDSTB
-
See BITEN/RMDSTB.
BCOPA
INPUT
Bus Control Operation A - Least significant bit of the bus
controller operation select lines.
BCOP B
INPUT
Bus Control Operation B - Most significant bit of the bus controller
operation select lines.
REQBUS A
BI-DIRECTIONAL
Request Bus A - This line, when in RT mode, is the least significant
bit of the bus request lines which specify the origin of the command,
i.e. they are sources. When in BC mode these lines are sinks and
specify which bus is to be used for the next command.
REQBUS B
BI-DIRECTIONAL
Request Bus B - Most significant bit of the bus request lines (See
REQBUS A above for description).
RT/BC
INPUT
Remote Terminal/Bus Control - This line when high causes the
ASIC to function as a remote terminal. When low the ASIC
functions as a bus controller or passive monitor.
DBCACC
INPUT
Dynamic Bus Control Accept - This line should be permanently
tied low if a subsystem is able to accept control of the bus if offered.
LTFAIL
OUTPUT
Loop Test Fail - This line goes low if any error in the transmitted
waveform is detected or if any parity error in the hardwired RT
address is detected.
ERROR
OUTPUT
Error - This line latches low if a Manchester or parity error is
detected. It is reset by the next CMSYNC (RT mode) and also by
RTO in the BC mode.
RTO
OUTPUT
Reply Time Out - This signal will pulse low whenever the reply
time for a transmitting terminal has been exceeded. This line is
intended for the bus controller use.
TXTO
OUTPUT
Transmitter Time Out - This line goes true if the transmitter time
out limits are exceeded.
PARER
OUTPUT
Parity Error - This line will pulse low if a parity error is detected by
the decoder.
MANER
OUTPUT
Manchester Error - This line will pulse low if a Manchester error is
detected by the decoder.
SCDCT1990 Rev C
13
PIN DESCRIPTION (con’t)
Signal
Direction
Signal Description
DBCREQ
OUTPUT
Dynamic Bus Control Request - This line will pulse low when the
status reply for a mode code Dynamic Bus Control has finished
where the accept bit was set.
VALD
OUTPUT
Valid Data - This line will pulse low when a valid data word is
received.
DRVINH
INPUT
Driver Inhibit - Selects on-line or off-line testing during automated
self test. When high self test is on-line. Must be high when LTEN is
high. CT1991 only.
LTEN
INPUT
Loop Test Enable - Enables automated self-test when low. Normally
high. CT1991 only.
LTTRIG
INPUT
Loop Test Trigger - When pulsed low while LTEN is low automated
self-test is initiated. LTEN pulse width should be 100ns < PW < 5µs.
CT1991 only.
SCDCT1990 Rev C
14
NEXT
....
Data
Word
..
Status
Word
§
Command
Word
Status
Word
Data
Word
Data
Word
....
Data
Word
§
Command
Word
..
Status
Word
Data
Word
Data
Word
....
Data
Word
..
..
Status
Word
§
Command
Word
Mode
Command
..
Status
Word
Data
Word
§
Command
Word
Mode
Command
Data
Word
..
Status
Word
§
Command
Word
Controller to
RT Transfer
Receive
Command
Data
Word
Data
Word
RT to
Controller
Transfer
Transmit
Command
..
RT to RT
Transfer
Receive Transmit
Command Command
Mode Command
Without Data
Word
Mode
Command
Mode Command
With Data
Word
(Transmit)
Mode Command
With Data
Word
(Receive)
NEXT
NEXT
Status
Word
§
Command
Word
NEXT
NEXT
NEXT
NOTE:
§ = Intermessage Gap
. . = Response Time
Figure 1 – TYPICAL MESSAGE FORMATS
T/R
Bit
Mode Code
Function
Associated
Data Word
1
00000
Dynamic Bus Control
No
No
1
00001
Synchronize
No
Yes
1
00010
Transmit Status Word
No
No
1
00011
Initiate Self Test
No
Yes
1
00100
Transmitter Shutdown
No
Yes
1
00101
Override Transmitter Shutdown
No
Yes
1
00110
Inhibit Terminal Flag Bit
No
Yes
1
00111
Override lnhibit Terminal Flag Bit
No
Yes
1
01000
Reset Remote Terminal
No
Yes
1
01001
Reserved
No
TBD
↓
↓
↓
Broadcast Command
Allowed
↓
1
01111
Reserved
No
TBD
1
10000
Transmit Vector Word
Yes
No
0
10001
Synchronize
Yes
Yes
1
10010
Transmit Last Command
Yes
No
1
10011
Transmit BlTWord
Yes
No
0
10100
Selected Transmitter Shutdown
Yes
Yes
0
10101
Override Selected Transmitter
Shutdown
Yes
Yes
1 or 0
10110
Reserved
Yes
TBD
↓
1 or 0
11111
↓
↓
Reserved
Yes
Figure 2 – ASSIGNED MODE CODES
SCDCT1990 Rev C
15
↓
TBD
SYNC
12
11
10
9
8
7
6
5
4
3
2
1
0
Bus 0 Shutdown
Broadcast Transmit Data Received
Word Count High
Word Count Low
REMOTE TERMINAL
ADDRESS
SCDCT1990 Rev C
16
Note: T/R – Transmit/Receive
P – Parity
Figure 3 – WORD FORMAT
1
1
1
1
1
1
1
1
1
Parity
RESERVED
Transmitter Timeout Flag
3
Terminal Flag
14
Subsystem Handshake Failure
13
Dynamic Bus Control Acceptance
DATA WORD
12
Loop Test Failure
SYNC
11
Subsystem Flag
10
Mode T/R Bit Wrong
9
Busy
8
Illegal Mode Command
7
Broadcast Command Received
COMMAND
WORD
6
Service Request
5
13
Bus 1 Shutdown
5
Instrumentation
STATUS
WORD
14
Bus 2 Shutdown
4
Message Error
SYNC
15
Bus 3 Shutdown
BIT WORD
Transmitter Timeout on Bus 0
SYNC
3
Transmitter Timeout on Bus 1
2
Transmitter Timeout on Bus 2
1
Transmitter Timeout on Bus 3
BIT TIMES
15
16
17
18
1
19
20
5
1
5
5
1
REMOTE TERMINAL
ADDRESS
T/R
SUBADDRESS/MODE
DATA WORD
COUNT/MODE CODE
P
16
1
DATA
P
LSB
20
P
One Bit Time
1MHz
Clock
(+) -
NRZ
Data
(+) -
(0) -
(0) -
(+) -
=
Manchester
(0) -
Bi-Phase
(-) -
Figure 4 – DATA ENCODING
CT1990/1
+
TX DATA OUT
RX DATA IN
RX DATA OUT
ACT4453
1553B
BUS "A"
Driver/
Receiver 0
RX DATA OUT
RX DATA 0
RX DATA 0
TX DATA IN
TX DATA IN
TX DATA
XFR0
TX DATA
TX DATA OUT
RX DATA IN
TX INHIBIT "0"
+
TX DATA OUT
RX DATA IN
RX DATA OUT
ACT4453
1553B
BUS "B"
Driver/
Receiver 1
RX DATA OUT
RX DATA 1
RX DATA 1
TX DATA IN
TX DATA IN
TX INHIBIT "0"
XFR1
TX DATA OUT
RX DATA IN
TX INHIBIT "1"
TX INHIBIT "1"
Figure 5 – EXAMPLE OF AN INTERFACE BETWEEN THE CT1990/1 AND DRIVER/RECEIVER
SCDCT1990 Rev C
17
PDIN
NBGT
INCMD
DTRQ
IUSTB
H/L
GBR
EOT
Figure 6 – TRANSFER OF THREE DATA WORDS FROM RT 03 TO BC
PDIN
NBGT
INCMD
DTRQ
IUSTB
H/L
GBR
EOT
Figure 7 – TRANSFER OF TWO DATA WORDS FROM BC TO RT 03
PDIN
NBGT
INCMD
DTRQ
IUSTB
H/L
RESET
EOT
Figure 8 – MODE COMMAND RESET REMOTE TERMINAL
SCDCT1990 Rev C
18
PDIN
NBGT
INCMD
DTRQ
IUSTB
H/L
GBR
EOT
Figure 9 – RT TO RT TRANSFER OF FOUR DATA WORDS (THIS RT SENDING THE DATA)
PDIN
NBGT
INCMD
DTRQ
IUSTB
H/L
GBR
EOT
Figure 10 – RT TO RT TRANSFER OF FOUR DATA WORDS (THIS RT RECEIVING THE DATA)
SCDCT1990 Rev C
19
DTRQ
Subsystem Reply Time < 13.5µs
Don’t Care
DTAK
250 nsec
250 nsec
IUSTB
500 nsec
H/L
CWC0-CWC4
Valid
Incremented
Enable High Byte of TX
Data on Internal
Highway
Enable Low Byte of
TX Data on Internal
Highway
Figure 11 – HANDSHAKING FOR TX DATA TRANSFERS
DTRQ
Subsystem Reply Time < 1.5µs
Don’t Care
DTAK
250 nsec
250 nsec
IUSTB
500 nsec
H/L
Internal
Highway
CWC0-CWC4
High Byte Valid
Low Byte Valid
Valid
Incremented
Figure 12 – HANDSHAKING FOR RX DATA TRANSFERS
SCDCT1990 Rev C
20
NBGT
1.0µs Minimum
TX/RX
Previous command value
Valid
SA4-SA0
Previous command value
Valid
WC4-WC0
Previous command value
Valid
CWC4-CWC0
INCMD
INCLK
BUSY Latch here
Figure 13 – NEW COMMAND INITIALIZATION
NBGT
INCMD
VECTEN
1.5µs
approx.
H/L
}
}
Enable high byte of
vector word onto
internal highway
Figure 14 – TRANSMIT VECTOR WORD COMMAND
SCDCT1990 Rev C
21
Enable low byte of
vector word onto
internal highway
1
0 0
1
NBGT
0
1
INCMD
0
1
SYNC
0
1
ILUSTB
0
1
EOT
0
1
WC4
0
1
H/L
0
PDIN
Figure 15 – SYNCHRONIZE (WITH DATA) MODE COMMAND
1
0 0
1
NBGT
0
1
INCMD
0
1
SYNC
0
1
IUSTB
0
1
EOT
0
1
WC0
0
PDIN
Figure 16 – SYNCHRONIZE (NO DATA) MODE COMMAND
SCDCT1990 Rev C
22
SCDCT1990 Rev C
23
NBGT
GBR
INCMD
RTO
STATSTB
VALD
VALC
EOT
C/D
IUSTB
H/L
DTRG
CWEN
NDRG
PDIN
BCOPSTB
Figure 17 – BUS CONTROLLER SENDING COMMAND TO RT 10001 TO TRANSMIT TWO DATA WORDS
SCDCT1990 Rev C
24
NBGT
GBR
INCMD
RTO
STATSTB
VALD
VALC
EOT
C/D
IUSTB
H/L
DTRG
CWEN
NDRG
PDIN
BCOPSTB
Figure 18 – BUS CONTROLLER SENDING COMMAND TO RT 10001 TO RECEIVE TWO DATA WORDS
SCDCT1990 Rev C
25
IH412
IH311
IH210
IH19
IH06
H/L
IUSTB
C/D
TxSTB
NBGT
INCMD
VALC
VALD
STATSTB
DTRG
CWC0
CWC1
TREQ
GBR
EOT
TXEN
PDOUT
RTO
IH715
IH614
IH613
BCOPSTB
BCOPA
BCOPB
NDRG
PDIN
CWEN
Figure 19 – BUS CONTROLLER COMMANDING RT 10001 TO TRANSMIT TWO DATA WORDS AT RT 00001
BCOPSTB
BCOPA
BCOPB
PDIN
TXSTB
CWEN
H/L
STATSTB
Figure 20 – BUS CONTROLLER SENDING MODE COMMAND TRANSMIT
STATUS WORD MODE CODE 00010
BCOPSTB
BCOPA
BCOPB
PDIN
NDRQ
CWEN
DWEN
H/L
Figure 21 – BUS CONTROLLER SENDING MODE COMMAND
SYNCHRONIZE MODE CODE 10001
BCOPSTB
BCOPA
BCOPB
PDIN
DWEN
H/L
STATSTB
RMDSTB
Figure 22 – BUS CONTROLLER SENDING MODE COMMAND TRANSMIT
VECTOR MODE CODE 10000
SCDCT1990 Rev C
26
PIN vs FUNCTION - CT1990
Pin #
Function
Pin #
Function
Pin #
Function
1
BIT DECODE
31
REQBUSB
61
ERROR
2
CWC0 (LSB)
32
REQBUSA
62
LTFAIL
3
SA4 (MSB)
33
COMMON & CASE
63
MANER
4
SA3
34
ENABLE
64
PARER
5
SA2
35
STAT UPDATE
65
VALD
6
CWC4 (MSB)
36
MEREQ
66
RTADER
7
CWC3
37
IH 08 (LSB)
67
RX DATA 1
8
CWC2
38
IH19
68
RX DATA 1
9
CWC1
39
IH210
69
+5 VIN
10
GBR
40
IH311
70
TX INHIBIT 1
11
H/L
41
IH412
71
TX INHIBIT 0
12
STATEN/STATSTB
42
IH513
72
TX DATA
13
EOT
43
IH614
73
TX DATA
14
SA1
44
IH715 (MSB)
74
SERVREQ
15
SA0 (LSB)
45
NC
75
TXTO
16
INCMD
46
NC
76
DBCACC
17
TX/RX
47
RTADPAR
77
RESET
18
DTRQ
48
RTAD0 (LSB)
78
RT/BC
19
VECTEN/DWEN
49
RTAD1
79
DBCREQ
20
NBGT
50
RTAD2
80
HSFAIL
21
SYNC
51
RTAD3
81
LSTCMD/CWEN
22
INCLK
52
RTAD4 (MSB)
82
BITEN/RMDSTB
23
IUSTB
53
CMSYNC
83
BUSY
24
NEXT STAT
54
DWSYNC
84
WC4 (MSB)
25
DTAK
55
BCSTEN 0
85
WC3
26
BCOPA
56
RX DATA 0
86
WC0 (LSB)
27
BCOPSTB
57
RX DATA 0
87
SSERR
28
BCOPB
58
BCSTEN 1
88
WC2
29
PASMON
59
RTO
89
WC1
30
NDRQ
60
6 MCK
90
NC
SCDCT1990 Rev C
27
PIN vs FUNCTION - CT1991
Pin #
Function
Pin #
Function
Pin #
Function
1
BIT DECODE
31
REQBUSB
61
ERROR
2
CWC0 (LSB)
32
REQBUSA
62
LTFAIL
3
SA4 (MSB)
33
COMMON & CASE
63
MANER
4
SA3
34
ENABLE
64
PARER
5
SA2
35
STAT UPDATE
65
VALD
6
CWC4 (MSB)
36
MEREQ
66
RTADER
7
CWC3
37
IH 08 (LSB)
67
RX DATA 1
8
CWC2
38
IH19
68
RX DATA 1
9
CWC1
39
IH210
69
+5 VIN
10
GBR
40
IH311
70
TX INHIBIT 1
11
H/L
41
IH412
71
TX INHIBIT 0
12
STATEN/STATSTB
42
IH513
72
TX DATA
13
EOT
43
IH614
73
TX DATA
14
SA1
44
IH715 (MSB)
74
SERVREQ
15
SA0 (LSB)
45
NC
75
TXTO
16
INCMD
46
NC
76
DBCACC
17
TX/RX
47
RTADPAR
77
RESET
18
DTRQ
48
RTAD0 (LSB)
78
RT/BC
19
VECTEN/DWEN
49
RTAD1
79
DBCREQ
20
NBGT
50
RTAD2
80
HSFAIL
21
SYNC
51
RTAD3
81
LSTCMD/CWEN
22
INCLK
52
RTAD4 (MSB)
82
BITEN/RMDSTB
23
IUSTB
53
LTEN
83
BUSY
24
NEXT STAT
54
LTTRIG
84
WC4 (MSB)
25
DTAK
55
BCSTEN 0/1
85
WC3
26
BCOPA
56
RX DATA 0
86
WC0 (LSB)
27
BCOPSTB
57
RX DATA 0
87
SSERR
28
BCOPB
58
DRVINH
88
WC2
29
PASMON
59
RTO
89
WC1
30
NDRQ
60
6 MCK
90
NC
SCDCT1990 Rev C
28
CERAMIC COFIRED 90-Pin PLUG IN PACKAGE OUTLINE
.225
MAX
2.400
MAX
1.600
MAX
Lead 1 & ESD
Designator
.200
MIN
2.200
.090
.135
Pin 1
Pin 3
.050
TYP
Pin 43
Pin 45
Pin 44
Pin 2
.018 DIA
TYP
1.300 1.100
Pin 89
Pin 47
Pin 90
Pin 88
.135
.100
TYP
Pin 48
2.100
SCDCT1990 Rev C
29
Pin 46
ORDERING INFORMATION
Model Number
DESC Part Number
CT1990-1-20-001-1
5962-9477501HXC
CT1990-1-20-001-2
5962-9477501HXA
CT1991-1-20
Package
1.6" x 2.4" Ceramic Plug In
Pending
PLAINVIEW, NEW YORK
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Tel: 719-594-8017
Fax: 719-594-8468
www.aeroflex.com
[email protected]
Aeroflex Microelectronic Solutions reserves the right to
change at any time without notice the specifications, design,
function, or form of its products described herein. All
parameters must be validated for each customer's application
by engineering. No liability is assumed as a result of use of
this product. No patent licenses are implied.
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attributes represented by these three icons:
solution-minded, performance-driven and customer-focused
SCDCT1990 Rev C
30
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