Schematic for the LV8805SVGEVB Evaluation Board Pull-up to VREG R5 R3 10kΩ R4 FG R2 RD 1 2 FG SOFTST RD PWMIN 20 19 C5 1uF PWM Control Signal f = 20kHz～50kHz R6 PWMIN 1kΩ 1kΩ Pull-up to VCC 3 CT FR 18 4 OSC VREG 17 5 GND FIL 16 6 VG COMIN 15 7 CP COM 14 8 CPC VCC 13 9 RF UO 12 10 WO VO 11 SW C7 1000pF C2 0.1uF C9 1uF C4 LV8805SV C8 0.01uF C3 0.1uF 0Ω 1uF D1(*1) VCC C1 10uF D2(*2) R1 WO 12/30/2013 VO -1- UO COM www.onsemi.com