LV8805SV Motor Driver IC Application Note

LV8805SV
Bi-CMOS LSI
PC and Server
http://onsemi.com
Fan Motor Driver
Application Note
Overview
LV8805SV is a 3-phase sensorless motor driver IC.
3-phase driver allows low power consumption and low vibration. And Hall sensorless drive allows reduction
of the size of a motor system.
This IC is suitable for use in products which require high reliability and long life such as server fan and
refrigerator fan.
Function
 Direct PWM three-phase sensorless motor driver
 Built-in current limit circuit (Operates when RF resistance is 0.25 ohm and Io=1A)
 NchDMOS output transistor
 Built-in lock protection and auto-recovery circuit
 FG (rotation count) output signal pin / RD (lock detection) output signal pin
 Built-in TSD (thermal shutdown) circuit
 Direct PWM signal input for speed control (PWMIN pin)
 Motor startup with soft-start (SOFTST pin)
Typical Applications
 Server
 Refrigerator
 Desktop Computer
Pin Assignment
Package Dimensions
unit : mm (typ)
5.2
20
FG 1
20 SOFTST
RD 2
19 PWMIN
CT 3
18 F/R
OSC 4
0.5
4.4
6.4
17 VREG
12
0.5
0.22
0.15
1.5 MAX
0.1
(1.3)
(0.35)
SANYO : SSOP20J(225mil)
GND 5
VG 6
16 FIL
LV8805SV
CP 7
14 COM
CPC 8
13 VCC
RF 9
12 UO
WO 10
11 VO
Caution: The package dimension is a reference value, which is not a guaranteed value.
Semiconductor Components Industries, LLC, 2013
December, 2013
15 COMIN
Top view
1/27
LV8805SV Application Note
Recommended Soldering Footprint
(Unit:mm)
Reference
Symbol
SSOP20J (225mil)
eE
5.80
e
0.50
b3
0.32
l1
1.00
Block Diagram
FG
RD
FG
CT
RD
CTOSC
VG
CPC
CP
CHARGE
PUMP
VREG
REFOSC
VREG
PWMIN
OSC
SENSORLESS
LOGIC
F/R
START
OSC
PRI DRIVE
FIL
VCC
COMIN
SELECTOR
COM
CURR LIM
GND
UO
VO
WO
COM
RF
SOFTST
2/27
LV8805SV Application Note
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
VCC maximum supply voltage
Symbol
Conditions
Ratings
Unit
VCC max
16
V
VG maximum supply voltage
VG max
21
V
OUT pin withstand voltage
VOUT max
16
V
OUT pin maximum output current
IOUT max
1.2
A
SOFTST pin withstand voltage
VSOFTST max
6
V
FR pin withstand voltage
VFR max
6
V
PWMIN pin withstand voltage
VPWMIN max
6
V
UO pin, VO pin, WO pin
FG output pin withstand voltage
VFG max
16
V
FG pin output current
IFG max
5
mA
RD output pin withstand voltage
VRD max
16
V
RD pin output current
IRD max
5
mA
Allowable Power dissipation
Pd max1
Independent IC
Pd max2
Mounted on designated board *1
Operating temperature
Topr
Storage temperature
Tstg
*2
0.3
W
0.95
W
-40 to +95
C
-55 to +150
C
* : When mounted on the designated 76.1mm × 114.3mm × 1.6mm, glass epoxy board (single-layer)
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage
under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may
be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta  25C
Parameter
VCC supply voltage
Symbol
Conditions
Ratings
min
VCC
typ
Unit
max
6
15
V
Electrical Characteristics at Ta  25C, VCC = 12V, unless otherwise specified
Parameter
Circuit current 1
Symbol
Conditions
Ratings
min
typ
Unit
max
ICC1
2.6
VVG
17
3.6
mA
Charge pump block
Charge pump output voltage
V
Regulator block
5V regulator voltage
VVREG
4.75
5
5.25
V
1.2
2

Output on resistance
Sum of high-/low-side output transistor on
Ron (H+L)
IO = 0.7A, VCC = 12V, VG = 17V
resistance
Startup oscillator (OSC) pin
OSC pin charge current
IOSCC
-2.5
A
OSC pin discharge current
IOSCD
2.5
A
PWM input (PWMIN) pin
High-level input voltage range
VPWMINH
2.3
VREG
V
Low-level input voltage range
VPWMINL
0
1
V
Range of PWM input frequency
fPWMIN
15
60
kHz
2.3
VREG
V
0
1
V
Forward/reverse switching pin
High-level input voltage range
VFRH
Order of current application :
UOUTVOUTWOUT
Low-level input voltage range
VFRL
Order of current application :
UOUTWOUTVOUT
Continued on next page.
3/27
LV8805SV Application Note
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
FG and RD output pins
FG output pin low-level voltage
VFG
When IO is 2mA
FG output pin leak voltage
ILFG
When VFG is 16V
0.25
RD output pin low-level voltage
VRD
When IO is 2mA
RD output pin leak voltage
ILRD
When VRD is 16V
0.25
VRF
Limit current set to 1A when RF is 0.25.
0.35
V
1
A
0.35
V
1
A
V
Current limiter circuit
Limiter voltage
0.225
0.25
0.275
Constraint protection circuit
CT pin high-level voltage
VCTH
2.25
2.8
2.95
V
CT pin low-level voltage
VCTL
0.43
0.5
0.65
V
CT pin charge current
ICTC
-2.9
-2.5
-2.1
A
CT pin discharge current
ICTD
0.21
0.25
0.32
A
ICT charge/discharge ratio
RCT
7
10
13
Soft start circuit
Soft start releasing voltage
VSOFTST
2.5
V
SOFTST pin charge current
ISOFTST
0.6
A
Thermal protection circuit
Thermal protection circuit operating
TSD
Design target *
150
180
210
C
temperature
*Design target value and no measurement is made. The thermal protection circuit is incorporated to protect the IC from burnout or thermal destruction.
Since it operates outside the IC's guaranteed operating range, the customer's thermal design should be performed so that the thermal protection circuit will not
be activated when the fan is running under normal operating conditions.
Pd max - Ta
Allowable power dissipation, Pd max - W
1.2
1.0
0.8
0.95
Thermal resistance
evaluation board :
76.1 × 114.3 × 1.6mm3
glass epoxy
Thermal resistance
evaluation board
0.6
0.42
0.4
Independent IC
0.30
0.2
0.13
0
- 30
0
30
60
90
120
Ambient temperature, Ta - C
4/27
LV8805SV Application Note
5.25
4
VREG[V]
ICC[mA]
3.5
3
5
2.5
4.75
2
6
8
10
12
14
VCC[V]
Figure 1 Ciurcuit consumption cueernt
vs Supply voltage
‐40
16
5.25
‐30
‐20
‐10
Temperature[℃]
Figure 2 VREG pin output voltage
vs Temperature
High level threshold voltage
hysteresis width
0
Low level threshold voltage
2.5
5
1.5
PWM[V]
VREG[V]
2
1
0.5
4.75
0
2.5
5
7.5
10
12.5
load current[mA]
Figure 3 VREG pin output voltage
vs load current
High level threshold voltage
0
15
6
Low level threshold voltage
8
10
12
14
VCC[V]
Figure 4 PWM pin output voltage
vs VCC
16
1
hysteresis width
3
FG L‐level[V]
PWM[V]
2.5
2
1.5
1
0.75
0.5
0.25
0.5
0
0
‐40
‐30
‐20
‐10
Temperature[℃]
Figure 5 PWM pin output voltage
vs Temperature
0
0
1
2
3
4
Io[mA]
Figure 6 FG Low level voltage
vs output current(Io)
5
5/27
LV8805SV Application Note
1.25
High level threshold voltage
hysteresis width
Low level threshold voltage
2
1
1.5
0.75
UH+VL
VH+WL
UH+WL
WH+UL
FR[V]
Ron[Ω]
2.5
VH+UL
WH+VL
1
0.5
0.5
0
0
0.2
0.4
0.6
0.8
Io[A]
Figure 7 output on resistance
vs output current (Io)
1
1.2
6
8
10
12
14
VCC[V]
Figure 8 FR pin Hi‐Lo level threshold voltage
vs VCC
16
limiter voltage[V]
0.275
0.25
0.225
6
8
10
12
14
VCC[V]
Figure 9 RF pin limiter voltage
vs VCC
16
6/27
LV8805SV Application Note
Pin Function
Pin No.
1
Pin name
FG
Function
Equivalent circuit
FG pulse output. This pin outputs a Hall
1
2
sensor system equivalent pulse signal.
2
RD
Motor lockup detection output.
Output is fixed high when motor is locked up.
3
CT
VREG
Motor lockup detection time setting.
When the motor lockup condition is detected,
the protection time period before the
protection circuit is activated is set by
connecting a cacacitor between this pin and
ground.
3
4
OSC
Motor startup frequency setting. A capacitor
VREG
must be connected between this pin and
ground. The startup frequency is adjusted by
controlling the charge/discharge current and
capacitance of the capacitor.
5
GND
GND pin
6
VG
Charge pump step-up voltage output.
4
7
pin and the VCC pin or ground.
7
CP
Charge pump step-up pulse output pin.
8
VCC
A capacitor must be connected between this
VREG
6
A capacitor must be connected between this
pin and the CPC pin (pin 8).
8
CPC
Charge pump step-up pin.
A capacitor must be connected between this
pin and the CP pin (pin 7).
13
VCC
Power supply for the IC and motor.
13
Capacitors must be connected between
these pins and ground.
12
UO
Output pins. Connect these pins to the U, V,
11
VO
and W of the motor coil.
10
WO
9
RF
Output current detection pins. The drive
12
11
10
9
current is detected by connecting a resistor
between these pins and ground.
Continued on next page.
7/27
LV8805SV Application Note
Continued from preceding page.
15
COMIN
Function
Motor middle point connection.
Equivalent circuit
VG
UO VO WO
Motor position detection comparator filter
pin. A capacitor must be connected between
this pin and the FIL pin (pin 16).
16
FIL
Motor position detection comparator filter
50k‰
COM
50k‰
Pin name
14
50k‰
Pin No.
14
pin. A capacitor must be connected between
this pin and the COMIN pin (pin 15).
17
VREG
15 16
VCC
Regulator voltage (5V) output.
A capacitor must be connected between
these pins and ground.
17
VREF
18
F/R
Motor rotation direction switching. A
VREG
high-level input causes current to flow into
Reverse signal
the motor in the order of U, V, and W and a
low-level input in the order of U, W, and V.
Changing the order of current application
Forward/reverse
switching signal
18
turns the motor in the opposite direction.
Forward signal
19
PWMIN
PWM signal input pin.
VREG
"H" The output transistor is turned on by the
level voltage input. "L" The output transistor
is turned off by the level voltage input, and
the motor stops. The speed of the motor is
controlled by controlling Duty of the input
19
signal. When the pin opens, the motor
becomes all velocities.
20
SOFTST
Soft start time setting.
VREG
The motor can be started smoothly by
connecting a capacitor between this pin and
ground.
20
8/27
LV8805SV Application Note
1. Operation overview
LV8805 is a PWM three-phase sensor less motor driver.
In the sensor less drive, the timing of motor commutation switch is determined by comparing back EMF signal
generated from a motor and the voltage of CON pin (motor middle point voltage).
After power activation, supply any PWM signal input to PWMIN pin to impress output voltage to the motor coil.
 The FG signal of the frequency is output according to motor rotation.
 RD Output is fixed high when motor is locked up and it is fixed low while motor is driving.
 Speed of motor rotation is controllable by changing PWM signal input voltage of PWMIN pin.
 Motor can start up slowly by connecting a capacitance between SOFTST pin and GND pin.
 Motor locking time is settable by connecting a capacitance between CT pin-GND.
Soft-switch area
9/27
LV8805SV Application Note
Output waveform
Full speed drive (PWM100%)
The waveform of output voltage of UOUT pin and FG pin are as follows. This graph shows the waveform when
motor drives at full speed.
The waveform of output voltage for UOUT, VOUT and WOUT are the same.
UOUT 5V/div
2ms/div
Soft-switching area
UOUT 5V/div
UOUT 5V/div
50us/div
UOUT 5V/div
20us/div
UOUT 5V/div
50us/div
20us/div
There are soft switching zone in UOUT signal. Soft switching smoothes out a motor coil current and enables
silent drive.
PWM drive
UOUT 10V/div
2ms/div
The waveform of output voltage of UOUT pin and FG pin are as shown above. This is when the speed of motor
is controlled by PWM.
PWM area
UOUT 10V/div
2ms/div
There are soft switching zones and PWM zones in UOUT signal.
10/27
LV8805SV Application Note
2. Sensor less control
LV8805 is a sensorless motor driver which detects back EMF signal during motor rotation to detect a rotor
position. According to a detected rotor position, a specified output transistor turns on or off, which enables
motor rotation.
When starting up a motor, it is impossible to detect the rotor position because back EMF signal is not generated.
Therefore, motor starts up by turning on and off a specified output transistor by an oscillation frequency defined
by a capacitor between OSC pin and GND pin (startup mode). Then after the startup, a rotor position is
detected by back EMF signal (driving mode).
Principle for Motor starting operation
1) Start up mode  2) Driving mode
Switching pattern of output transistor when the motor start up
1
2
3
4
5
6
Phase‐U
Phase‐V
Phase‐W
Phase‐U
Detective
point
Phase‐W
Detective
point
Phase‐V
Detective
point
Phase‐U
Detective
point
Phase‐W
Detective
point
Phase‐V
Detective
point
*M:outputTrOFFH:upperoutputTrONL:loweroutputTrON
In the above figure, UOUT is OFF (Middle), VOUT turns on lower output Tr (Low) and WOUT turn on upper
output Tr (High). The back EMF signal of motor coil is detected by comparing back EMF signal of UOUT and
voltage of COM pin (motor middle point). And output energization pattern is changed as follows:
234561.
If the back EMF signal of motor coil cannot be detected after pattern “1”, output transistor moves on to the next
pattern “2” at the switching timing defined by a capacitor between OSC pin and GND pin. If back EMF signal of
motor coil is detected at WOUT, output energization pattern changes to “345612”.
The timing when the change of output energization takes place varies depends on motor types.
Hence it is necessary to set up an optimum OSC capacitor for the motor. (Refer to “Start up pin setting”)
11/27
LV8805SV Application Note
3.1 How to set pin
Startup pin
In order to adjust startup characteristics of a motor, it is necessary to set OSC pin (OSC-GND capacitor) and
COMIN pin FIL pin (COMIN-FIL capacitor) with optimal capacitances.
The best capacitance depends on motor and condition (power supply, coil current, number of rotation). Hence
be sure to make an adjustment to each motor to find an optimal capacitance.
3.1.1 OSC-GND capacitance setup
(Recommendation value 470pF - 4700pF)
Startup frequency is defined by OSC capacitance.
The output energizing pattern is changed at the time of startup by the 1/134 of OSC frequency.
OSC frequency is determined by repeating charge and discharge to OSC capacitor.
The formula for obtaining OSC frequency is as follows.
Fosc =
Toscc =
Toscd =
1
Toscc+Toscd
(Vosch-Voscｌ)×Cosc
Ioscc
(Vosch-Voscｌ)×Cosc
Ioscd
OSC pin frequency: fosc
OSC capacitor charge time: Toscc
OSC capacitor discharge time: Toscd
OSC capacitance: Cosc
OSC pin high-level voltage: Vosch=1.1V(TYP)
OSC pin low-level voltage: Voscl=0.6V(TYP)
OSC pin charge current: Ioscc
OSC pin discharge current: Ioscd
In general, low OSC capacitance tends to be used if a usage motor runs at a high speed. And high OSC
capacitance is used if a usage motor runs at low speed.
 When a capacitance is high and:
- Startup is slow and fails.
- Startup time varies widely.
Example) fan motor startup test of LV8805
Condition:
Vcc=12V
Goal number of revolutions=4500 rpm*
COMIN-FIL capacitance =2200 pF
Test count=100 times
WhenacapacitanceofCOSisnotoptimum:
OSC capacitance=1500 pF
SOFTST capacitance =1 uF
WhenacapacitanceofCOSisoptimum:
COScapacitance=1500pF
80
69
70
N[times ]
25
20
50
40
30
21
20
0
1.66-1.68
1
1.64-1.66
1.62-1.64
1.60-1.62
1.58-1.60
Fig.Startup test of a fan motor using LV8805
starting time[sec]
6
4
1.56-1.58
1
1.54-1.56
0
0
1.52-1.54
0
1.66-1.68
10
0
1.64-1.66
2
1.62-1.64
1.60-1.62
4
1.58-1.60
0
1.56-1.58
0
1.54-1.56
10
1.52-1.54
N[times]
40
0
3σ=0.0611277
average time=1.58371
60
50
30
67
70
3σ=0.0307372
average time=1.57888
60
COScapacitance=3300pF
80
starting time[sec]
◎ If such behavior is witnessed, use a lower capacitor instead.
*referto“8.RelationbetweenFGfrequencyandnumberofrotation”
12/27
LV8805SV Application Note
 When a capacitance is low and:
- Startup fails.
- Beat lock* occurs.
500us/div
FG 5V/div
IOUT 0.5A/div
UOUT 10V/div
Fig.Theoutputwaveformwithbeatlock
◎ If such behavior is witnessed, use a higher capacitor.
Select a capacitance values that allows the shortest possible startup time to achieve target speed and minimal
variations in startup time.
The optimum OSC constant depends on the motor characteristics and startup current, so be sure to recheck
them when either motor or circuit specifications is changed.
(* Refer to “3.3 Beat lock”)
3.1.2 COMIN-FIL capacitance setting
(Recommendation value: 1000 ~ 10000pF)
Compare the back EMF signal from motor and the voltage of CON pin (motor middle point voltage) to detect
the rotor position. The switch timing of motor commutation is determined according to the detected rotor
position. Based on the information, energization timing of motor is determined.
Insert a filter capacitor between the COMIN pin and FIL pin to prevent startup failure caused by noise.
 When a capacitance is high and:
- The timing of output energization is slow during motor rotation.  Driving efficiency falls.
1ms/div
The width of this zone
fluctuates.
UOUT 10V/div
Repeat
The waveform of motor
current is distorted.
IOUT 0.5A/div
Fig.normalwaveform
Fig. waveformwhenFIL‐COMINcapacitanceistoolarge.
◎ If such behavior is witnessed, use a lower capacitor instead.

When a capacitance is low and:
- Beat lock* occurs.
- If the capacitor is connected to CT pin, it is hard to switch to Lock protection ** mode.
◎ If such behavior is witnessed, use a higher capacitor instead.
A capacitor is selected by checking a usage motor. Run the motor to see whether there is any issue with
startup.
(* Refer to 3.2 Beat lock on next page.)
(** Refer to 3.3 CT pin setup.)
13/27
LV8805SV Application Note
3.2 Beat lock
Beat lock may occur when a motor is stopped abruptly during motor operation or OSC capacitor is too low.
Output waveform under the influence of beat lock is as shown below.
2ms/div
500us/div
FG 5V/div
FG 5V/div
IOUT 0.5A/div
UOUT 10V/div
IOUT 0.5A/div
Beat lock
Motor stop
Fig. The beat lock caused by a motor quick stop
UOUT 10V/div
Fig. The beat lock weave form.
{Behavior}
 There is intense switching sound from transistor and then the motor stops.
 Waveform of OUT pin and FG pin shows the influence of noise.
 Motor cannot restart automatically after motor rotation stops.
Countermeasures:
1) False detection of the internal comparator is prevented by adjusting a capacitor between COMIN and FIL.
Basically, the number of false detection by the internal comparator decreases with a higher capacitor between
COMIN and FIL.
However, care must be taken for the adjustment since excessively high capacitance will give rise to
deterioration in efficiency and delays in the output power-on timing while the motor is running at high speed.
2) Increase the OSC capacitance. By doing so, OSC frequency decreases, which prevents false detection by
the internal comparator due to delay in the output power-on timing. Consequently, beat lock is prevented.
3) Connect a resistor between COMIN pin and GND pin. By doing so, offset is added to the zero-cross
detection comparator. This addition of offset decreases the false detection by the comparator.
As a result, beat lock is prevented.
Offset voltage is obtained by the following formula:
(The resistance between COM and COMIN is about 10kohm, which is determined by the internal circuit.)
Example: VCC=12V, The resistance between COMIN and GND =1M ohm
Approximately 60 mV of offset voltage is generated.
Recommended value of the resistance is approximately 1Mohm.
If a usage motor is replaced, please check the motor startup behavior again.
14/27
LV8805SV Application Note
3.3 CT pin setting
Output transistors are turned off when the motor is stopped by some external factors. (Lock protection)
Motor
VCTH
CT pin
voltage
VCTL
Detecting time Lock protection ON time
OSC oscillate 138 cikle
Charging time
Start-up mode
Driving mode
Start charging
CT-GND capacitor
Lock protection OFF time
Discharging time
Lock protection mode
Start-up mode Driving mode
CT pin voltages reach Vctl and change start-up mode.
Then turn on output transistor and the motor restart.
Start chargingCT-GND capacitor.
CT pin voltages reach Vcth and
change lock protection mode.
Then turn off output transistor and
start discharging CT-GND capacitor.
CT-GND capacitor is charged during
starting mode.
CT-GND capacitance force into
discharge when change to drive mode
before CT pin voltages reach Vcth.
In case of keeping on motor lock, CT
pin voltages reach Vcth and change to
lock protection mode.
Lock protection ON/OFF time is set by capacitor connected between CT pin and GND pin.
Lock protection ON time is the time between the start of charge for CT-GND capacitor by CT pin charge current
and at the point where CT pin obtains high-level voltage (2.8Vtyp).
Lock protection OFF time is the time between the start of discharge for CT-GND capacitor by CT pin discharge
current and at the point where CT pin obtains low-level voltage (0.5Vtyp).
Recommended capacitance for CT pin is 0.47uF-1uF.
Lock protection time is calculated by the following formula.
Loc protection on time: Tlon
Loc protection off time: Tloff
CT pin high-level voltage: Vcth
CT pin low-level voltage: Vctl
CT pin capacitance: Cct
CT pin charge current: Ictc
CT pin discharge current: Ictd
When the power is ON or CTL pin is set from OFF to driving mode, IC always start from startup mode. Startup
can fail if the motor does not start up before “lock protect on time”.
The timing depends on the relation of startup between the IC and motors. Hence it is necessary to check the
startup behavior of usage motors. If CT pin is unused, connect this pin to GND.
15/27
LV8805SV Application Note
3.4 SOFTST pin setting
TIME
Fig. Timing chart of SOFTST pin.
Fig. Block diagram of SOFTST pin.
As soon as the capacitor connected to SOFTST pin is charged, the voltage of SOFTST pin increases.
And SOFTST operation continues until the voltage of SOFTST pin reach to the point of “soft start cancel
voltage” (2.5Vtyp). The soft start time is adjustable by changing capacitor connected between SOFTST pin and
GND.
During soft start operation where the voltage of SOFTST is lower than “soft start releasing voltage”; current
limit drive is performed by the limit current obtained by the following formula.
From the above formula we know that current limit value increases along with the voltage increase of SOFTST
pin.
Motor rotation increases slowly because sharp current increase when starting up motor is under control.
Recommended capacitance of SOFTST pin is 0.47uF-1uF.
Softstart time is obtained by the following formula:
Softstart time: Tsoft
Softstart releasing voltage: Vsoft=2.5V (TYP)
SOFTST pin capacitance:Csoft
SOFTST pin charge current: Isoft=0.6uA (TYP)
Note that if SOFTST pin capacitance is too high, the starting torque of motor is insufficient since the increase of
motor current is moderate. As a result, lock protection may operate before the startup of motor. Therefore, it is
necessary to check the optimum capacitance with a usage motor.
Connect pull-up resistor to VREG pin when SOFTST pin is unused.
Pull-up resistor should be approximately 10kohm (Recommended value).
16/27
LV8805SV Application Note
3.5 Operating principle of charge pump and how to select a capacitor for VG pin and a capacitor
between CP pin and CPC pin
Charge pump is a circuit which generates voltage to drive output transistors in LV8805.
LV8805 is a sensor-less motor driver which detects back EMF signal during motor rotation to determine a rotor
position and runs the motor.
Back EMF from motor is detected by the internal comparator whose power source is the charge pump.
The operation principle of charge pump is as follows.
0V
VREG
CP
VCC
VREG VREG+VCC
VREG
CPC
repeat
VCC
CP
CPC
VCC
VG
Fig. １
VG
Fig. ２
First, the transistors in red circles in Fig. 1 turn on. Then the capacitor between CP pin and CPC pin is charged
and the voltage of CP pin turns 0V and CPC pin turns Vcc voltage, respectively.
Second, the transistors in red circles in Fig. 2 turn on. Then the electric charge in the capacitor between CP pin
and CPC pin transfers to VG pin. Since the voltage of CP pin becomes VREG voltage, the voltage of CPC pin
and GV pin is as follows: VREG voltage + Vcc voltage.
Last, through repeating the operations of Fig. 1 and Fig. 2, VG pin voltage increases and stabilizes at VREG
voltage+ Vcc voltage.
Actually, VG voltage is a little lower than VREG voltage+ Vcc voltage since efficiency is not 100% and there is
internal power consumption.
The function of capacitor between VG pin and VCC pin is to retain electric charge and to stabilize voltage.
(The capacitor connected to VG pin has the same function even when it is connected to GND.
The only difference is whether the initial voltage of VG pin is either GND or Vcc.)
When the capacitor between CP pin and CPC pin or VG pin is too low, voltage of VG pin decreases since
power supply cannot catch up with the power consumption by circuits.
Therefore, the minimum VG pin voltage should be above Vcc+4V.
Also make sure that no ripple of voltage is observed in VG pin through checking oscilloscope when the IC is in
operation.
Recommended capacitances of Charge pump are as follows:
The capacitance between CP pin and CPC pin: 0.033uF-0.1uF
The capacitance between VG pin and VCC pin: 0.1uF ~ above 0.22uF
The capacitors should be in the following relation:
The capacitance between CP pin and CPC pin ≤ The capacitance between VG pin and VCC pin
3.6 input signal condition of PWMIN pin
LV8805 is a direct PWM signal input system for speed control.
Recommendation Condition
High-level input voltage :
0 [V]
Low-level input voltage :
5 [V]
PWM frequency range :
20k-50k [Hz]
*Caution: The minimum pulse width of PWM signal is 0.2u [sec] (= duty of 1% at 50k [Hz])
17/27
LV8805SV Application Note
4. Other protection circuits
4.1 Current limier
Current limiter is configured by adjusting the resistance between RF and GND.
When the pin voltage exceeds 0.25V, the current is limited, and regeneration mode is set. In the application
circuit, the current limit setting voltage is 0.25V; therefore the current limit operates at 1A.
The calculation formula is given below.
RF resistance = 0.25V/target current limit value
Current limit driving
OUT 10V/div
FG 5V/div
IOUT 0.2A/div
Red-circled IOUT is the current limited area.
4.2 Thermal protection circuit
LV8805 integrates thermal protection circuit. When Junction temperature, Tj exceeds 180oC, output transistor
turns off.
18/27
LV8805SV Application Note
5. Application Circuit Example
LV8805SV parts list
R1
0.25 ohm
C1
10uF/25V
R2
1K ohm
C2
0.1uF
R3
10K ohm
C3
0.1uF
R4
1K ohm
C4
1uF
R5
10K ohm
C5
1uF
R6
1K ohm
C7
1000pF
C8
0.01uF
C9
1uF
*This application circuit is only for example.
Please use this as reference when you design circuit for the first time.
19/27
LV8805SV Application Note
6. Caution for the usage of evaluation board
Parts that require connection as close as possible to the IC
 C1 (capacitor between Vcc-GND)
GND line pattern
 C2 (capacitor between VG-Vcc)
 C3 (capacitor between CP-CPC)
 C4 (capacitor between VREG-GND)
 C7 (capacitor between OSC-GND)
 C8 (capacitor between COMIN-FIL)
Thick line (high current line )
 Vcc, GND, UO, VO, WO, RF
(*1) Reverse connection protection diode (D1): This diode protects reverse connection.
Insert a diode between power supply and VCC pin to protect the IC from destruction due to reverse
connection. Connection of this diode is not necessary required.
(*2) LV8805 uses synchronous rectification for high efficiency drive. Synchronous rectification is effective for
cutting heat and higher efficiency. However, it may increase supply voltage.
If the supply voltage shall increase, make sure that it does not exceed the maximum ratings by inserting a
zener diode (D2) between power supply and GND.
(*3) The pins must be short-circuited on the print pattern.
 GND pins (5pin)
 VCC pins (13pin)
 VREG pins (17pin)
 RF pins (9pin)
(*4) VREG pins (17pin) are the control system power supply pin and regulator output pin, which create the
power supply of the control unit. Be sure to connect a capacitor between this pin and GND in order to
stabilize control system operation.
Since these pins are used to supply current for control and generate the charge pump voltage, connect a
higher capacitor than the capacitor connected to the charge pump.
(*5) Pin protection resistor (R2, R4, R6): It is recommended that resistors higher than 1k ohm are connected
serially to protect pins against misconnection such as GND open and reverse connection.
Parts name and recommended value
Parts No.
name
C1
Vcc-GND
C2
VG-Vcc(GND)
C3
CP-CPC
C4
VREG-GND
C5
CT-GND
C7
OSC-GND
C8
COMIN-FIL
C9
SOFTST-GND
R1
RF resistance
R2 R4 R6
Pin protection resistor
R3 R5
Pull-up resistance
Recommended value
Over 10uF
Over 0.1uF
0.033uF(about 1/3 of C2)
Above 1uF(larger than C2,C3)
0.47uF~1uF
470~4700pF
1000~10000pF
0.47uF~1uF
Above 0.25ohm(current limit=1A)
1k ohm (about 1/10 of R3,R5)
10k ohm
20/27
LV8805SV Application Note
7. Relation of thermal resistance
How to measure Tj
The surface temperature of IC is obtained from Tj of IC as follows:
In order to obtain a surface temperature of IC from a junction temperature of IC, a thermal resistance between
junction part and case: θjc [°C/W] are required.
θjc is a thermal increase per power dissipation.
The calculation of θjc is quite difficult, so it should be obtained through measurement.
Jθjc of SSOP-20 package is 27°C/W when measured with independent IC, 17°C/W: with the glass epoxy board
(size:76.1×114.3×1.6tmm)
The difference between the surface temperature of IC and junction temperature is obtained as follows:
Tj[°C] - Tc[°C]=Pd[W]×θjc[°C/W]
Tj: Junction temperature
Tc: Case temperature
Pd: Power dissipation of the IC
θjc: Thermal resistance between junction part and case
An approximate “Pd” value can be obtained by the following formula:
Pd = Vcc×Icc + Ron × Im2 Vcc: power supply
Icc: circuit current by VCC
Ron: Sum of the low and high side output transistor ON resistance
Im: Current of motor drive
Where VCC=12V, ICC=4mA, Ron=2 ohm and Im=0.5A, Pd is obtained as follows:
12V × 4mA + 2 ohm × 0.5A × 0.5A = 548mW
When measured with independent IC without a board, Tj - Tc is 13.15°C.
* Caution
θjc is dependent on a board. Hence it is recommended to measure θjc with a usage board.
8. Relation between FG frequency and number of rotation
The relation between FG frequency (FG), number of motor rotations (N[rpm]) and pole number of motor
magnetic (p) is as follows:
Based on the formula, number of motor rotations is obtainable from FG frequency.
Example) Where FG frequency=200Hz and pole number=4,
The maximum number of motor rotation controllable by LV8805 is:
Maximum
For example, the maximum number of motor rotation is approximately 15.6 k rpm when pole number is 4.
Make sure to use this device within this range of motor rotation.
21/27
LV8805SV Application Note
9. Evaluation board manual
Oscilloscope
CURRENT PROBE
AMPLIFIER1
PROBE
INPUT
OUTPUT
FAN Motor
Function generator
Power supply
Table: Required Equipment
Equipment
Power supply
Function generater
Oscilloscope
Current probe
LV8805SV Evaluation Board
Motor
Efficiency
12V-1A
PWM 0-5V /20-50kHz
4 channel
12V-3W
22/27
LV8805SV Application Note
Test Procedure:
1. Connect the test setup as shown above.
2. Initial check
Boot up at the VCC = 12V.
PWMIN=5V (PWM 100%)
Confirm that the motor rotates smoothly and in the right direction.
Switch the FR switch when the motor rotation direction is different.
3. Booting check (StartUp-mode)
Check whether a booting of a motor is stable. (Booting)
Boot up at the VCC = 6V and 12V.
When PWM input vary from 0% to 100%, check the change in the motor rotation speed.
And then, at each VCC and PWM signal check whether a motor boots 100 times in 100times.
Check the some waveforms. (Booting waveforms)
Boot up at the VCC =12V.
Check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex) These waveforms are different by each motor.
StartUp-mode
T=0.5s/div
UO
5V/div
FG
5V/div
Current
of UO
1A/div
Turn on the power supply
4. Normal rotation check (Regular-Rotation-mode)
Check the some waveforms. (Rotation waveforms)
Supply the VCC=12V. PWMIN=5V(PWM 100%)
Check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex) These waveforms are different by each motor.
Regular-Rotation-mode
T=2ms/div
UO
5V/div
FG
5V/div
Current
of UO
1A/div
23/27
LV8805SV Application Note
5. Lock detection check (Motor-Lock-mode)
Check the Lock detection behavior. (Lock)
Supply the VCC=12V. PWMIN=5V (PWM 100%)
Check if the signal of WO, VO and UO is off when Motor is stopped manually.
Then, check the WO, VO and FG voltage waveform at scope CH1, CH2 and CH3, and the output current
waveform of WO at scope CH4 by the Oscilloscope.
ex) These waveforms are different by each motor.
Motor-Lock-mode
T=0.5s/div
UO
5V/div
FG
5V/div
RD
5V/div
Current
of UO
1A/div
The Motor is stopped
6. Checking result
A sample of checking result is shown below.
VCC
12V
6V
CTL voltage
0V
1.5V
2.5V
0V
1.5V
2.5V
Booting
100/100
100/100
100/100
100/100
100/100
100/100
Rotation speed (rpm)
OK
OK
OK
OK
OK
OK
Rotation waveforms
OK
OK
OK
OK
OK
OK
Io
value
value
value
value
value
value
Lock
OK
OK
OK
OK
OK
OK
24/27
LV8805SV Application Note
Evaluation board circuit diagram
Bill of Materials for LV8805SV Evaluation Board
Designator
IC1
Quantity
Description
Value
Tolerance
Footprint
Manufacturer
Manufacturer Part
Number
Substitution
Allowed
Lead Free
SSOP20J
(225mil)
ON
Semiconductor
sany o
LV8805SV
No
y es
1
Motor Driv er
10µF 25V
±10%
murata
GRM32DR71E106KA12
y es
y es
1µF
±10%
murata
GRM21BR11E105KA99
y es
y es
murata
GRM188R11E104KA01D
C1
1
VCC By pass
capacitor
C4,C5,C9
3
capacitor
C2,C3
2
capacitor
0.1µF
±10%
y es
y es
C7
1
capacitor
1000pF
±10%
murata
GRM188R11E102KA01
y es
y es
C8
1
capacitor
0.01µF
±10%
murata
GRM2192C1H103JA01D
y es
y es
R1
4
resistor
1ohm
±5%
rohm
MCR10EZHFL1R00
y es
y es
R2,R4,R6
3
resistor
1kohm
±5%
rohm
RK73B1JT102J
y es
y es
R3,R5
2
resistor
10kohm
±5%
rohm
RK73B1JT103J
y es
y es
SW1-SW4
1
Switch
MIY AMA
MS-621-A01
y es
y es
TP1-TP12
9
Test points
MAC8
ST-1-3
y es
y es
zener diode
ON on
Semiconductor
semiconductor
1SMA5930BT3G
Y es
y es
D2
1
25/27
LV8805SV Application Note
Evaluation Board PCB Design
50mm
50mm
50mm
(Top side/ Pattern)
(Back side/ Pattern)
(Top side/ Resist&Silk)
(Top side/ Resist&Silk)
Allowable power disspation Pdmax_W
2.0
Specified circuit board :
50 x 50 x 1.6 mm3 Two layer glass epoxy board 1.45
1.0
0.64
0.0
-40
-20
0
20
40
60
80
100
120
Amblent temperatur, Ｔａ_℃
Pdmax - Ta
26/27
LV8805SV Application Note
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