REVISIONS LTR DESCRIPTION A Extended the temperature range from -55°C to +125°C. - phn DATE APPROVED 14-05-05 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 12-10-09 APPROVED BY Thomas M. Hess CODE IDENT. NO. A REV 5 6 7 8 9 10 11 12 13 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil/ TITLE Phu H. Nguyen SIZE AMSC N/A 4 MICROCIRCUIT, DUAL CHANNEL DIGITAL ISOLATOR, MONOLITHIC SILICON DWG NO. V62/12630 16236 A PAGE 1 OF 13 5962-V070-14 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual channel digital isolator microcircuit, with an operating temperature range of -55°C to +125°C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/12630 - Drawing number 01 X B Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Device type Generic 01 Circuit function ADuM1200-EP Dual channel digital isolator 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 8 JEDEC MS-012-AA X Package style Small Outline Package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z DLA LAND AND MARITIME COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/12630 PAGE 2 1.3 Absolute maximum ratings. 1/ Supply voltage, (VDD1, VDD2) ................................................................... Input voltage, (VIA, VIB) ............................................................................ Output voltage, (VOA, VOB) ....................................................................... Average output current per pin (IO) .......................................................... Common mode transients (CML, CMH) .................................................... Ambient operating temperature, (TA) ....................................................... Storage temperature, (TST) ...................................................................... -0.5 V to +7.0 V 2/ -0.5 V to VDDI + 0.5 V 2/ 3/ -0.5 V to VDDO +0.5 V 2/ 3/ -11 mA to +11 mA 4/ -100 kV/µs to +100 kV/µs 5/ -55°C to +125°C -55°C to 150°C 1.4 Recommended operating conditions. Supply voltage, (VDD1, VDD2) ................................................................... 3.0 V to 5.5 V Input signal rise and fall times ................................................................. 1.0 ms Operating temperature, (TA) .................................................................... -55°C to +125°C 1.5 Package characteristics. Resistance (Input to output), RI-O ............................................................. Capacitance (Input to output) CI-O ........................................................... Input capacitance, CI ............................................................................... Junction to case thermal resistance,(Side 1) θJCI .................................... Junction to case thermal resistance,(Side 2) θJCO ................................... 2/ 10 Ω 6/ 1.0 pF (at f = 1 MHz) 4.0 pF 46 °C/W 7/ 41 °C/W 12 2. APPLICABLE DOCUMENTS JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201.) 1/ 2/ 3/ 4/ 5/ 6/ 7/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. All voltages are relative to their respective ground. VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. See FIGURE 6 for maximum rated current values for various temperatures. Refers to common mode transients exceeding the absolute maximum ratings can cause latch up or permanent damage. The device is considered a 2-terminal device; Pin1, Pin2, Pin3, and Pin4 are shorted together, and Pin5, Pin6, Pin7, and Pin8 are shorted together. Thermocouple located at center of package underside. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/12630 PAGE 3 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Terminal function. The terminal function shall be as shown in figure 3. 3.5.4 Truth table. The truth table shall be as shown in figure 4. 3.5.5 Functional block diagram. The functional block diagram shall be as shown in figure 5. 3.5.6 Thermal derating curve. The thermal derating curve shall be as shown in figure 6. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol DC specifications Input supply current per channel, quiescent Output supply current per channel, quiescent Total supply current, two channels 3/ DC to 2 Mbps VDD1 supply current VDD2 supply current 10 Mbps VDD1 supply current VDD2 supply current 25 Mbps VDD1 supply current VDD2 supply current Input currents Logic high input threshold Logic low input threshold Max 0.50 0.19 0.60 0.30 1.1 0.5 1.4 0.8 IDD1(Q) IDD2(Q) 5/ 5/ 4.3 1.3 5.5 2.0 IDD1(Q) IDD2(Q) IIA, IIB VIH VIL 6/ 6/ 10 2.8 +0.01 13 3.4 +10 VOAL, VOBL -10 0.7 x 7/ IOX = -20 µA, VIX = VIXH IOX = -20 µA, VIX = VIXH IOX = 20 µA, VIX = VIXL IOX = 400 µA, VIX = VIXL IOX = 4 mA, VIX = VIXL 7/ - 0.1 7/ - 0.5 25 20 tPHL, tPLH PWD tPSK tPSKCD/tPSKOD tR/tF |CMH| |CML| mA mA mA µA V 0.3 x 7/ PW 13/ Typ 4/ 4/ Logic low output voltages Refresh rate Dynamic supply current per channel Input Output Min Unit IDD1(Q) IDD2(Q) VOAH, VOBH Logic low output Limits IDDI(Q) IDDO(Q) Logic high output voltages Switching specifications Minimum pulse width 8/ Maximum data rate 9/ Propagation delay 10/ Pulse width distortion, |tPLH – tPHL| 10/ Propagation delay skew 11/ Channel to channel matching 12/ Output rise/fall time (10% to 90%) Common mode transient immunity Logic high output 13/ Test conditions 4.5 V ≤ VDD1 ≤ 5.5 V 4.5 V ≤ VDD2 ≤ 5.5 V 2/ 5 V OPERATIONS 5.0 4.8 0.0 0.04 0.2 20 50 0.1 0.1 0.4 40 45 3 15 3 ns Mbps ns 2.5 VIX = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V VIX = 0 V, VCM = 1000 V, transient magnitude = 800 V 25 35 25 35 kV/µs fr 1.2 Mbps IDDI(D) IDDO(D) 0.19 0.05 mA/Mbps 14/ See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 5 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol DC specifications Input supply current per channel, quiescent Output supply current per channel, quiescent Total supply current, two channels 3/ DC to 2 Mbps VDD1 supply current VDD2 supply current 10 Mbps VDD1 supply current VDD2 supply current 25 Mbps VDD1 supply current VDD2 supply current Input currents Logic high input threshold Logic low input threshold Max 0.26 0.11 0.35 0.20 0.6 0.2 1.0 0.6 IDD1(Q) IDD2(Q) 5/ 5/ 2.2 0.7 3.4 1.1 IDD1(Q) IDD2(Q) IIA, IIB VIH VIL 6/ 6/ 5.2 1.5 +0.01 7.7 2.0 +10 VOAL, VOBL -10 0.7 x 7/ 7/ - 0.1 7/ - 0.5 25 20 tPHL, tPLH PWD tPSK tPSKCD/tPSKOD tR/tF |CMH| |CML| mA mA mA µA V 0.3 x 7/ IOX = -20 µA, VIX = VIXH IOX = -20 µA, VIX = VIXH IOX = 20 µA, VIX = VIXL IOX = 400 µA, VIX = VIXL IOX = 4 mA, VIX = VIXL PW 13/ Typ 4/ 4/ Logic low output voltages Refresh rate Dynamic supply current per channel Input Output Min Unit IDD1(Q) IDD2(Q) VOAH, VOBH Logic low output Limits IDDI(Q) IDDO(Q) Logic high output voltages Switching specifications Minimum pulse width 8/ Maximum data rate 9/ Propagation delay 10/ Pulse width distortion, |tPLH – tPHL| 10/ Propagation delay skew 11/ Channel to channel matching 12/ Output rise/fall time (10% to 90%) Common mode transient immunity Logic high output 13/ Test conditions 2.7 V ≤ VDD1 ≤ 3.6 V 2.7 V ≤ VDD2 ≤ 3.6 V 15/ 3 V OPERATION 3.0 2.8 0.0 0.04 0.2 20 50 0.1 0.1 0.4 40 55 3 16 3 ns Mbps ns 2.5 VIX = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V VIX = 0 V, VCM = 1000 V, transient magnitude = 800 V 25 35 25 35 kV/µs fr 1.1 Mbps IDDI(D) IDDO(D) 0.10 0.03 mA/Mbps 14/ See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 6 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Limits Test conditions 16/ Min Unit Typ Max 0.50 0.26 0.6 0.35 0.11 0.19 0.20 0.25 MIXED 5V/3V or 3 V/5 V OPERATION DC specifications Input supply current per channel, quiescent 5 V/3 V operation 3 V/5 V operation Output supply current per channel, quiescent 5 V/3 V operation 3 V/5 V operation Total supply current, two channels 3/ DC to 2 Mbps VDD1 supply current 5 V/3 V operation 3 V/5 V operation VDD2 supply current 5 V/3 V operation 3 V/5 V operation 10 Mbps VDD1 supply current 5 V/3 V operation 3 V/5 V operation VDD2 supply current 5 V/3 V operation 3 V/5 V operation 25 Mbps VDD1 supply current 5 V/3 V operation 3 V/5 V operation VDD2 supply current 5 V/3 V operation 3 V/5 V operation Input currents Logic high input threshold Logic low input threshold IDDI(Q) mA IDDO(Q) mA mA IDD1(Q) 4/ 4/ 1.1 0.6 1.4 1.0 4/ 4/ 0.2 0.5 0.6 0.8 5/ 5/ 4.3 2.2 5.5 3.4 5/ 5/ 0.7 1.3 1.1 2.0 6/ 6/ 10 5.2 13 7.7 6/ 6/ 1.5 2.8 +0.01 2.0 3.4 +10 IDD2(Q) IDD1(Q) IDD2(Q) IDD1(Q) IDD2(Q) IIA, IIB VIH VIL Logic high output voltages VOAH, VOBH Logic low output voltages VOAL, VOBL -10 0.7 x 7/ µA V 0.3 x 7/ IOX = -20 µA, VIX = VIXH IOX = -20 µA, VIX = VIXH IOX = 20 µA, VIX = VIXL IOX = 400 µA, VIX = VIXL IOX = 4 mA, VIX = VIXL 7/ - 0.1 7/ - 0.5 3.0 2.8 0.0 0.04 0.2 0.1 0.1 0.4 See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 7 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Limits Test conditions 16/ Min Unit Typ Max 20 50 40 MIXED 5V/3V or 3 V/5 V OPERATION - Continued Switching specifications Minimum pulse width 8/ Maximum data rate 9/ Propagation delay 10/ Pulse width distortion, |tPLH – tPHL| 10/ Propagation delay skew 11/ Channel to channel matching 12/ Output rise/fall time (10% to 90%) 5 V/3 V operation 3 V/5 V operation Common mode transient immunity Logic high output 13/ Logic low output PW tPHL, tPLH PWD tPSK tPSKCD/tPSKOD tR/tF 50 3 15 3 ns Mbps ns 3.0 2.5 |CMH| |CML| 13/ Refresh rate 5 V/3 V operation 3 V/5 V operation Dynamic supply current per channel Input 5 V/3 V operation 3 V/5 V operation Output 5 V/3 V operation 3 V/5 V operation 25 20 VIX = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V VIX = 0 V, VCM = 1000 V, transient magnitude = 800 V 25 35 25 35 kV/µs fr Mbps 1.2 1.1 14/ IDDI(D) mA/Mbps 0.19 0.10 IDDO(D) 0.03 0.05 See footnote at end of table. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 8 TABLE I. Electrical performance characteristics - Continued. 1/ 1/ 2/ 3/ 4/ 5/ 6/ 7/ 8/ 9/ 10/ 11/ 12/ 13/ 14/ 15/ 16/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. All voltages are relative to their respective ground; all min/max specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. DC to 1 MHz logic signal frequency. 5 MHz logic signal frequency. 12.5 MHz logic signal frequency. (VDD1 or VDD2). The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. tPHL propagation delay is measure from 50% level of the falling edge of the VIX signal to the 50% level of the falling edge of the VOX signal . tPLH propagation delay is measure from 50% level of the rising edge of the VIX signal to the 50% level of the rising edge of the VOX signal. tPSK is the magnitude of the worst case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. Codirectional channel to channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel to channel matching is the absolute value on the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VOX > 0.8 VDD2. CML is the maximum common mode voltage slew rate that can be sustained while maintaining VOX < 0.8 V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges. The transient magnitude is the range over which the common mode is slewed. Dynamic supply current is the incremental amount of supply current required for a 1 MBps increase in the signal data rate. All voltages are relative to their respective ground; all min/max specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3 V. All voltages are relative to their respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 2.7 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation: 2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all min/max specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5.0 V; or VDD1 = 5.0 V, VDD2 = 3.0 V. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 9 Case X e b 8 5 E 1 0°-8° E1 4 L DETAIL A D SEE DETAIL A A c SEATING PLANE A1 Symbol A A1 b c D Millimeters Min Max Dimensions Inches Symbol Min Max 1.35 0.10 0.31 0.17 4.80 .053 .004 .012 .006 .189 1.75 0.25 0.51 0.25 5.00 .068 .009 .020 .009 .196 E E1 e L Millimeters Min Max Inches Min Max 3.80 4.00 5.80 6.20 1.27 BSC 0.40 1.27 .149 .157 .228 .244 .050 BSC .015 .050 NOTES: 1. Controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. 2. Falls within JEDEC MS-012-AA. FIGURE 1. Case outline. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 10 Case outline X Terminal Terminal symbol number 5 VDD1 6 VIA 7 VIB Terminal number 1 2 3 4 GND1 Terminal symbol GND2 VOB VOA 8 VDD2 FIGURE 2. Terminal connections. Terminal Number Mnemonic 1 VDD1 2 VIA 3 VIB 4 GND1 5 GND2 6 VOB 7 VOA 8 VDD2 Case outline X Description Supply voltage for isolation side 1 Logic input A. Logic input B. Ground 1. Ground reference for isolation side 1. Ground 2. Ground reference for isolation side 2. Logic output B. Logic output A. Supply voltage for isolation side 2 FIGURE 3. Terminal function. VIA Input H L H L X X 1. 2. 3. VIB Input VDD1 State VDD2 State H L L H X X Powered Powered Powered Powered Unpowered Powered Powered Powered Powered Powered Powered Unpowered VOA output VOB output H L H L H Indeterminate H L L H H Indeterminate Notes 1/ 2/ Outputs return to the input state within 1 µs of VDDI power restoration. Outputs return to the input state within 1 µs of VDDO power restoration. H = High, L = Low, X = Undetermined/not relevant. FIGURE 4. Truth table DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 11 V DD1 1 V IA 2 ENCODE V IB 3 ENCODE GND 1 4 8 V DD2 DECODE 7 V OA DECODE 6 V OB 5 GND 2 FIGURE 5. Functional block diagram. 200 SAFETY-LIMITING CURRENT(mA) 180 160 140 SIDE 1 120 SIDE 2 100 80 60 40 20 0 0 50 100 150 200 CASE TEMPERATURE(°C) FIGURE 6. Thermal derating curve. DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 12 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/12630-01XB 24355 ADuM1200UR-EP-RL7 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 24355 DLA LAND AND MARITIME COLUMBUS, OHIO Source of supply Analog Devices 1 Technology Way P.O. Box 9106 Norwood, MA 02062-9106 SIZE A CODE IDENT NO. 16236 REV DWG NO. V62/12630 PAGE 13