ENA2056 D

Ordering number : ENA2056
LV8771VH
Bi-CMOS LSI
PWM Constant-Current Control
Stepping Motor Driver
http://onsemi.com
Overview
The LV8771VH is a PWM current control stepping motor driver. It is ideally suited for driving stepping motors used in
office equipment and amusement applications.
Features
• 1 channel PWM current control stepping motor driver.
• IO max = 1.5A
• Output on-resistance (High side : 0.6Ω ; Low side : 0.4Ω ; total : 1.0Ω ; Ta = 25°C, IO = 1.5A).
• Micro step mode can be set to full-step, half-step (full torque), half-step, and quarter-step mode.
• Built-in thermal shutdown circuit.
• No control power supply necessary.
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Supply voltage
VM max
Output peak current
IO peak
Output current
IO max
Conditions
Ratings
Unit
36
t ≤ 10ms, ON-duty ≤ 20%
*
V
1.75
A
1.5
A
Allowable power dissipation
Pd max
3.0
W
Logic input voltage
VIN max
-0.3 to +6
V
VREF input voltage
VREF max
-0.3 to +6
V
Operating temperature
Topr
-20 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
* Specified circuit board : 90.0mm×90.0mm×1.6mm, glass epoxy board.
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
June, 2013
52312 SY 20120215-S00005 No.A2056-1/13
LV8771VH
Recommendation Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage range
VM
9 to 32
V
Logic input voltage
VIN
0 to 5.5
V
VREF input voltage range
VREF
0 to 3
V
Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
100
150
μA
2
3
mA
Standby mode current drain
IMstn
ST = “L”
Current drain
IM
ST = “H”, I01 = I11 = I02 = I12 = “L”, with no
VREG5 output voltage
Vreg5
Ireg5 = -1mA
4.7
5
5.3
V
Thermal shutdown temperature
TSD
Design guarantee
150
180
210
°C
Thermal hysteresis width
ΔTSD
Design guarantee
40
Ronu
IO = 1.5A, Upper-side on resistance
0.6
0.78
0.4
0.52
Ω
50
μA
1.4
V
0.8
V
12
μA
load
°C
Motor driver
Output on resistance
Rond
IO = 1.5A, Lower-side on resistance
Output leakage current
IOleak
VM = 36V
Diode forward voltage
VD
Logic high-level input voltage
VINH
Logic low-level input voltage
VINL
Logic pin input current
IINL
1.1
Ω
2.0
VIN = 0.8V
V
4
8
IINH
VIN = 5V
30
50
70
μA
Current setting comparator
Vtdac11
I01(02) = “H”, I11(12) = “H”
0.29
0.30
0.31
V
threshold voltage
Vtdac01
I01(02) = “L”, I11(12) = “H”
0.20
0.21
0.22
V
Vtdac10
I01(02) = “H”, I11(12) = “L”
0.11
0.12
0.13
V
Chopping frequency
VREF pin input current
Fchop1
FC = “L”
24.8
31.0
37.2
kHz
Fchop2
FC = “H”
49.6
62.0
74.4
kHz
Iref
VREF = 1.5V
-0.5
μA
Charge pump
VG output voltage
VG
Rise time
tONG
28
Oscillator frequency
Fosc
VG = 0.1μF
100
28.7
29.8
V
200
500
μS
125
150
kHz
Package Dimensions
unit : mm (typ)
3222A
15.0
0.5
5.6
7.6
15
14
1
2.0
2.7
0.1
(1.5)
1.7max
(0.7)
0.2
0.3
SANYO : HSOP28(275mil)
Allowable power dissipation, Pd max - W
28
0.8
Pd max – Ta
4.0
3.0
2.0
1.56
1.0
0
– 20
0
20
40
60
80
100
Ambient temperature, Ta - C
No.A2056-2/13
PGND
VM
GND
VREF
VREG5
+
-
TSD
+
Oscillation
circuit
Regulator
ST
Charge pump
+
OUT1A
OUT1B VM1
Current selection
(Quartoe/Half/Full)
Output preamplifier stage
RF1
VM2 OUT2A
RF2
+
Current selection
(Quartoe/Half/Full)
OUT2B
FC I01 I11 PH1 I12 I02 PH2
Output control logic
Output preamplifier stage
VG
Output preamplifier stage
CP1
Output preamplifier stage
CP2
LV8771VH
Block Diagram
No.A2056-3/13
LV8771VH
Pin Assignment
SGND
1
28
VREF
NC
2
27
FC
OUT2B
3
26
ST
VM2
4
25
PH2
PGND2
5
24
I02
RF2
6
23
I12
OUT2A
7
22
PH1
LV8771VH
OUT1B
8
21
I01
RF1
9
20
I11
PGND1
10
19
VREG5
VM1
11
18
CP1
OUT1A
12
17
NC
NC
13
16
CP2
VM
14
15
VG
Top view
No.A2056-4/13
LV8771VH
Pin Functions
Pin No.
Pin Name
Pin Functtion
22
PH1
Channel 1 forward/reverse rotation pin.
21
I01
Channel 1 output control input pin .
20
I11
Channel 1 output control input pin .
25
PH2
Channel 2 forward/reverse rotation pin.
24
I02
Channel 2 output control input pin .
23
I12
Channel 2 output control input pin .
27
FC
Chopping frequency switching pin.
Equivalent Circuit
VREG5
GND
26
ST
Chip enable pin.
VREG5
GND
8
OUT1B
Channel 1 OUTB output pin.
9
RF1
Channel 1 current-sense resistor connection pin.
10
PGND1
Power system ground pin 1.
11
VM1
Channel 1 motor power supply connection pin.
12
OUT1A
Channel 1 OUTA output pin.
3
OUT2B
Channel 2 OUTB output pin.
4
VM2
Channel 2 current-sense resistor connection pin.
5
PGND2
Power system ground pin 2.
6
RF2
Channel 2 motor power supply connection pin.
7
OUT2A
Channel 2 OUTA output pin.
11 4
8 3
12 7
10 5
9 6
GND
2, 13
, 17
NC
No Connection
(No internal connection to the IC)
Continued on next page.
No.A2056-5/13
LV8771VH
Continued from preceding page.
Pin No.
Pin Name
Pin Functtion
15
VG
Charge pump capacitor connection pin.
14
VM
Motor power supply connection pin.
16
CP2
Charge pump capacitor connection pin.
18
CP1
Charge pump capacitor connection pin.
Equivalent Circuit
18
14
16
15
VREG5
GND
19
VREG5
Internal power supply capacitor
connection pin.
VM
GND
28
VREF
Constant current control reference
voltage input pin.
VREG5
GND
No.A2056-6/13
LV8771VH
Description of operation
Input Pin Function
The function to prevent including the turn from the input to the power supply is built into each logic pin.
Therefore, the current turns to the power supply even if power supply (VM) is turned off with the voltage impressed to
the input pin and there is not crowding.
(1) Chip enable function
This IC is switched between standby and operating mode by setting the ST pin. In standby mode, the IC is set to
power-save mode and all logic is reset. In addition, the internal regulator circuit and charge pump circuit do not
operate in standby mode.
ST
Mode
Internal regulator
Low or Open
Standby mode
Standby
Charge pump
Standby
High
Operating mode
Operating
Operating
(2) Output control logic
I01(02)
I11(12)
Low
Low
Output current (IO)
0
High
Low
IO = (( VREF / 5 ) / RF ) × 40%
Low
High
IO = (( VREF / 5 ) / RF ) × 70%
High
High
IO = ( VREF / 5 ) / RF
PH1(2)
Current direction
Low
OUTB → OUTA
High
OUTA → OUTB
(3) Setting constant-current control reference current
This IC is designed to automatically exercise PWM constant-current chopping control for the motor current by setting
the output current. Based on the voltage input to the VREF pin and the resistance connected between RF and GND,
the output current that is subject to the constant-current control is set using the calculation formula below:
IOUT = (VREF / 5) / RF resistance
* The above setting is the output current at I01(02) = High, I11(12) = Low.
(Example) When VREF = 1.5V, I01(02) = High, I11(12) = Low and RF1(2) resistance is 0.5Ω, the setting current is
shown below.
IOUT = (1.5V / 5) / 0.5Ω = 0.6A
(4) Chopping frequency control logic
FC
Chopping frequency
Low
31kHz
High
62kHz
(5) Blanking period
If, when exercising PWM constant-current chopping control over the motor current, the mode is switched from decay
to charge, the recovery current of the parasitic diode may flow to the current sensing resistance, causing noise to be
carried on the current sensing resistance pin, and this may result in erroneous detection. To prevent this erroneous
detection, a blanking period is provided to prevent the noise occurring during mode switching from being received.
During this period, the mode is not switched from charge to decay even if noise is carried on the current sensing
resistance pin.
The blanking time is fixed at approximately 1μs.
No.A2056-7/13
LV8771VH
(6) Current control operation specification
(Sine wave increasing direction)
STEP
Set current
Set current
Coil current
Forced CHARGE
section
Current mode CHARGE
SLOW
FAST
CHARGE
SLOW
FAST
(Sine wave decreasing direction)
STEP
Set current
Coil current
Forced CHARGE
section
Current mode CHARGE
SLOW
FAST
Set current
Forced CHARGE
section
FAST
CHARGE
SLOW
In each current mode, the operation sequence is as described below :
• At rise of chopping frequency, the CHARGE mode begins. (In the time defined as the “blanking time,” the CHARGE
mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF).)
• The coil current (ICOIL) and set current (IREF) are compared in this blanking time.
When (ICOIL < IREF) state exists ;
The CHARGE mode up to ICOIL ≥ IREF, then followed by changeover to the SLOW DECAY mode, and
finally by the FAST DECAY mode for approximately 1μs.
When (ICOIL < IREF) state does not exist ;
The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one cycle of
chopping is over.
Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the sine wave increasing
direction, then entering the FAST DECAY mode till the current is attenuated to the set level and followed by the SLOW
DECAY mode.
No.A2056-8/13
LV8771VH
(7) Typical current waveform in each excitation mode
Full step (CW mode)
H
I01,I11
PH1
H
I02,I12
PH2
(%)
100
I1
0
-100
(%)
100
I2
0
-100
Half step full torque (CW mode)
I01
I11
PH1
I02
I12
PH2
(%)
100
l1
0
-100
(%)
100
l2
0
-100
No.A2056-9/13
LV8771VH
Half step (CW mode)
I01
I11
PH1
I02
I12
PH2
(%)
100
I1
0
-100
(%)
100
I2
0
-100
Quarter step (CW mode)
I01
I11
PH1
I02
I12
PH2
(%)
100
I1
0
-100
(%)
100
I2
0
-100
No.A2056-10/13
LV8771VH
(8) Charge Pump Circuit
When the ST pin is set High, the charge pump circuit operates and the VG pin voltage is boosted from the VM voltage
to the VM + VREG5 voltage. Because the output is not turned on if VM+4V or more is not pressured, the voltage of
the VG pin recommends the drive of the motor to put the time of tONG or more, and to begin.
ST
VG pin voltage
VM+VREG5
VM+4V
VM
tONG
VG Pin Voltage Schematic View
No.A2056-11/13
LV8771VH
Application Circuit Example
1 SGND
VREF 28
2 NC
FC 27
3 OUT2B
ST 26
4 VM2
1.5V
+ -
PH2 25
5 PGND2
I02 24
6 RF2
I12 23
7 OUT2A
Logic input
PH1 22
LV8771VH
M
8 OUT1B
I01 21
9 RF1
I11 20
VREG5 19
10 PGND1
CP1 18
11 VM1
NC 17
12 OUT1A
24V
- +
Logic input
13 NC
CP2 16
14 VM
VG 15
Each constant setting formula of above circuit example is as below.
Setting of chopping frequency: 31kHz (FC = Low)
The setting constant-current level becomes like a list.
(Example) I01(02) = High, I11(12) = High
When VREF = 1.5V, RF = 0.47Ω
IOUT = VREF/5/RF resistance
= (1.5V/5) / 0.47Ω = 0.64A
I01(02)
I11(12)
Low
Low
Output current (IO)
0
High
Low
IO = (( VREF / 5 ) / RF ) × 40%
Low
High
IO = (( VREF / 5 ) / RF ) × 70%
High
High
IO = ( VREF / 5 ) / RF
PH1(2)
Current direction
Low
OUTB → OUTA
High
OUTA → OUTB
No.A2056-12/13
LV8771VH
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.A2056-13/13
Similar pages