NTMFS4925 D

NTMFS4925NE
Power MOSFET
30 V, 48 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Dual Sided Cooling Capability
Optimized for 5 V, 12 V Gate Drives
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
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V(BR)DSS
RDS(ON) MAX
ID MAX
6.0 mW @ 10 V
30 V
48 A
10 mW @ 4.5 V
• CPU Power Delivery
• DC−DC Converters
D (5,6)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RqJA
(Note 1)
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current RqJA ≤ 10 s
(Note 1)
Power Dissipation
RqJA ≤ 10 s (Note 1)
Continuous Drain
Current RqJA
(Note 2)
Value
Unit
VDSS
VGS
ID
30
±20
16.7
V
V
A
TA = 100°C
Steady
State
S (1,2,3)
TA = 25°C
PD
2.70
W
TA = 25°C
ID
25.2
A
TA = 25°C
6.16
TA = 25°C
PD
0.92
W
TC = 25°C
ID
48
A
TC = 25°C
PD
23.2
W
TA = 25°C, tp = 10 ms
IDM
195
A
IDmax
TJ,
TSTG
100
−55 to
+150
A
°C
IS
dV/dt
EAS
21
6.0
34
A
V/ns
mJ
TL
260
°C
TA = 100°C
TA = 25°C
Source Current (Body Diode)
Drain to Source DV/DT
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 24 V, VGS = 10 V,
IL = 26 Apk, L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
A
6.2
TC =100°C
Current Limited by Package
Operating Junction and Storage
Temperature
30
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2011
September, 2011 − Rev. 0
MARKING
DIAGRAM
D
W
9.7
Power Dissipation
RqJC (Note 1)
N−CHANNEL MOSFET
15.9
PD
ID
TA = 25°C
G (4)
10.5
TA = 100°C
Power Dissipation
RqJA (Note 2)
Continuous Drain
Current RqJC
(Note 1)
Pulsed Drain
Current
TA = 25°C
Symbol
1
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
4925NE
AYWWG
G
D
D
D
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4925NET1G
SO−8 FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4925NET3G
SO−8 FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4925NE/D
NTMFS4925NE
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
5.4
Junction−to−Ambient – Steady State (Note 3)
RqJA
46.3
Junction−to−Ambient – Steady State (Note 4)
RqJA
136.2
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
RqJA
20.3
Junction−to−Top
RqJT
10.2
Unit
°C/W
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
21
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.2
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
1.7
3.9
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.2
gFS
ID = 30 A
4.0
ID = 15 A
4.0
ID = 30 A
6.4
ID = 15 A
6.3
VDS = 1.5 V, ID = 15 A
52
mV/°C
6.0
10
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
143
Total Gate Charge
QG(TOT)
10.8
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
1264
VGS = 0 V, f = 1 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
483
2.0
3.8
pF
nC
4.2
QG(TOT)
VGS = 10 V, VDS = 15 V; ID = 30 A
21.5
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
9.5
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
32.7
16.4
6.2
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4925NE
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
7.4
tr
td(OFF)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
27.5
ns
20.3
4.1
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.86
TJ = 125°C
0.75
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 30 A
1.1
V
25.8
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
12.4
ns
13.4
QRR
13.6
nC
Source Inductance
LS
1.00
nH
Drain Inductance
LD
0.005
nH
Gate Inductance
LG
1.84
nH
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.8
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
2.2
W
NTMFS4925NE
TYPICAL CHARACTERISTICS
4.5 V
TJ = 25°C
4.0 V
80
ID, DRAIN CURRENT (A)
100
90
3.5 V
70
60
50
40
3.0 V
30
20
10
0
VGS = 2.5 V
0
1
2
3
4
5
0.014
0.012
0.010
0.008
0.006
0.004
4
5
6
7
8
9
10
50
40
30
20
1
2
3
4
5
0.011
T = 25°C
0.010
0.009
0.008
VGS = 4.5 V
0.007
0.006
0.005
VGS = 10 V
0.004
0.003
10 20
30
40
50
60
70
80
90 100 110 120
VGS (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10,000
1.7
ID = 30 A
VGS = 10 V
TJ = 150°C
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
VDS = 10 V
70
60
Figure 2. Transfer Characteristics
0.016
1.5
TJ = 125°C
Figure 1. On−Region Characteristics
ID = 30 A
1.6
TJ = 25°C
90
80
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.018
3
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.020
0.002
0
120
110
100
10
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
120
10 V
110
1.4
1.3
1.2
1.1
1.0
0.9
1,000
TJ = 125°C
100
TJ = 85°C
0.8
0.7
0.6
−50
−25
0
25
50
75
100
125
150
10
VGS = 0 V
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTMFS4925NE
TYPICAL CHARACTERISTICS
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
Ciss
1400
VGS, GATE−TO−SOURCE VOLTAGE (V)
1600
1200
1000
800
Coss
600
400
Crss
200
0
0
5
10
15
20
25
30
11
QT
10
9
8
7
6
5
Qgs
4
Qgd
TJ = 25°C
3
VGS = 10 V
VDD = 15 V
ID = 30 A
2
1
0
0
2
4
6
8
10
12
14
18
16
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
22
20
30
t, TIME (ns)
100
IS, SOURCE CURRENT (A)
VGS = 0 V
VGS = 10 V
VDD = 15 V
ID = 15 A
td(off)
tf
tr
10
ID, DRAIN CURRENT (A)
1000
100
1
10
10
TJ = 125°C
TJ = 25°C
5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
0 V < VGS < 10 V
Single Pulse
TC = 25°C
10
100 ms
1 ms
1
0.01
15
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
10 ms
0.1
20
0
100
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
0.01
0.1
dc
1
10
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
1
td(on)
25
100
40
ID = 26 A
36
32
28
24
20
16
12
8
4
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTMFS4925NE
TYPICAL CHARACTERISTICS
100
D = 0.5
r(t)
(°C/W)
10
1
0.2
0.1
0.05
0.02
0.01
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, TIME (ms)
Figure 13. Thermal Response
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6
1
10
100
1000
NTMFS4925NE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8 FL)
CASE 488AA−01
ISSUE E
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
2X
0.20 C
4X
E1
2
1
2
3
q
E
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
0.10 C
SIDE VIEW
8X
C A B
0.05
c
3X
4X
1.270
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
0.51
−−−
−−−
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
SOLDERING FOOTPRINT*
DETAIL A
b
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.750
4X
1.000
0.965
1.330
2X
0.905
2X
PIN 5
(EXPOSED PAD)
G
E2
L1
0.495
M
4.530
3.200
D2
0.475
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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7
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For additional information, please contact your local
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NTMFS4925NE/D