5 4 3 2 1 REVISION HISTORY ECO REV __ DESCRIPTION REBUILD WITH CHANGE 1 3.3V APPROVED DATE MICHEL A. 12-09-11 J6 3.3V D CP 2700pF 0603 C1 1uF 16V 0805 RZ 453 1% 0603 CI1 0.022uF C2 + 330uF 10V 7343 J7 D GND 0603 CI2 6800pF C7 0.01uF C6 470pF R1 51.1 1% 2 23 GNDD 24 CP V+CP 26 25 CMc SDI GNDC SDO TB TUNE V+D MUTE 3 GND 3.3V * ASSY -A -B -C U1 LTC6946IUFD-1 LTC6946IUFD-2 LTC6946IUFD-3 20 C16 2.2uF 19 16V 0805 18 17 16 15 TUNE 5% 0.1uF C21 100pF 5% J4 SMA-R J5 SMA-R RF- RF+ CUSTOMER NOTICE APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. VCO 2.24 TO 3.74 GHz 3.08 TO 4.91 GHz 3.84 TO 5.79 GHz THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 B L2 3.3V 68nH C22 0402HPH-68NXJL C20 100pF 5% A 22 21 C15 0.01uF BB L1 68nH 0402HPH-68NXJL 5% 1. ALL RESISTORS ARE IN OHMS, 0402 ALL CAPACITORS ARE IN MICROFARADS, 0402. 4 GND C19 0.01uF JP1 NOTE: UNLESS OTHERWISE SPECIFIED J9 C18 1uF 16V 0805 3.3V 2 1 10V 7343 14 3.3V 3.3V REF+ CMb SCLK C17 0.1uF D1 LN1251C B 8 CMa V+RF 3.3V GNDA RF+ 7 V+VCO 13 6 C10 + 330uF C CS 12 SDI SDO 1 R3 330 5 MUTE STATUS 4 STAT 9 E3 CS SCLK * REFO RF- 3 SMA-R U1 V+REFO GNDB 2 11 1 V+REF 28 C14 0.022uF J3 REF OUT 27 REF- C13 0.1uF C9 1uF 16V 0805 C12 0.01uF C11 470pF 3.3V C 5V C8 0805 1uF 16V 10 SMA-R J8 GND REF+ IN 5V 29 J1 0805 R4 15 3 TECHNOLOGY KIM T. MICHEL A. TITLE: SCHEMATIC ULTRALOW NOISE & SPURIOUS INTEGER-N SYNTHESIZER WITH INTEGRATED VCO SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC6946IUFD-1/-2/-3 REV. 1 DEMO CIRCUIT 1705B 12/09/2011, 09:12 AM SHEET 1 1 OF 2 A 5 4 3 2 DC590 SPI INTERFACE 3.3V D 1 U2 NC7WZ17P6X R5 200K 1 6 3 4 R10 100 R11 100 3.3V GND VCC 5 C23 SCLK 0.1uF V+DIG CS SCLK SDI SDO 1 V+ 2 5V 6 CS 4 SCK/SCL 7 MOSI/SDA 5 MISO 10 EEVCC 9 EESDA 11 EESCL 12 EEGND 14 AUX U3 NC7WZ17P6X R9 4.99K C26 0.1uF WP EEGND 3 4 2 GND 1 VCC(A) 2 GND 3 R15 0 0603 B 6 VCC R12 100 3.3V 5 U4 74LVC1T45GW 4 SCL SDA WP A2 A1 A0 ARRAY 13 8 3 6 5 7 3 2 1 1 SDI C C24 0.1uF 8 U5 24LC025-I /ST C3 0.1uF R7 200K VCC R8 4.99K R6 200K GND R14 4.99K GND GND GND C 2 EEPROM J2 HD2X7-079-MOLEX D CS 3.3V VCC(B) 6 DIR 5 C25 0.1uF 4 SDO B R13 200K NOTE: EEPROM FOR BOARD IDENTIFICATION CUSTOMER NOTICE APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. A THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 4 3 TECHNOLOGY KIM T. MICHEL A. TITLE: SCHEMATIC A ULTRALOW NOISE & SPURIOUS INTEGER-N SYNTHESIZER WITH INTEGRATED VCO SIZE IC NO. DATE: REV. LTC6946IUFD-1/-2/-3 N/A SCALE = NONE 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only 1 DEMO CIRCUIT 1705B 12/09/2011, 09:12 AM SHEET 2 1 2 OF 2