plastic, extremely thin small outline package; no leads; 10 terminals

0
DF
N2
51
0-1
SOT1165-1
plastic, extremely thin small outline package; no leads; 10
terminals
8 February 2016
Package information
1. Package summary
Terminal position code
D (double)
Package type descriptive code
DFN2510-10
Package type industry code
DFN2510-10
Package style descriptive code
XSON (extremely thin small outline; no leads)
Package style suffix code
NA (not applicable)
Package body material type
P (plastic)
IEC package outline code
---
JEDEC package outline code
---
JEITA package outline code
---
Mounting method type
S (surface mount)
Issue date
18-2-2013
Table 1. Package summary
Symbol
Parameter
Min
Typ
Nom
Max
Unit
D
package length
2.4
-
2.5
2.6
mm
E
package width
0.9
-
1
1.1
mm
A
seated height
[tbd]
-
[tbd]
0.5
mm
e
nominal pitch
-
-
0.5
-
mm
n2
actual quantity of termination
-
-
10
-
SOT1165-1
NXP Semiconductors
plastic, extremely thin small outline package; no
leads; 10 terminals
2. Package outline
DFN2510-10: plastic, extremely thin small outline package; no leads;
10 terminals; body 1 x 2.5 x 0.5 mm
SOT1165-1
X
D
B
A
E
A
A1
c
terminal 1
index area
detail X
e1
e
terminal 1
index area
b1
v
w
b
1
5
C
C A B
C
y1 C
y
L
k
10
6
Terminal#3 identification
0
1
Dimensions
Unit
mm
max
nom
min
2 mm
scale
A
0.5
D(1)
E(1)
e
e1
0.05 0.25 0.45
2.6
0.20 0.40 0.127 2.5
0.00 0.15 0.35
2.4
1.1
1.0
0.9
0.5
2
A1
b
b1
c
k
L
v
0.2
0.43
0.38
0.33
0.1
w
y
y1
0.05 0.05 0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT1165-1
---
---
---
sot1165-1_po
European
projection
Issue date
13-01-09
13-02-18
Fig. 1. Package outline DFN2510-10 (SOT1165-1)
SOT1165-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
2/5
SOT1165-1
NXP Semiconductors
plastic, extremely thin small outline package; no
leads; 10 terminals
3. Soldering
Footprint information for reflow soldering of DFN2510-10 package
SOT1165-1
Hx
P
C
Hy
Ay
By
0.05
D
0.05
D1
Generic footprint pattern
Refer to the package outline drawing for actual layout
solder land
solder paste deposit
solder land plus solder paste
occupied area
solder resist
Dimensions in mm
P
Ay
By
C
D
D1
Hx
Hy
0.500
1.3
0.25
0.525
0.20
0.40
2.45
1.6
Remark:
Stencil of 75 m is recommended.
A stencil of 75 m gives an aspect ratio of 0.77
With a stencil of 100 m one will obtain an aspect ratio of 0.58
sot1165-1_fr
Fig. 2. Reflow soldering footprint for DFN2510-10 (SOT1165-1)
SOT1165-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
3/5
SOT1165-1
NXP Semiconductors
plastic, extremely thin small outline package; no
leads; 10 terminals
4. Legal information
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
SOT1165-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
4/5
SOT1165-1
NXP Semiconductors
plastic, extremely thin small outline package; no
leads; 10 terminals
5. Contents
1. Package summary........................................................ 1
2. Package outline............................................................ 2
3. Soldering....................................................................... 3
4. Legal information......................................................... 4
©
NXP Semiconductors N.V. 2016. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 8 February 2016
SOT1165-1
Package information
All information provided in this document is subject to legal disclaimers.
8 February 2016
©
NXP Semiconductors N.V. 2016. All rights reserved
5/5