5 4 3 2 1 REVISION HISTORY INPUT CURRENT LIMIT SETTINGS Input Limit Current D2 D1 D0 JP5 (HPWR) = 1A 0 0 0 0 D VUSB 1 D- 2 D+ 3 ID 4 GND 5 3 TP1 TP2 TP3 D+ ID R1 1.0 5% E2 TP4 OVGATE GND 2 1 0603 NTCBIAS 500mA (5X) 750mA 500uA (SUSP) 100mA (1X) 750µA 150mA OFF 0 1 0 1 1A (10X) 500mA (5X) 1.5A 750mA OFF OFF 2.5mA (SUSP) 3.75mA OFF DESCRIPTION APPROVED PRODUCTION FAB GEORGE B. J3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Not USB Compliant 4 VOUT VC/TRACK VOUT GND ACPR GND PG WALL SYNC SHDN DVCC ILIM SDA HVOK/INIT SCL HVIN D SQT-108-01-F-D-RA 13 VBUS VC 20 TP7 ACPR 19 TP5 WALL 18 TP6 OVGATE OVSENS LTC4098EUDC-3.6 E3 DATE 05-06-10 HV BUCK INTERFACE U1 Leakage current must be < 400nA R2 6.04k C ON OFF 0 1 0 1 C2 22uF 0805 20% 6.3V Q1 Si2306BDS 6.3V MINI-B USB ON ON 1 1 1 REV 2 C1 10uF 0603 20% D- 1 VUSB 150mA 1.5A 1 0 * Note: J1 100mA (1X) 1A (10X) 0 1 1 1 4.35V - 5.5V, Non-operating Fault Tolerance to 30V Continous, 36V Transient. 0 1 0 1 E1 ECO Input Limit Current CHARGER JP5 (HPWR) = 1.5A * STATUS NTCBIAS SW 14 VOUT 12 L1 3.3uH C VOUT XFL4020-332MEC Footprint can mount XFL or XPL E12 C5 22uF 0805 20% 6.3V D1 BATTERY CHARGING Green E11 GND 2 R3 100k VOUT 3.0V - 4.2V 2A E4 5 NTC IDGATE NTC 10 Leakage currrent must be < 50nA 1 VOUT 1 16 17 CHRG 8 BATSENS 6 D1 D2 CHRG E9 PROG 3 CLPROG R12 0 BAT 21 0 Unless noted: Resistors: Ohms, 0402, 1%, 1/16W Capacitors: uF, 0402, 10%, 50V PROG CLPROG JP4 NTC E6 HPWR JP5 A R4 806 C3 0.1uF 16V R5 3.01k 1.5A 1A R14 4.22k 4 BAT VFLOAT = 3.6V 1.25A R10 1.0 5% E7 GND R11 1.0 5% J2 1 2 3 R8 0 BAT GND NTC DF3-3P-2DSA OPT EXT CUSTOMER NOTICE INT R6 0 R7 100k LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 R9 1.0 5% 0 E5 B C4 100uF 20% 6.3V 1206 9 BATSENS E8 11 GNDGND JP3 D2 1 E10 0 JP2 D1 1 D0 7 R13 1k 5% 0603 3 TP8 15 JP1 D0 B Q2 Si2333DS 3 APPROVALS TECHNOLOGY PCB DES. NC APP ENG. GEORGE B. TITLE: SCHEMATIC USB COMPATIBLE SWITCHING POWER MANAGER / LI-ION CHARGER WITH OVERVOLTAGE PROTECTION SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. REV. LTC4098EUDC-3.6 DEMO CIRCUIT 1701A 1 Friday, June 25, 2010 SHEET 1 1 OF 1 A