Philips Semiconductors Product specification Switched-mode power supply control circuit DESCRIPTION NE/SE5560 PIN CONFIGURATION The NE/SE5560 is a control circuit for use in switched-mode power supplies. This single monolithic chip incorporates all the control and housekeeping (protection) functions required in switched-mode power supplies, including an internal temperature-compensated reference source, internal Zener references, sawtooth generator, pulse-width modulator, output stage and various protection circuits. D, F, N Packages VCC 1 16 FEEDFORWARD 2 15 OUTPUT (COLL) VZ FEEDBACK 3 14 OUTPUT (EMIT) GAIN 4 13 DEMAG: OVERVOLTAGE MODULATOR 5 FEATURES • Stabilized power supply • Temperature-compensated reference source • Sawtooth generator • Pulse-width modulator • Remote on/off switching • Current limiting • Low supply voltage protection • Loop fault protection • Demagnetization/overvoltage protection • Maximum duty cycle clamp • Feed-forward control • External synchronization 12 GND DUTY CYCLE CONTROL 6 RT 11 CURRENT LIMITING 7 10 REMOTE ON/OFF CT 8 9 EXTERNAL SYNC SL00360 Figure 1. Pin Configuration ORDERING INFORMATION DESCRIPTION 16-Pin Plastic Dual In-Line Package (DIP) 16-Pin Plastic Small Outline Large (SOL) Package TEMPERATURE RANGE ORDER CODE DWG # 0 to 70°C NE5560N SOT38-4 0°C to 70°C NE5560D SOT162-1 16-Pin Plastic Dual In-Line Package (DIP) -55°C to 125°C SE5560N SOT38-4 16-Pin Cerdip Dual In-Line Package (CERDIP) -55°C to 125°C SE5560F 0582B ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNIT Supply1 VCC Voltage-forced mode +18 V ICC Current-fed mode 30 mA Output transistor (at 20-30V max) IOUT Output current Collector voltage (Pin 15) Max. emitter voltage (Pin 14) TA mA V +5 V -55 to +125 °C 0 to 70 °C -65 to +150 °C Operating ambient temperature range SE5560 NE5560 TSTG 40 VCC+1.4V Storage temperature range NOTES: 1. Does not include current for timing resistors or capacitors. 1994 Aug 31 1 853-0125 13721 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 BLOCK DIAGRAM FEED FORWARD 16 EXTERNAL RT CT SYNC INPUT 9 7 8 DEMAGNETIZATION OVER-VOLTAGE PROTECTION 13 0.6V + SAWTOOTH GENERATOR REFERENCE VOLTAGE – VCC 0.48V FEEDBACK VOLTAGE GAIN ADJUST 0.6V + 3 PULSE WIDTH MODULATOR – 15 + 4 – S OUTPUTS LATCH MODULATOR INPUT CUTY CYCLE CONTROL 5 Q R – 14 + + 8 – 0.6V + Q1 100Ω 1kΩ 0.48V CURRENT 11 LIMITING 0.6V R START S STOP – + OC1 STABILIZED SUPPLY + 0.6V 2 VZ – + 1 10 REMOTE ON/OFF – 12 VCC NOTE: 1. See Voltage/Current fed supply characteristic curve. SL00361 Figure 2. Block Diagram 1994 Aug 31 2 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 DC ELECTRICAL CHARACTERISTICS TA=25°C, VCC=12V, unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS SE5560 NE5560 Min Typ Max Min Typ Max 25°C 3.69 3.72 3.81 3.57 3.72 3.95 Over temperature 3.65 3.85 3.53 UNIT Reference sections VREF Internal reference voltage Temperature coefficient of VREF VZ Internal Zener reference -100 IL=-7mA 7.8 Temperature coefficient of VZ 8.4 4.00 -100 8.8 7.8 200 8.4 V V ppm/°C 8.8 200 V ppm/°C Oscillator section Frequency range Initial accuracy oscillator Duty cycle range Over temperature 50 R=5kΩ 100k 50 5 fO=20kHz 0 100k 5 98 0 Hz % 98 % Modulator Modulation input current Voltage at Pin 5=2V Over temperature 0.2 20 0.2 20 µA 0.2 20 0.2 20 µA 40 50 60 40 50 60 % of duty cycle 8 9.0 10.5 8 9.0 10.5 V 400 600 720 400 600 720 mV -7 -15 -35 -7 -15 -35 µA 470 600 720 470 600 720 mV -0.6 -10 -0.6 -10 µA Housekeeping function IIN‘ Pin 6, input current Pin 6, duty cycle limit control At 2V Over temperature For 50% max duty cycle 15kHz to 50kHz/41% of VZ Pin 1, low supply voltage protection thresholds Pin 3, feedback loop protection trip threshold At 2V Pin 3, pull-up current Pin 13, demagnetization/over-voltage protection trip on threshold Over temperature At 0.25V IIN Pin 13, input current 25°C Over temperature Pin 16, feed-forward duty cycle control Voltage at Pin 16=2VZ -20 30 40 50 0.2 5 -20 30 40 50 % original duty cycle 0.2 5 µA 10 µA V At 16V, VCC=18V *Pin 16, feed-forward input current 25°C Over temperature 10 External synchronization Pin 9 Off 0 0.8 0 0.8 On 2 VZ 2 VZ V -125 µA -125 µA Sink current Voltage at Pin 9=0V, 25°C -65 Over temperature -100 -65 -125 Remote Pin 10 Off On 0 0.8 0 0.8 V 2 VZ 2 VZ V -125 µA -125 µA At 0V Sink current 25°C -85 Over temperature 1994 Aug 31 3 -100 -125 -85 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 DC ELECTRICAL CHARACTERISTICS (Continued) SYMBOL PARAMETER TEST CONDITIONS SE5560 Min NE5560 Typ Max -2 -20 Min UNIT Typ Max -2 -20 µA Current limiting IIN Pin 11 Input current Voltage at Pin 11=250mV 25°C Over temperature Single pulse inhibit delay -40 µA 0.7 0.8 µs -40 Inhibit delay time for 20% overdrive at 40mA IOUT 0.7 0.8 OC2 Trip Levels: Shut down, slow start, low level 0.500 0.600 0.700 0.500 0.600 0.700 V OC1 Current limit, high level 0.400 0.480 0.560 0.400 0.560 0.500 V ∆OC Low Level in terms of high level, OC2 0.750 0.800 0.850 0.750 0.800 0.850 V 9.5 6.2 9.5 V Error amplifier VOH Output voltage swing VOL Output voltage swing 6.2 0.7 Open-loop gain 54 RF Feedback resistor 10k BW Small-signal bandwidth 60 0.7 54 dB 3 MHz Ω 10k 3 V 60 Output stage VCE(SAT) IC=40mA 0.5 Output current (Pin 15) 40 Max. emitter voltage (Pin 14) 5 0.5 40 6 5 V mA 6 V Supply voltage/current1 ICC Supply current IZ=0, voltage-forced, VCC=12V, 25°C 10 10 mA Over temp. 15 15 mA VCC Supply voltage ICC=10mA current-fed 20 23 19 24 V VCC Supply voltage ICC=30mA current-fed 20 30 20 30 V NOTES: 1. Does not include current for timing resistors or capacitors. 1994 Aug 31 4 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 MAXIMUM PIN VOLTAGES NE5560 Pin No Function Maximum Voltage 1 VCC See Note 1 2 VZ Do not force (8.4V) 3 Feedback VZ 4 Gain 5 Modulator VZ 6 Duty Cycle Control VZ 7 RT Current force mode 8 CT 9 External Sync VZ 10 Remote On/Off VZ 11 Current Limiting VCC 12 GND GND 13 Demagnetization/Overvoltage VCC 14 Output (Emit) VZ 15 Output (Collector) VCC+2VBE 16 Feed-forward VCC NOTES: 1. When voltage-forced, maximum is 18V; when current-fed, maximum is 30mA. See voltage-/current-fed supply characteristic curve. TYPICAL PERFORMANCE CHARACTERISTICS Error Amplifier Open-Loop Phase Open-Loop Gain 0 60 –30 PHASE ANGLE (DEG) 50 GAIN (dB) 40 30 20 –60 –90 –120 –150 10 –180 0 1k 10k 100k FREQUENCY (Hz) 1M 1k 10M 10k Figure 3. Typical Performance Characteristics 1994 Aug 31 5 100k 1M FREQUENCY (Hz) 10M SL00362 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Graph for Determining δMAX Soft-Start Min. Duty Cycle vs R1 + R2 δ (%) δ MAX (%) SOFT START DUTY CYCLE % 100 MAXIMUM DUTY CYCLE (%) 90 2 80 R1 70 DUTY CYCLE 6 CONTROL 60 50 R2 40 12 30 80 δMAX 90% 70 60 δMAX 70% 50 40 30 δMAX 50% δMAX 30% 20 20 10 10 R2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 R1 R2 Power Derating Curve 103 2 3 4 NE5560 Voltage-/Current-Fed Supply Characteristics mA 5 6 7 8 9 10 (Ω) 2 Current-Fed Dropping Resistor 1.0 VS 20 SE RVCC VCC Pd MAX (W) R1 + R2 4 NE 50 1 VCC V S CC (10 20mA) V R VCC 10 GND 24 SEE DC ELECTRICAL CHARACTERISTICS FOR CURRENT FED VCC RANGE 12 0 –60°C 25°C 70°C 10 0 125°C 20 VCC TA OPERATING CURVE Regulation vs Error Amp Closed Gain ∆VO/VREF (%) 7 6 5 4 Transfer Curve of Pulse-Width Modular Duty Cycle vs Input Voltage R 4 R R1 3 δ (%) f 20 100 S 90 RS 3 2 V 30 – + 80 R VREF(3.72V) R 1 0.9 0.8 0.7 0.6 0.5 0.4 f 70 100 S 60 50 R R 0.3 f 40 500 S 30 20 0.2 10 δ 0.1 10 20 30 40 50 60 70 80 0 90 1 2 3 4 5 6 V4,5,6 (V) SL00363 Figure 4. Typical Performance Characteristics 1994 Aug 31 6 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) f(kHz) Typical Frequency Plot vs RT and CT δ 1000 100 90 100 90 80 70 60 50 40 R=5kΩ 80 R=10kΩ 70 30 DUTY CYCLE R=20kΩ 20 R=40kΩ 10 9 8 7 6 5 4 3 2 1 60 50 40 30 20 10 V 16 2 2.5 3 3.5 4 4.5 1 CnF) 1.5 2 2.5 VZ SL00364 Figure 5. Typical Performance Characteristics – An output transistor of which both the collector (Pin 15) and the emitter (Pin 14) are externally available. This allows for normal or inverse output pulses. THEORY OF OPERATION The following functions are incorporated: – A temperature-compensated reference source. – A power supply that can be either voltage- or current-driven (Pins 1 and 12). The internally-generated stabilized output voltage VZ is connected to Pin 2. – An error amplifier with Pin 3 as input. The output is connected to Pin 4 so that the gain is adjustable with external resistors. – A sawtooth generator with a TTL-compatible synchronization input (Pins 7, 8, 9). – A special function is the so-called feed-forward at Pin 16. The amplitude of the sawtooth generator is modulated in such a way that the duty cycle becomes inversely proportional to the voltage on this pin: δ ~ 1/V16. – A pulse-width modulator with a duty cycle range from 0 to 95%. The PWM has two additional inputs: – Loop fault protection circuits assure that the duty cycle is reduced to zero or a low value for open- or short-circuited feedback loops. Pin 6 can be used for a precise setting of δMAX Pin 5 gives a direct access to the modulator, allowing for real constant-current operation: – A gate at the output of the PWM provides a simple dynamic current limit. Stabilized Power Supply (Pins 1, 2, 12) The power supply of the NE5560 is of the well known series regulation type and provides a stabilized output voltage of typically 8.5V. – A latch that is set by the flyback of the sawtooth and reset by the output pulse of the above mentioned gate prohibits double pulsing. – Another latch functions as a start-stop circuit; it provides a fast switch-off and a slow start. This voltage VZ is also present at Pin 2 and can be used for precise setting of δMAX and to supply external circuitry. Its max. current capability is 5mA. – A current protection circuit that operates via the start-stop circuit. This is a combined function with the current limit circuit, therefore Pin 11 has two trip-on levels; the lower one for cycle-by-cycle current limiting, the upper one for current protection by means of switch-off and slow-start. The circuit can be fed directly from a DC voltage source between 10.5V and 18V or can be current-driven via a limiting resistor. In the latter case, internal pinch-off resistors will limit the maximum supply voltage: typical 23V for 10mA and max. 30V for 30mA. – A TTL-compatible remote on/off input at Pin 10, also operating via the start-stop circuit. The low supply voltage protection is active when V(1-12) is below 10.5V and inhibits the output pulse (no hysteresis). – An inhibit input at Pin 13. The output pulse can be inhibited immediately. When the supply voltage surpasses the 10.5V level, the IC starts delivering output pulses via the slow-start function. – An output gate that is commanded by the latches and the inhibit circuit. 1994 Aug 31 7 Philips Semiconductors Product specification Switched-mode power supply control circuit The current consumption at 12V is less than 10mA, provided that no current is drawn from VZ and R(7-12)≥20kΩ. NE/SE5560 the voltage drop over R(3-4). As a result, the duty cycle will become zero, provided that R(3-4)>100k. When the feedback loop is short-circuited, the duty cycle would jump to the adjusted maximum duty cycle. Therefore, an additional comparator is active for feedback voltages at Pin 3 below 0.6V. Now an internal resistor of typically 1k is shunted to the impedance on the δMAX setting Pin 6. Depending on this impedance, δ will be reduced to a value δ0. This will be discussed further. The Sawtooth Generator Figure 6 shows the principal circuitry of the oscillator. A resistor between Pin 7 and Pin 12 (GND) determines the constant current that charges the timing capacitor C(8-12). This causes a linear increasing voltage on Pin 8 until the upper level of 5.6V is reached. Comparator H sets the RS flip-flop and Q1 discharges C(8-12) down to 1.1V, where comparator L resets the flip-flop. During this flyback time, Q2 inhibits the output. The Pulse-Width Modulator The function of the PWM circuit is to translate a feedback voltage into a periodical pulse of which the duty cycle depends on that feedback voltage. As can be seen in Figure 10, the PWM circuit in the NE5560 is a long-tailed pair in which the sawtooth on Pin 8 is compared with the LOWEST voltage on either Pin 4 (error amplifier), Pin 5, or Pin 6 (δMAX and slow-start). The transfer graph is given in Figure 11. The output of the PWM causes the resetting of the output bi-stable. Synchronization at a frequency lower than the free-running frequency is accomplished via the TTL gate on Pin 9. By activating this gate (V9<2V), the setting of the sawtooth is prevented. This is indicated in Figure 7. Figure 8 shows a typical plot of the oscillator frequency against the timing capacitor. The frequency range of the NE5560 goes from <50Hz up to >100kHz. Limitation of the Maximum Duty Cycle With Pins 5 and 6 not connected and with a rather low feedback voltage on Pin 3, the NE5560 will deliver output pulses with a duty cycle of ≈ 95%. In many SMPS applications, however, this high δ will cause problems. Especially in forward converters, where the transformer will saturate when δ exceeds 50%, a limitation of the maximum duty cycle is a must. Reference Voltage Source The internal reference voltage source is based on the bandgap voltage of silicon. Good design practice assures a temperature dependency typically ±100ppm/°C. The reference voltage is connected to the positive input of the error amplifier and has a typical value of 3.72V. A DC voltage applied to Pin 6 (PWM input) will set δMAX at a value in accordance with Figure 11. For low tolerances of δMAX, this voltage on Pin 6 should be set with a resistor divider from VZ (Pin 2). The upper and lower sawtooth levels are also set by means of an internal resistor divider from VZ, so forming a bridge configuration with the δMAX setting is low because tolerances in VZ are compensated and the sawtooth levels are determined by internal resistor matching rather than by absolute resistor tolerance. Figure 12 can be used for determining the tap on the bleeder for a certain δMAX setting. Error Amplifier Compensation For closed-loop gains less than 40dB, it is necessary to add a simple compensation capacitor as shown in Figures 8 and 9. Error Amplifier with Loop-Fault Protection Circuits This operational amplifier is of a generally used concept and has an open-loop gain of typically 60dB. As can be seen in Figure 9, the inverting input is connected to Pin 3 for a feedback information proportional to VO. The output goes to the PWM circuit, but is also connected to Pin 4, so that the required gain can be set with RS and R(3-4). This is indicated in Figure 9, showing the relative change of the feedback voltage as a function of the duty cycle. Additionally, Pin 4 can be used for phase shift networks that improve the loop stability. As already mentioned, Figure 13 gives a graphical representation of this. The value δo is limited to the lower and the higher side; • It must be large enough to ensure that at maximum load and minimum input voltage the resulting feedback voltage on Pin 3 exceeds 0.6V. • It must be small enough to limit the amount of energy in the SMPS When the SMPS feedback loop is interrupted, the error amplifier would settle in the middle of its active region because of the feedback via R(3-4). This would result in a large duty cycle. A current source on Pin 3 prevents this by pushing the input voltage high via when a loop fault occurs. In practice, a value of 10-15% will be a good compromise. VZ TO PWM 5.6V – N SET + 8 RT TO OUTPUT LATCH Q2 – 7 1.1V L RESET + CT 9 SYN SL00365 Figure 6. Sawtooth Generator 1994 Aug 31 Q1 8 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 5.6V SET VS 1.1V RESET INHIBIT ‘SET’ >2V VS <0.8V SL00366 Figure 7. Sawtooth Oscillator Synchronization 60dB SLOPE 20dB/DECADE 1kHz 10kHz 1MHz SL00367 Figure 8. Error Amplifier Compensation Open-Loop Gain 3.72V 3 START/ STOP + ERROR AMP – (+) PWM OUT RESET (–) O.C. (–) (–) 8 4 5 6 SL00368 Figure 9. Error Amplifier 1994 Aug 31 9 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 ∆VO/VREF (%) 7 6 5 4 3 R 4 R R1 f 20 S RS – + 3 2 R VREF(3.72V) R 1 0.9 0.8 0.7 0.6 0.5 0.4 R R 0.3 f 100 S f 500 S 0.2 δ 0.1 10 20 30 40 50 60 70 80 90 a. Duty Cycle — δ — % Regulation 3.72V START/ STOP + ERROR AMP – 3 (+) PWM OUT RESET (–) O.C. (–) (–) 8 4 5 6 b. Pulse-Width Modulation SL00369 Figure 10. Extra PWM Input (Pin 5) δ (%) The PWM has an additional inverting input: Pin 5. It allows for attacking the duty cycle via the PWM circuit, independently from the feedback and the δMAX information. This is necessary when the SMPS must have a real constant-current behavior, possibly with a fold-back characteristic. However, the realization of this feature must be done with additional external components. When not used, Pin 5 should be tied to Pin 6. 100 90 80 70 60 50 40 30 20 10 V4,5,6 (V) 0 1 2 3 4 5 6 SL00370 Figure 11. Transfer Curve of Pulse-Width Modulator Duty Cycle vs Input Voltage 1994 Aug 31 10 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 δ MAX (%) 100 90 2 MAXIMUM DUTY CYCLE (%) 80 R1 70 DUTY CYCLE 6 CONTROL 60 R2 50 40 12 30 20 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 R2 R1 R2 SL00371 Figure 12. Graph for Determining δMAX SOFT START DUTY CYCLE % δ (%) 80 δMAX 90% 70 60 δMAX 70% 50 40 30 δMAX 50% δMAX 30% 20 10 103 2 3 4 5 6 7 8 9 10 R1 + R2 4 2 (Ω) SL00372 Figure 13. Soft-Start Minimum Duty Cycle vs R1 + R2 0.6V 0.48V from PWM START STOP RESET OF OUTPUT BISTABLE 11 SL00373 Figure 14. Current Protection Input 1994 Aug 31 11 Philips Semiconductors Product specification Switched-mode power supply control circuit current limit diminishes at low duty cycle values. When δ becomes very small, the storage time of the power transistor becomes dominant. The current will now increase again, until it surpasses the reference of the second comparator. The output of this comparator activates the start-stop circuit and causes an immediate inhibit of the output pulses. After a certain deadtime, the circuit starts again with very narrow output pulses. The effect of this two-level current protection circuit is visualized in Figure 15. OC1 RELATIVE I OUT (mA) NORMAL OPERATING POINT The Start-Stop Circuit OC2 The function of this protection circuit is to stop the output pulses as soon as a fault occurs and to keep the output stopped for several periods. After this dead-time, the output starts with a very small, gradually increasing duty cycle. When the fault is persistent, this will cause a cyclic switch-off/switch-on condition. This “hiccup” mode effectively limits the energy during fault conditions. The realization and the working of the circuit are indicated in Figures 12 and 13. The dead time and the soft-start are determined by an external capacitor that is connected to Pin 6 (δMAX setting). LEVEL 1 LEVEL 2 .48 .60 (V) V11 (CURRENT LIMITING) NE/SE5560 SL00374 An RS flip-flop can be set by three different functions: 1. Remote on/off on Pin 10. 2. Overcurrent protection on Pin 11. 3. Low supply voltage protection (internal). Figure 15. Output Characteristics Dynamic Current Limit and Current Protection (Pin 11) As soon as one of these functions cause a setting of the flip-flop, the output pulses are blocked via the output gate. In the same time transistor Q1 is forward-biased, resulting in a discharge of the capacitor on Pin 6. In many applications, it is not necessary to have a real constant-current output of the SMPS. Protection of the power transistor will be the prime goal. This can be realized with the NE5560 in an economical way. A resistor (or a current transformer) in the emitter of the power transistor gives a replica of the collector current. This signal must be connected to Pin 11. As can be seen in Figure 14, this input has two comparators with different reference levels. The output of the comparator with the lower 0.48V reference is connected to the same gate as the output of the PWM. The discharging current is limited by an internal 150Ω resistor in the emitter of Q1. The voltage at Pin 6 decreases to below the lower level of the sawtooth. When V6 has dropped to 0.6V, this will activate a comparator and the flip-flop is reset. The output stage is no longer blocked and Q1 is cut off. Now VZ will charge the capacitor via R1 to the normal δMAX voltage. The output starts delivering very narrow pulses as soon as V6 exceeds the lower sawtooth level. The duty cycle of the output pulse now gradually increases to a value determined by the feedback on Pin 3, or by the static δMAX setting on Pin 6. When activated, it will immediately reset the output flip-flop, so reducing the duty cycle. The effectiveness of this cycle-by-cycle PWM 2 LATCH VZ 15 R1 6 Q1 Q2 R2 START/ STOP 100Ω CSS 14 SET LOW SUPPLY VOLTAGE PROTECTION RESET 0.6V 12 0.48V 0.6V 11 10 SL00375 Figure 16. Start-Stop Circuit 1994 Aug 31 12 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 5.6V V6 SAWTOOTH 1.1V DISCHARGE CHARGE .6V DEAD TIME V15 δ INCREASES SET RESET SL00376 Figure 17. Start-Stop Circuit Remote On/Off Circuit (Pin 10) V1 VZ In systems where two or more power supplies are used, it is often necessary to switch these supplies on and off in a sequential way. Furthermore, there are many applications in which a supply must be switched by a logical signal. This can be done via the TTL-compatible remote on/off input on Pin 10. The output pulse is inhibited for levels below 0.8V. The output of the IC is no longer blocked when the remote on/off input is left floating or when a voltage >2V is applied. Start-up occurs via the slow-start circuit. FLYBACK SET 15 14 RESET The Output Stage VZ The output stage of the NE5560 contains a flip-flop, a push-pull driven output transistor, and a gate, as indicated in Figure 18. The flip-flop is set by the flyback of the sawtooth. Resetting occurs by a signal either from the PWM or the current limit circuit. With this configuration, it is assured that the output is switched only once per period, thus prohibiting double pulsing. The collector and emitter of the output transistor are connected to respectively Pin 15 and Pin 14, allowing for normal or inverted output pulses. An internally-grounded emitter would cause intolerable voltage spikes over the bonding wire, especially at high output currents. + – 13 FROM START STOP NOTES: The signal V13 can be derived from the demagnetizing winding in a forward converter as shown below. This current capability of the output transistor is 40mA peak for VCE ≅ 0.4V. An internal clamping diode to the supply voltage protects the collector against overvoltages. The max. voltage at the emitter (Pin 14) must not exceed +5V. A gate, activated by one of the set or reset pulses, or by a command from the start-stop circuit will immediately switch-off the output transistor by short-circuiting its base. The external inhibitor (Pin 13) operates also via this base. B + P1 Demagnetization Sense As indicated in Figure 18, the output of this NPN comparator will block the output pulse, when a voltage above 0.6V is applied to Pin 13. A specific application for this function is to prevent saturation of forward-converter transformers. This is indicated in Figure 19. S1 H SL00377 dV IN n (n transformer ratio) Figure 18. Output Stage This means that in order to keep VOUT at a constant value, the duty cycle δ must be made inversely proportional to the input voltage. A pre-regulation (feed-forward) with the function δ~1/VIN can ease the feedback-loop design. 1994 Aug 31 P2 – “I” “I” “n” Feed-Forward (Pin 16) The basic formula for a forward converter is V OUT 0.6V This loop now only has to regulate for load variations which require only a low feedback gain in the normal operation area. The transformer of a forward converter must be designed in such a way 13 Philips Semiconductors Product specification Switched-mode power supply control circuit that it does not saturate, even under transient conditions, where the max. inductance is determined by δMAX×VIN max. A regulation of δMAX~1/VIN will allow for a considerable reduction or simplification of the transformer. The function of δ~1/VIN can be realized by using Pin 16 of the NE5560. NE/SE5560 16 FEED-FORWARD INPUT DO NOT EXCEED VCC 2 R1 6 δMAX CSS R2 ON ON ON 7 RT 8 CT δ1 δ1 δ2 (50) T δ2 δ3 T δ3 T SL00379 Figure 20. External δ Maximum Control SL00378 Figure 19. Output Stage Inhibit V16 2XVZ Figure 20 shows the electrical realization. When the voltage at Pin 16 exceeds the stabilized voltage VZ (Pin 2), it will increase the charging current for the timing capacitor on Pin 8. VZ The operating frequency is not affected, because the upper trip level for sawtooth increases also. Note that the δMAX voltage on Pin 6 remains constant because it is set via VZ. Figure 21 visualizes the effect on δMAX and the normal operating duty cycle δ. For V16=2×VZ, these duty cycles have halved. The graph for δ=f(V16) is given in Figure 22. MAX MAX 1 2 δMAX LEVEL WORKING δ LEVEL NOTE: V16 must be less than Pin 1 voltage. T T APPLICATIONS SL00380 Figure 21. Feed-Forward Circuitry NE/SE5560 Push-Pull Regulator This application describes the use of the Philips Semiconductors NE/SE5560 adapted to function as a push-pull switched mode regulator, as shown in Figures 23 and 24. δ 100 Input voltage range is +12V to +18V for a nominal output of +30V and -30V at a maximum load current of 1A with an average efficiency of 81%. 90 DUTY CYCLE 80 Features include feed-forward input compensation, cycle-to-cycle drive current protection and other voltage sensing, line (to positive output) regulation <1% for an input range of +13V to +18V and load regulation to positive output of <3% for ∆IL(+) of 0.1 to 1A. The main pulse-width modulator operates to 48kHz with power switching at 24kHz. 70 60 50 40 30 20 10 V 16 1 1.5 2 2.5 VZ Figure 22. Feed-Forward Regulation 1994 Aug 31 14 SL00381 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 NOTES: Power ground and signal ground must be kept separated T1, Primary = 130T (C.T.) #26 Secondary = 18T (C.T.) #22 Core = Ferroxcube 3622 3C8 material C.T. = 50T #26 0n Ferroxcube 2616 core (3C8) F2D bobbin T2, Primary = 16T (C.T.) #18 Secondaries (each) 52T (C.T.) #22 Core = Ferroxcube 4229 3C8 material L1, L2 = 120T #20 on single gapped EC35 Ferroxcube core. 3C8 material. SL00382 Figure 23. NE/SE5560 Push-Pull Switched-Mode Regulated Supply with CMOS Drive Conversion Logic 1994 Aug 31 15 Philips Semiconductors Product specification Switched-mode power supply control circuit NE/SE5560 NOTES: Power ground and signal ground must be kept separated T1, Primary = 130T (C.T.) #26 Secondary = 18T (C.T.) #22 Core = Ferroxcube 3622 3C8 material C.T. = 50T #26 0n Ferroxcube 2616 core (3C8) F2D bobbin T2, Primary = 16T (C.T.) #18 Secondaries (each) 52T (C.T.) #22 Core = Ferroxcube 4229 3C8 material L1, L2 = 120T #20 on single gapped EC35 Ferroxcube core. 3C8 material. SL00383 Figure 24. NE/SE5560 Push-Pull Switched-Mode Regulated With TTL Drive Conversion Logic 1994 Aug 31 16