IP4284CZ10-TBR; IP4284CZ10-TT ESD protection for ultra high-speed interfaces Rev. 3 — 19 May 2011 Product data sheet 1. Product profile 1.1 General description The devices are designed to protect high-speed interfaces such as High-Definition Multimedia Interface (HDMI), DisplayPort, SuperSpeed USB, external Serial Advanced Technology Attachment (eSATA) and Low Voltage Differential Signaling (LVDS) interfaces against ElectroStatic Discharge (ESD). The devices include high-level ESD protection diodes for ultra high-speed signal lines and are available in two package variants: XSON10 and TSSOP10. All signal lines are protected by a special diode configuration offering ultra low line capacitance of only 0.5 pF. These diodes provide protection to downstream components from ESD voltages up to ±8 kV contact according to IEC 61000-4-2, level 4. 1.2 Features and benefits Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen and antimony (Dark Green compliant) System ESD protection for USB 2.0 and USB SuperSpeed 3.0, HDMI 1.3 and HDMI 1.4, DisplayPort, eSATA and LVDS All signal lines with integrated rail-to-rail clamping diodes for downstream ESD protection of ±8 kV according to IEC 61000-4-2, level 4 Matched 0.5 mm trace spacing Signal lines with ≤ 0.05 pF matching capacitance between signal pairs Line capacitance of only 0.5 pF for each channel 4-channel, XSON10 or TSSOP10 Pb-free package Design-friendly ’pass-thru’ signal routing 1.3 Applications The devices are designed for high-speed receiver and transmitter port protection: TVs, monitors DVD recorders and players Notebooks, mother boards, graphic cards and ports Set-top boxes and game consoles IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 2. Pinning information Table 1. Pin Pinning Symbol Description Simplified outline Graphic symbol IP4284CZ10-TBR (SOT1176-1) 1 CH1 channel 1 ESD protection 2 CH2 channel 2 ESD protection 3 GND ground 4 CH3 channel 3 ESD protection 5 CH4 channel 4 ESD protection 6 n.c. not connected 7 n.c. not connected 8 GND ground 9 n.c. not connected 10 n.c. not connected 10 9 8 7 6 2 1 4 5 1 2 3 4 5 Transparent top view XSON10 3, 8 018aaa001 IP4284CZ10-TT (SOT552-1) 1 CH1 channel 1 ESD protection 2 CH2 channel 2 ESD protection 3 GND ground 4 CH3 channel 3 ESD protection 5 CH4 channel 4 ESD protection 6 n.c. not connected 7 n.c. not connected 8 GND ground 9 n.c. not connected 10 n.c. not connected 10 6 2 1 4 3, 8 1 5 018aaa001 5 TSSOP10 3. Ordering information Table 2. Ordering information Type number Package Name Description Version IP4284CZ10-TBR XSON10 plastic extremely thin small outline package; no leads; 10 terminals; body 1 × 2.5 × 0.5 mm SOT1176-1 IP4284CZ10-TT plastic thin shrink small outline package; 10 leads; SOT552-1 body width 3 mm TSSOP10 4. Marking Table 3. IP4284CZ10-TBR_TT Product data sheet Marking codes Type number Marking code IP4284CZ10-TBR 84 IP4284CZ10-TT 4284 All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 2 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 5. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VI input voltage VESD Conditions electrostatic discharge voltage Min Max Unit −0.5 +5.5 V contact discharge - ±8 kV air discharge - ±15 kV IEC 61000-4-2, level 4 [1] Tamb ambient temperature −40 +85 °C Tstg storage temperature −55 +125 °C [1] All pins to ground. 6. Characteristics Table 5. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VBRzd Zener diode breakdown voltage Itest = 1 mA 6 - 9 V ILRzd Zener diode reverse leakage current per TMDS channel; VI = 3.0 V - - 1 μA VF forward voltage - 0.7 - V Cch(TMDS) TMDS channel capacitance f = 1 MHz; Vbias = 2.5 V [1] 0.4 0.5 0.7 pF ΔCch(TMDS) TMDS channel capacitance difference f = 1 MHz; Vbias = 2.5 V [1] - 0.05 - pF Cch(mutual) mutual channel capacitance f = 1 MHz; Vbias = 2.5 V [1][2] - 0.07 - pF Rdyn dynamic resistance I=1A positive transient - 1 - Ω negative transient - 1 - Ω - 8 - V VCL(ch)trt(pos) positive transient channel VESD = 8 kV clamping voltage IP4284CZ10-TBR_TT Product data sheet [3] [1] This parameter is guaranteed by design. [2] Between signal pin and pin n.c. [3] According to IEC 61000-4-5 and IEC 61000-4-9. [4] Human Body Model (HBM) according to JESD22-A-J114D. All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 [4] © NXP B.V. 2011. All rights reserved. 3 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 018aaa002 3 Sdd21; Scc21 (dB) 018aaa003 0 Sdd21; NEXT (dB) (1) −3 −30 (2) −9 −60 −15 106 107 108 109 1010 −90 108 109 1010 f (Hz) f (Hz) (1) Sdd21 Sdd21 (2) Scc21 normalized to 100 Ω; differential pairs CH1/CH2 versus CH3/CH4 normalized to 100 Ω; differential pairs at CH1/CH2 or at CH3/CH4 Fig 1. Mixed-mode differential and common-mode insertion loss; typical values IP4284CZ10-TBR_TT Product data sheet Fig 2. Mixed-mode differential NEXT crosstalk; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 4 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 018aaa004 018aaa005 5 Gbit/s; USB 3.0 CP0 pattern Fig 3. 5 Gbit/s; USB 3.0 CP0 pattern Eye diagram using reference PCB Fig 4. Typical eye diagram for IP4284CZ10 018aaa006 0.4 Cd (pF) 0.2 (1) 0.0 (2) −0.2 −0.4 −0.5 1.5 3.5 5.5 Vbias (V) (1) Pin 2 (2) Pin 1 Deviation from typical capacitance normalized at Vbias = 2.5 V Fig 5. Line capacitance as a function of bias voltage; typical values IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 5 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 018aaa008 8.5 018aaa007 3.5 VCL (V) VCL (V) 3.0 8.0 2.5 7.5 2.0 7.0 0.5 1.0 1.5 2.0 1.5 0.5 2.5 1.0 1.5 2.0 I (A) IEC 61000-4-5; tp = 8/20 μs; positive pulse Fig 6. IEC 61000-4-5; tp = 8/20 μs; negative pulse Dynamic resistance with positive clamping Fig 7. Dynamic resistance with negative clamping 018aaa009 18 2.5 I (A) 018aaa010 0 VCL (V) VCL (V) −4 12 −8 6 −12 0 0 2 4 6 8 10 12 I (A) 14 −16 −16 tp = 100 ns; Transmission Line Pulse (TLP) Fig 8. Product data sheet −8 −4 0 I (A) tp = 100 ns; Transmission Line Pulse (TLP) Dynamic resistance with positive clamping IP4284CZ10-TBR_TT −12 Fig 9. Dynamic resistance with negative clamping All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 6 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 7. Application information The devices are designed to provide high-level ESD protection for high-speed serial data buses such as HDMI, DisplayPort, eSATA and LVDS data lines. When designing the Printed-Circuit Board (PCB), careful consideration should be given to basic high-speed routing guidelines, impedance matching, and signal coupling. Basic application diagrams for the ESD protection of an HDMI interface are shown in Figure 10 and Figure 11. IP4284CZ10-TBR 5 4 8 3 2 1 TMDS_D2+ TMDS_CH2+ TMDS_GND TMDS_CH2– TMDS_D2– GND TMDS_D1+ TMDS_CH1+ TMDS_GND TMDS_CH1– TMDS_D1– IP4284CZ10-TBR 5 TMDS_D0+ TMDS_CH2+ TMDS_GND 4 8 3 2 1 TMDS_CH2– TMDS_D0– GND TMDS_CLK+ TMDS_CH1+ HDMI CONNECTOR TMDS_GND TMDS_CH1– TMDS_CLKCEC n.c. DDC_CLK DDC_DAT GND +5 V HOT PLUG DETECTION 6 5 4 IP4221CZ6 1 2 100 nF 3 018aaa115 Fig 10. Application diagram of HDMI ESD protection using IP4284CZ10-TBR IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 7 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces IP4284CZ10-TT TMDS_D2+ TMDS_D2+ TMDS_GND TMDS_D2– TMDS_D2– TMDS_D1+ TMDS_D1+ TMDS_GND TMDS_D1– TMDS_D1– IP4284CZ10-TT TMDS_D0+ TMDS_D0+ TMDS_GND TMDS_D0– TMDS_D0– TMDS_CLK+ TMDS_CLK+ HDMI CONNECTOR TMDS_GND TMDS_CLK1– TMDS_CLK– CEC n.c. DDC_CLK DDC_DAT GND +5 V HOT PLUG DETECTION IP4220CZ6 100 nF 018aaa012 Fig 11. Application diagram of HDMI ESD protection using IP4284CZ10-TT IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 8 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 8. Package outline XSON10: plastic extremely thin small outline package; no leads; 10 terminals; body 1 x 2.5 x 0.5 mm SOT1176-1 X B D A A E A1 A3 terminal 1 index area detail X e1 terminal 1 index area e v w b 1 5 C C A B C y1 C y L1 k L 10 6 0 1 scale Dimensions Unit(1) mm max nom min 2 mm A A1 0.5 0.05 A3 b 0.25 0.127 0.20 0.00 0.15 D E 2.6 2.5 2.4 1.1 1.0 0.9 e e1 0.5 k L 2 0.2 L1 0.40 0.45 0.35 0.40 0.30 0.35 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1176-1 --- --- --- sot1176-1_po European projection Issue date 10-06-21 10-06-22 Fig 12. Package outline SOT1176-1 (XSON10) IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 9 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm D E SOT552-1 A X c y HE v M A Z 6 10 A2 (A3) A1 A pin 1 index θ Lp L 1 5 detail X e w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.15 0.23 0.15 3.1 2.9 3.1 2.9 0.5 5.0 4.8 0.95 0.7 0.4 0.1 0.1 0.1 0.67 0.34 6° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-07-29 03-02-18 SOT552-1 Fig 13. Package outline SOT552-1 (TSSOP10) IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 10 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 9. Soldering Footprint information for reflow soldering of XSON10 package SOT1176-1 Hx C Hy By Ay 0.05 D P 0.05 Generic footprint pattern Refer to the package outline drawing for actual layout solder land solder paste deposit solder land plus solder paste occupied area solder resist Dimensions in mm P Ay By C D Hx Hy 0.5 1.25 0.3 0.475 0.2 2.45 1.5 Remark: Stencil of 75 μm is recommended. A stencil of 75 μm gives an aspect ratio of 0.77 With a stencil of 100 μm one will obtain an aspect ratio of 0.58 sot1176-1_fr Reflow soldering is the only recommended soldering method. Fig 14. Reflow soldering footprint SOT1176-1 (XSON10) IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 11 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces Footprint information for reflow soldering of TSSOP10 package SOT552-1 Hx Gx P2 (0.125) Hy Gy (0.125) By Ay C D2 (4x) D1 P1 Generic footprint pattern Refer to the package outline drawing for actual layout solder land occupied area DIMENSIONS in mm P1 P2 Ay By C D1 D2 Gx Gy Hx Hy 0.500 0.550 5.400 3.200 1.100 0.300 0.400 2.750 3.900 3.700 5.650 sot552-1_fr Reflow soldering is the only recommended soldering method. Fig 15. Reflow soldering footprint SOT552-1 (TSSOP10) IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 12 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 10. Abbreviations Table 6. IP4284CZ10-TBR_TT Product data sheet Abbreviations Acronym Description DVD Digital Versatile Disc eSATA external Serial Advanced Technology Attachment ESD ElectroStatic Discharge HBM Human Body Model HDMI High-Definition Multimedia Interface LVDS Low Voltage Differential Signaling NEXT Near End Crosstalk RoHS Restriction of Hazardous Substances TLP Transmission Line Pulse TMDS Transition Minimized Differential Signaling UTLP Ultra Thin Leadless Package All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 13 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 11. Revision history Table 7. Revision history Document ID Release date IP4284CZ10-TBR_TT v.3 20110519 Modifications: • • • • • • Data sheet status Change notice Supersedes Product data sheet - IP4284CZ10-TB_TT v.2 Deleted type number IP4284CZ10-TB. Added type number IP4284CZ10-TBR. Section 4 “Marking”: added. Table 4 “Limiting values”: updated VESD values. Section 9 “Soldering”: added. Section 12 “Legal information”: updated. IP4284CZ10-TB_TT v.2 20100401 Product data sheet - IP4284CZ10-TB_TT v.1 IP4284CZ10-TB_TT v.1 20100304 Preliminary data sheet - - IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 14 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 15 of 17 IP4284CZ10-TBR/TT NXP Semiconductors ESD protection for ultra high-speed interfaces Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] IP4284CZ10-TBR_TT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 19 May 2011 © NXP B.V. 2011. All rights reserved. 16 of 17 NXP Semiconductors IP4284CZ10-TBR/TT ESD protection for ultra high-speed interfaces 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 19 May 2011 Document identifier: IP4284CZ10-TBR_TT