INTEGRATED CIRCUITS DATA SHEET PCD509x2/zuu/v family Low cost; low power DECT baseband controllers (ABC-PRO) Objective specification File under Integrated Circuits, IC17 1998 Apr 27 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 PINNING INFORMATION 5.1 5.2 Pinning Pin description 6 FUNCTIONAL DESCRIPTION 6.1 DECT baseband controller system 7 PACKAGE OUTLINES 8 SOLDERING 8.1 8.2 8.3 8.4 Introduction Reflow soldering Wave soldering Repairing soldered joints 9 DEFINITIONS 10 LIFE SUPPORT APPLICATIONS 11 PURCHASE OF PHILIPS I2C COMPONENTS 1998 Apr 27 2 PCD509x2/zuu/v family Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 1 PCD509x2/zuu/v family FEATURES • The PCD50912 is designed for GAP compatible DECT handsets • The PCD50922 is designed for GAP compatible DECT base stations serving up to six handsets • Fully static 80C51 microcontroller • Comparator for use as bit-slicer • Emulation supported for 80C51 program development • 3 channel time-multiplexed 8-bit ADC for RSSI, battery and general input voltage measurement • Four 8-bit ports (P0, P1, P2 and P3), 32 I/O lines • Dedicated port pins for keyboard, I2C-bus, interrupt sources and/or external memory • Battery management supported by programmable current source for temperature or charge current measurement • Fifteen interrupt sources (including those from TICB, BML and DSP) with two priority levels • I2C-bus • On-chip 8-bit DAC for various purposes • Low power crystal oscillator at 13.824 MHz interface • UART with IrDA-compatible Data Transmission Mode • Programmable on-chip capacitors for frequency adjustment to 13.824 MHz with large pulling range • 256 bytes of microcontroller main RAM • High performance DAC and ADC for dynamic earpiece and dynamic or electret microphone • 3 kbytes of microcontroller AUX RAM • 1 kbyte of shared System Data RAM • Analog-to-digital path switchable sensitivity for microphone or line interface input • 64 kbytes of mask programmable ROM • 128 kbyte address space for external ROM access, maximum 192 kbytes together with internal ROM • On-chip reference voltage and supply for electret microphone • 128 kbytes of external RAM addressable • Very low ohmic buzzer output • Embedded DSP with 6.912, 13.824 or 27.648 Mips • Speech and IOM-2 interface • Pulse density modulated or pulse width modulated buzzer output signal • BML for TDMA frame (de)multiplexing. Transmission or reception can be programmed for any slot • Power-on-reset • Low power operation optimized for 2 battery cells in handset • Ciphering, scrambling, CRC checking/generation, protected B-fields • Local call and B-field loop-back • Long standby time due to reduced digital supply voltage and reduced activity in idle-locked mode • Automatic receiver delay adjustment programmable per slot to correct for terminal mobility • Flexible supply voltage concept due to use of level shifters between each supply voltage domain • Phase error measurement and phase error correction by hardware • Eight independent supply voltage domains: – 1.8 to 3.6 V for digital core, microcontroller ports P0 and P2, and also P1 and P3 • Serial interface to synthesizer for frequency programming – 1.8 to 3.6 V for buzzer, oscillator and battery • Programmable timing and polarity of radio-control signals – 2.7 to 3.6 V for RF interface and analog circuits • CMOS technology • Easy interfacing with radio circuits, operating at different supply voltages • Small and flat LQFP80 package. • GMSK pulse shaper with two different pulse shapes (BT = 0.5 and BT = 0.8) 1998 Apr 27 3 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 2 PCD509x2/zuu/v family This family specification contains the hardware description that is independent of the used ROM codes. GENERAL DESCRIPTION The PCD509x2 family is designed for low power GAP compatible DECT handset (PP) and base station (FP) applications. The circuit includes the audio interface, the DSP, the microcontroller and the Burst Mode Logic, and contains all functionality to convert speech and data signals from/to the analog side (microphone and earpiece or line interface circuit) to/from the radio side (1.152 Mbits/s data). The numerical digit ‘x’ in PCD509x2 determines the intended application area (e.g. PCD50912 for use in handsets or PCD50922 for use in simple base stations, etc.). The last numerical digit ‘2’ is used to denote hardware derivatives. The extension digits ‘z’ (A to Z) and ‘uu’ (00 to 99) denote the DSP and the microcontroller software version, respectively. The extension ‘v’ denotes the hardware version updates of the circuit. This circuit is a member of the ABC family, where A stands for ‘ADPCM codec’, B for ‘Burst Mode Logic’ and C for ‘microController’. The name ABC-PRO stands for PROfessional ABC. Although the microcontroller ROM code is present on-chip, an external program memory for the microcontroller code can be used. This is not the case for the DSP ROM code which is fixed by the chip version. The PCD509x2/zuu/v contains on-chip ROM for the embedded DSP code and on-chip ROM for the embedded microcontroller code. It is these ROM codes that differentiate between various chip derivatives. For each DSP code a separate DSP user manual is published. Please contact Philips Semiconductors for more information. 3 Throughout this family specification the term PCD509x2 is used to cover all sub types and versions. If any specific feature or parameter is connected to a certain sub type or version this will be specifically written. Until otherwise stated this family specification is valid for hardware version 1 (v = 1). ORDERING INFORMATION TYPE NUMBER PCD50912H PACKAGE NAME DESCRIPTION VERSION LQFP80 plastic low profile quad flat package; 80 leads; body 12 × 12 × 1.4 mm SOT315-1 PCD50922H 1998 Apr 27 4 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VDD(P0, P2) VDDD LEVEL SHIFTER PORT 0 LEVEL SHIFTER LEVEL SHIFTER PORT 2 P3(1) 8 VDD(P1, P3) LEVEL SHIFTER PORT 1 PCD509x2 IB BUS 80CL51 CORE AUX-RAM (3 kBYTES) MICROCONTROLLER-RAM (256 BYTES) UART VDDD VDDD VDDD VDDD LEVEL SHIFTER BURST MODE LOGIC (BML) VDD(BZ) DIGITAL PULSE SHAPER (DPS) DIGITAL SIGNAL PROCESSOR (DSP) 5 SYSTEM DATA RAM (SDR) (1 kBYTE) R_DATAP R_DATAM T_GSMK/ T_DATA I2C-BUS MICROCONTROLLER AB-MICROCONTROLLER INTERFACE (ABCIF) ANT_SW0 ANT_SW1 T_ENABLE T_PWR GPP S_ENABLE S_DATA S_CLK S_PWR R_ENABLE R_PWR SLICE_CTR REF_CLK VDDD VSSD VDD(P1, P3) VDD(P0, P2) VSS(P0, P2) VDD(BZ) VSS(BZ) VDD(RF) VSS(RF) VDDA VSSA VDD(OSC) VSS(OSC) VDD(BAT) SPEECH INTERFACE IOM ADPCM (SPI) ROM (64 kBYTES) VDD(RF) digital pins analog pins supply pins VDDD LEVEL SHIFTER PORT 3 LEVEL SHIFTER DIGITAL RECEIVE FILTER (DRF) DIGITAL NOISE SHAPER (DNS) EARP EARM 1-BIT DAC (ARD) CODEC LEVEL SHIFTER MEMORY BZP BZM BUZZER BUFFER (ABB) Philips Semiconductors 8 BLOCK DIAGRAM 8 Low cost; low power DECT baseband controllers (ABC-PRO) P1(1) P2 8 4 P0 A16 PSEN ok, full pagewidth 1998 Apr 27 ALE EA DIGITAL DECIMATING FILTER (DDF) Σ∆ 1-BIT ADC MICP/LIFM MICM/LIFP AMP ATS AGM VDDA VDD(OSC) ISB VDDD XTAL1 LEVEL SHIFTER TIMING CONTROL BLOCK (TICB) Vref ISB BUS CONTROLLER (IBC) DIGITAL CONTROL OF ANALOG (DCA) XTAL2 WATCHDOG TIMER (WDT) RESET GENERATOR (RGE) Vref ANALOG SWITCH (ASW) LEVEL SHIFTER VDD(BAT) LEVEL SHIFTER ANALOG VOLTAGE SOURCE (AVS) ANALOG VOLTAGE REFERENCE (AVR) AUXILIARY ADC (AAD) ANALOG SUBTRACTOR (ASU) VDD(BAT) ANALOG RSSI TREATMENT (ART) RSSI_AN ADJUSTABLE CURRENT SOURCE (ACS) VANLI POWER-ON-RESET (POR) VBGP (1) Ports 1 and 3 are shared with alternative functions. Fig.1 Block diagram. VANLO Objective specification MGM858 M_RESET PCD509x2/zuu/v family CLOCK GENERATOR (CLG) VDDA Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) PINNING INFORMATION 61 P0.1 62 P0.0 63 EA 64 P3.7/RD 65 P3.6/WR 66 P3.5/T1 67 P3.4/T0 68 P3.3/INT1/IrDA 69 P3.2/INT0 70 P3.1/TXD 71 P3.0/RXD 72 VSSD 73 VDDD 74 VDD(P1, P3) 75 P1.7/INT9/SDA 76 P1.6/INT8/SCL 80 P1.2/INT4/DI andbook, full pagewidth 77 P1.5/INT7/FS1 Pinning 78 P1.4/INT6/DCK 5.1 79 P1.3/INT5/DO 5 PCD509x2/zuu/v family P1.1/INT3 1 60 P0.2 P1.0/INT2 2 59 P0.3 M_RESET 3 58 P0.4 ANT_SW0 4 57 P0.5 ANT_SW1 5 56 P0.6 T_ENABLE 6 55 P0.7 T_PWR 7 54 ALE GPP 8 53 PSEN S_ENABLE 9 52 VDD(P0, P2) 51 VSS(P0, P2) S_DATA 10 PCD509x2/zuu/v S_CLK 11 50 A16 S_PWR 12 49 P2.7 R_ENABLE 13 48 P2.6 R_PWR 14 47 P2.5 SLICE_CTR 15 46 P2.4 VDD(RF) 16 45 P2.3 VSS(RF) 17 44 P2.2 REF_CLK 18 43 P2.1 RSSI_AN 19 42 P2.0 41 VSS(BZ) Fig.2 Pin configuration (LQPF80). 1998 Apr 27 6 BZP 40 BZM 39 VDD(BZ) 38 MICP/LIFM 37 MICM/LIFP 36 Vref 35 VBGP 34 VSSA 33 EARP 32 EARM 31 VDDA 30 VANLO 29 VANLI 28 VDD(BAT) 27 VSS(OSC) 26 XTAL1 25 XTAL2 24 VDD(OSC) 23 R_DATAM 22 R_DATAP 21 T_GSMK/T_DATA 20 MGM857 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 5.2 PCD509x2/zuu/v family Pin description Table 1 LQFP80 package SYMBOL PIN I/O STATE AFTER RESET(1) SUPPLY DOMAIN DESCRIPTION HIGH VDD(P1,P3) 80C51 port pin/external interrupt 3 HIGH VDD(P1,P3) 80C51 port pin/external interrupt 2 VDDD master reset input (Schmitt trigger) P1.1/INT3 1 I/O P1.0/INT2 2 I/O M_RESET 3 I − ANT_SW0 4 O HIGH VDD(RF) antenna switch 0 ANT_SW1 5 O HIGH VDD(RF) antenna switch 1 T_ENABLE 6 O HIGH VDD(RF) enable transmitter T_PWR 7 O LOW VDD(RF) switch transmitter power GPP 8 O LOW VDD(RF) general purpose pin used for the following: CLK100 100 Hz signal related to DECT frame timing VCO_BND_SW VCO band switch GP_CLK7 6.912 MHz general purpose clock GP_CLK3 3.456 MHz general purpose clock GP_CLK05 576 kHz general purpose clock R_SLICED ABS bitslice comparator output on/of static high/low. S_ENABLE 9 O LOW VDD(RF) synthesizer enable S_DATA 10 O LOW VDD(RF) serial synthesizer data S_CLK 11 O LOW VDD(RF) clock for serial synthesizer interface S_PWR 12 O LOW VDD(RF) switch synthesizer power R_ENABLE 13 O HIGH VDD(RF) enable receiver R_PWR 14 O HIGH VDD(RF) switch receiver power SLICE_CTR 15 O LOW VDD(RF) switch slicer time constant VDD(RF) 16 − − − positive supply voltage for RF interface pins VSS(RF) 17 − − − negative supply voltage for RF interface pins REF_CLK 18 O running VDD(RF) programmable reference clock for synthesizer RSSI_AN 19 I − VDD(RF) analog input for RSSI measurement T_GMSK/T_DATA 20 O off VDD(RF) transmitter data output, filtered/digital R_DATAP 21 I − VDD(RF) positive input for receiver data R_DATAM 22 I − VDD(RF) negative input for receiver data VDD(OSC) 23 − − XTAL2 24 O running VDD(OSC) crystal oscillator output XTAL1 25 I − VDD(OSC) crystal oscillator input 1998 Apr 27 − positive supply for crystal oscillator 7 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) SYMBOL PIN I/O STATE AFTER RESET(1) − − 27 I 28 I/O VANLO 29 VDDA EARM SUPPLY DOMAIN PCD509x2/zuu/v family DESCRIPTION − negative supply for crystal oscillator − − positive battery supply voltage − VDDA analog input to ADC, current output O off VDDA analog output from DAC 30 − − − 31 O off VDDA negative output to earpiece EARP 32 O off VDDA positive output to earpiece VSSA 33 − − VBGP 34 O 1.2 V Vref 35 O off VDDA reference voltage, microphone supply (+2 V) MICM/LIFP 36 I off VDDA negative/positive input from microphone/line MICP/LIFM 37 I off VDDA positive/negative input from microphone/line VDD(BZ) 38 − − − BZM 39 O LOW VDD(BZ) negative buzzer output BZP 40 O LOW VDD(BZ) positive buzzer output VSS(BZ) 41 − − P2.0 42 I/O HIGH VDD(P0,P2) P2.1 43 I/O HIGH VDD(P0,P2) P2.2 44 I/O HIGH VDD(P0,P2) P2.3 45 I/O HIGH VDD(P0,P2) P2.4 46 I/O HIGH VDD(P0,P2) P2.5 47 I/O HIGH VDD(P0,P2) P2.6 48 I/O HIGH VDD(P0,P2) P2.7 49 I/O HIGH VDD(P0,P2) A16 50 O LOW VDD(P0,P2) VSS(P0,P2) 51 − − − negative supply voltage VDD(P0,P2) 52 − − − positive supply voltage for periphery pins VSS(OSC) 26 VDD(BAT) VANLI positive supply voltage for analog circuits − negative supply voltage for analog circuits VDD(BAT) bandgap output voltage (+1.2 V) positive supply voltage for buzzer − negative supply voltage for buzzer bidirectional Port 3 pins (80C51) A16 address select PSEN 53 O HIGH VDD(P0,P2) program store enable (80C51), active LOW ALE 54 O HIGH VDD(P0,P2) address latch enable (80C51) P0.7 55 I/O HIGH VDD(P0,P2) bidirectional Port 0 pins (80C51) P0.6 56 I/O HIGH VDD(P0,P2) P0.5 57 I/O HIGH VDD(P0,P2) P0.4 58 I/O HIGH VDD(P0,P2) P0.3 59 I/O HIGH VDD(P0,P2) P0.2 60 I/O HIGH VDD(P0,P2) P0.1 61 I/O HIGH VDD(P0,P2) P0.0 62 I/O HIGH VDD(P0,P2) 1998 Apr 27 8 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) SYMBOL PIN I/O STATE AFTER RESET(1) PCD509x2/zuu/v family SUPPLY DOMAIN DESCRIPTION − VDD(P0,P2) external access (80C51), active LOW I/O HIGH VDD(P1,P3) 80C51 port pin/Read data, active LOW I/O HIGH VDD(P1,P3) 80C51 port pin/Write data, active LOW 66 I/O HIGH VDD(P1,P3) 80C51 port pin/Timer 1 input P3.4/T0 67 I/O HIGH VDD(P1,P3) 80C51 port pin/Timer 0 input P3.3/INT1/IrDA 68 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 1/IrDA clock P3.2/INT0 69 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 0 P3.1/TXD 70 I/O HIGH VDD(P1,P3) 80C51 port pin/UART transmit data P3.0/RXD 71 I/O HIGH VDD(P1,P3) 80C51 port pin/UART receive data VSSD 72 − − − negative supply voltage for digital core VDDD 73 − − − positive supply voltage for digital core VDD(P1,P3) 74 − − − positive supply voltage for periphery pins P1.7/INT9/SDA 75 I/O off VDD(P1,P3) 80C51 port pin/external interrupt 9/I2C-bus data P1.6/INT8/SCL 76 I/O off VDD(P1,P3) 80C51 port pin/external interrupt 8/I2C-bus clock EA 63 I P3.7/RD 64 P3.6/WR 65 P3.5/T1 P1.5/INT7/FS1 77 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 7/SPI Frame Sync P1.4/INT6/DCK 78 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 6/SPI Data Clock P1.3/INT5/DO 79 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 5/SPI Data Out P1.2/INT4/DI 80 I/O HIGH VDD(P1,P3) 80C51 port pin/external interrupt 4/SPI Data In Note 1. In the ‘State After Reset’ column the following symbols are used: a) HIGH means active HIGH, for BUPxSW pin types this means weak pull-up b) LOW means active LOW c) ‘running’ means the clock signal is active d) ‘off’ means the high-impedance state. 1998 Apr 27 9 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 6 6.1 PCD509x2/zuu/v family Refer to the block diagram in Fig.1. The DECT Controller consists of a number of functional blocks that operate more or less autonomously and communicate with each other via the System Data RAM (SDR). Blocks have access to SDR via the Internal System Bus (ISB). The ISB consists of an 8-bit data bus, a 10-bit address bus and a number of bus-request/bus-grant signals. Access to the ISB is controlled by ISB Bus Controller (IBC). The IBC acknowledges bus requests on the basis of a priority scheme. The embedded 80C51 controller is to be programmed by the user. It must contain DECT software from Man-Machine Interface (MMI) to the DECT protocols TBC, CBC and DBC (refer to “Figures 10 to 13, in Section 6 of prETS 300 175-3: June 1996”). Software is available from Philips Semiconductors. FUNCTIONAL DESCRIPTION DECT baseband controller system The PCD509x2 is a family of baseband controllers, designed for use in Digital Enhanced Cordless Telecommunications systems (DECT). The family is designed for minimal component-count and minimal power consumption for very long standby times. All baseband controllers include an embedded 80C51 microcontroller with on-chip memory, including an IrDA (Infrared Data Association) compatible UART and I2C-bus. The Burst Mode Logic performs the time-critical MAC layer functions for applications in DECT handsets and base stations. The implemented RF Interface is compatible with the Philips Burst Mode Controller PCD504x. The ADPCM transcoding is in compliance with the CCITT Recommendation G.726. Also included is an on-chip codec with receive and transmit filters, complying with CCITT Recommendation G.712. Power-on-reset logic and power management functions further reduce power consumption and external components. Hardware state machines in the Burst Mode Logic (BML) and the Speech Interface (SPI) execute the lower blocks in the TBC, CBC and DBC. The 80C51 has control over the BML and the SPI via tables in SDR. The BML saves serial data, received via R_DATAP/M, in buffer areas in SDR. The position of the buffers in SDR is fixed by the 80C51 software by means of the tables previously mentioned. A-fields and B-fields are stored in separate buffers. In this way, two traffic bearers, each with their private A-fields, can share the same B-field buffer as is required in case of bearer hand-over or local call. The DSP and Codec support speech processing functions like analog-to-digital and digital-to-analog conversion, filtering, ADPCM encoding and decoding, 8-bit µ-law PCM to 14-bit linear PCM conversion and its reverse, echo cancelling, tone generation etc. The chip is intended to support stand-alone systems only (see Fig.3). There are no provisions to build clusters of base stations. There are no provisions for external controllers to exert control over the embedded 80C51. There are no provisions for external controllers to have direct access to the on-chip data memories. There are no provisions to allow handsets to receive from two unsynchronised base stations simultaneously, but a handset can operate in a multi base station environment as long as they are synchronous base stations. handbook, full pagewidth EARPIECE RADIO CIRCUITS PCD50912 MICROPHONE MGM860 a. Handset. handbook, full pagewidth RADIO CIRCUITS PCD50922 LINE INTERFACE (e.g. PCA1070) a/b line MGM859 b. Base station. Fig.3 Block diagram examples of DECT systems with PCD509xy. 1998 Apr 27 10 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 7 PCD509x2/zuu/v family PACKAGE OUTLINE LQFP80: plastic low profile quad flat package; 80 leads; body 12 x 12 x 1.4 mm SOT315-1 c y X A 60 41 40 Z E 61 e E HE A A2 (A 3) A1 w M θ bp L pin 1 index 80 Lp 21 detail X 20 1 ZD e v M A w M bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.16 0.04 1.5 1.3 0.25 0.27 0.13 0.18 0.12 12.1 11.9 12.1 11.9 0.5 HD HE 14.15 14.15 13.85 13.85 L Lp v w y 1.0 0.75 0.30 0.2 0.15 0.1 Z D (1) Z E (1) θ 1.45 1.05 7 0o 1.45 1.05 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-12-19 97-07-15 SOT315-1 1998 Apr 27 EUROPEAN PROJECTION 11 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 8 8.1 If wave soldering cannot be avoided, for LQFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: SOLDERING Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (order code 9398 652 90011). 8.2 Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 8.4 Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. 8.3 Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP packages with a pitch (e) equal or less than 0.5 mm. 1998 Apr 27 PCD509x2/zuu/v family 12 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) 9 PCD509x2/zuu/v family DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Short-form specification The data in this specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 10 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 11 PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1998 Apr 27 13 Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) NOTES 1998 Apr 27 14 PCD509x2/zuu/v family Philips Semiconductors Objective specification Low cost; low power DECT baseband controllers (ABC-PRO) NOTES 1998 Apr 27 15 PCD509x2/zuu/v family Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1998 SCA59 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 435102/1200/01/pp16 Date of release: 1998 Apr 27 Document order number: 9397 750 03527