IRF IRF7103QTR

PD - 93944C
IRF7103Q
AUTOMOTIVE MOSFET
Typical Applications
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●
●
HEXFET® Power MOSFET
Anti-lock Braking Systems (ABS)
Electronic Fuel Injection
Power Doors, Windows & Seats
VDSS
Benefits
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Ω)
RDS(on) max (mΩ)
ID
[email protected] = 10V
3.0A
[email protected] = 4.5V
1.5A
50V
Advanced Process Technology
Dual N-Channel MOSFET
Ultra Low On-Resistance
175°C Operating Temperature
Repetitive Avalanche Allowed up to Tjmax
Automotive [Q101] Qualified
S1
Description
Specifically designed for Automotive applications, these
HEXFET® Power MOSFET's in a Dual SO-8 package utilize
the lastest processing techniques to achieve extremely low
on-resistance per silicon area. Additional features of these
Automotive qualified HEXFET Power MOSFET's are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating. These benefits combine
to make this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety of other
applications.
The efficient SO-8 package provides enhanced thermal
characteristics and dual MOSFET die capability making it ideal
in a variety of power applications. This dual, surface mount
SO-8 can dramatically reduce board space and is also available
G1
S2
G2
1
8
D1
2
7
D1
3
6
4
5
D2
D2
SO-8
T o p V ie w
in Tape & Reel.
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 70°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ, TSTG
Continuous Drain Current, VGS @ 4.5V
Continuous Drain Current, VGS @ 4.5V
Pulsed Drain Current Q
Power DissipationS
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche EnergyT
Avalanche CurrentQ
Repetitive Avalanche EnergyV
Peak Diode Recovery dv/dt U
Junction and Storage Temperature Range
Max.
Units
3.0
2.5
25
2.4
16
± 20
22
See Fig.16c, 16d, 19, 20
12
-55 to + 175
A
W
mW/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Symbol
RθJL
RθJA
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Parameter
Junction-to-Drain Lead
Junction-to-Ambient S
Typ.
Max.
Units
–––
–––
20
50
°C/W
1
03/14/02
IRF7103Q
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
50
–––
–––
–––
1.0
3.4
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.057
–––
–––
–––
–––
–––
–––
–––
–––
10
1.2
2.8
5.1
1.7
15
2.3
255
69
29
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
130
VGS = 10V, ID = 3.0A R
mΩ
200
VGS = 4.5V, ID = 1.5A R
3.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 15V, ID = 3.0A
2.0
VDS = 40V, VGS = 0V
µA
25
VDS = 40V, VGS = 0V, TJ = 55°C
100
VGS = 20V
nA
-100
VGS = -20V
15
ID = 2.0A
–––
nC
VDS = 40V
–––
VGS = 10V
–––
VDD = 25V R
–––
ID = 1.0A
ns
–––
RG = 6.0Ω
–––
RD = 25Ω
–––
VGS = 0V
–––
pF
VDS = 25V
–––
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) Q
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
–––
–––
3.0
–––
–––
12
–––
–––
–––
–––
35
45
1.2
53
67
A
V
ns
nC
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
TJ = 25°C, IS = 1.5A, VGS = 0VR
TJ = 25°C, IF = 1.5A
di/dt = 100A/µs R
D
S
Notes:
Q Repetitive rating; pulse width limited by
T Starting TJ = 25°C, L = 4.9mH
max. junction temperature.
R Pulse width ≤ 400µs; duty cycle ≤ 2%.
S Surface mounted on 1 in square Cu board
U ISD ≤ 2.0A, di/dt ≤ 155A/µs, VDD ≤ V(BR)DSS,
RG = 25Ω, IAS = 3.0A. (See Figure 12).
TJ ≤ 175°C
V Limited by TJmax , see Fig.16c, 16d, 19, 20 for typical repetitive
avalanche performance.
2
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IRF7103Q
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
TOP
4.5V
10
10
4.5V
1
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.1
1
0.1
1
10
0.1
100
2.5
R DS(on) , Drain-to-Source On Resistance
(Normalized)
ID , Drain-to-Source Current (Α )
100.00
T J = 175°C
T J = 25°C
VDS = 25V
20µs PULSE WIDTH
3.0
6.0
9.0
12.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1.00
10
VDS , Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
10.00
1
15.0
ID = 3.0A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
V GS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF7103Q
10000
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
V DS = 10V
9
1000
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
V DS = 40V
V DS = 25V
Coss = Cds + Cgd
Ciss
Coss
100
I D = 2.0A
Crss
10
6
3
0
1
10
0
100
3
6
9
12
Q G, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1
0.1
0.4
TJ = 25 ° C
V GS = 0 V
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
ID, Drain-to-Source Current (A)
TJ = 175 ° C
1.2
10
1
100µsec
1msec
0.1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
0.01
0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF7103Q
3.0
RD
VDS
VGS
I D , Drain Current (A)
2.4
D.U.T.
RG
+
-VDD
1.8
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
1.2
Fig 10a. Switching Time Test Circuit
0.6
VDS
90%
0.0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJA)
100
D = 0.50
10
0.20
Thermal Response
0.10
0.05
P DM
0.02
1
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.1
0.00001
0.0001
0.001
0.01
0.1
t1/ t
2
J = P DM x Z thJA
+T A
1
10
t 1, Rectangular Pulse Duration (sec)
Fig 11. Typical Effective Transient Thermal Impedance, Junction-to-Ambient
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5
0.15
R DS (on) , Drain-to-Source On Resistance ( Ω)
R DS(on) , Drain-to -Source On Resistance ( Ω )
IRF7103Q
0.14
0.13
0.12
ID = 3.0A
0.11
0.10
0.09
4.5
6.0
7.5
9.0
10.5
12.0
13.5
2.500
2.000
VGS = 4.5V
1.500
1.000
0.500
VGS = 10V
0.000
15.0
0
-V GS, Gate -to -Source Voltage (V)
15
20
25
30
35
40
Fig 13. Typical On-Resistance Vs. Drain
Current
70
2.0
60
1.8
50
ID = 250µA
Power (W)
V GS(th) Gate threshold Voltage (V)
10
ID , Drain Current (A)
Fig 12. Typical On-Resistance Vs. Gate
Voltage
1.5
40
30
20
1.3
10
1.0
0
-75
-50
-25
0
25
50
75
100 125
150
TJ , Temperature ( °C )
Fig 14. Typical Threshold Voltage Vs.
Junction Temperature
6
5
1.00
10.00
100.00
1000.00
Time (sec)
Fig 15. Typical Power Vs. Time
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IRF7103Q
EAS , Single Pulse Avalanche Energy (mJ)
60
TOP
48
BOTTOM
ID
1.2A
2.5A
3.0A
1 5V
36
D .U .T
RG
24
D R IV E R
L
VDS
+
V
- DD
IA S
20V
tp
12
A
0 .0 1 Ω
Fig 16c. Unclamped Inductive Test Circuit
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( ° C)
V (B R )D SS
Fig 16a. Maximum Avalanche Energy
Vs. Drain Current
tp
IAS
Fig 16d. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
VGS
.2µF
.3µF
D.U.T.
QGS
+
V
- DS
QGD
VG
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 17. Gate Charge Test Circuit
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Charge
Fig 18. Basic Gate Charge Waveform
7
IRF7103Q
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
10
0.01
1
0.05
0.10
0.1
0.01
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
tav (sec)
Fig 19. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
25
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 3.0A
20
15
10
5
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 20. Maximum Avalanche Energy
Vs. Temperature
8
175
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = t av ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆T/ ZthJC
∆T/ [1.3·BV·Zth]
Iav = 2∆
EAS (AR) = PD (ave)·tav
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IRF7103Q
SO-8 Package Details
D
5
A
8
6
7
6
5
H
0.25 [.010]
1
6X
2
3
A
MAX
MIN
.0532
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
.050 BAS IC
1.27 BAS IC
e1
e
.025 BAS IC
0.635 BAS IC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
A
C
y
0.10 [.004]
8X b
0.25 [.010]
MAX
e
4
e1
MILLIMET ERS
MIN
A
E
INCHES
DIM
B
A1
8X L
8X c
7
C A B
F OOT PRINT
NOT ES :
1. DIMENSIONING & T OLERANCING PER AS ME Y14.5M-1994.
8X 0.72 [.028]
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES ].
4. OUTLINE CONFORMS T O JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROT RUSIONS.
MOLD PROTRUS IONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROT RUSIONS.
MOLD PROTRUS IONS NOT TO EXCEED 0.25 [.010].
6.46 [.255]
7 DIMENSION IS T HE LENGT H OF LEAD FOR SOLDERING TO
A S UBST RAT E.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOS FET )
INTERNAT IONAL
RECTIFIER
LOGO
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YWW
XXXX
F7101
DATE CODE (YWW)
Y = LAS T DIGIT OF THE YEAR
WW = WEEK
LOT CODE
PART NUMBER
9
IRF7103Q
SO-8 Tape and Reel
T E R M IN A L N U M B E R 1
1 2 .3 ( .48 4 )
1 1 .7 ( .46 1 )
8 .1 ( .31 8 )
7 .9 ( .31 2 )
F E E D D IR E C T IO N
N O TES:
1 . C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R .
2 . A L L D IM E N S IO N S A R E S H O W N IN M IL L IM E T E R S (IN C H E S ).
3 . O U T L IN E C O N F O R M S T O E IA -4 8 1 & E IA -5 4 1.
33 0.0 0
(1 2 .9 9 2 )
M AX .
1 4 .4 0 ( .5 66 )
1 2 .4 0 ( .4 88 )
N O TE S :
1. C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R .
2. O U T L IN E C O N F O R M S T O E IA -4 8 1 & E IA -5 4 1 .
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/02
10
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