Opto Isolation Circuits For In Circuit Debugging of 68HC9(S)12 and 68HC908 M ...

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Rev. 0, 9/2002
Opto Isolation Circuits For In
Circuit Debugging of
68HC9(S)12 and 68HC908
Microcontrollers
by
John Logan
Systems Engineering
Freescale, East Kilbride
Introduction
Motorola’s HC08 and HC12 MCUs are widely used in ac line powered
applications. In some cases, the MCU uses a non-isolated power supply.
Performing in-circuit debugging on ac line powered systems can be tricky and
sometimes dangerous due to differing ground connections, floating power
supplies, etc. For example, Figure 1 . Microcontroller Circuit with Low Cost
Power Supply shows an MCU controlling an ac motor. The MCU is powered
from a low cost charge pump power supply that is connected directly to the ac
line voltage. In relation to earth, the MCU Vdd and Vss pins can reach hundreds
of volts. This type of power supply is common in white and brown goods
applications, examples of which include vacuum cleaners, fridges, washing
machines, light dimmers, etc. If a debugging tool was connected directly to the
MCU in this circuit, two possibilities could occur depending on the construction
of the tool’s power supply.
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Line
5V
F1
FUSE
Q1
TRIAC
D1
5.6V
R1
C2
C1
D2
M1
MOTOR AC
MCU Vdd
tracks the
line
voltage
U1
0V
1
2
3
4
5
6
7
8
Vss
PTA1
PTA0
IRQ
PTB0
PTB1
PTB2
PTB3
VDD
PTA4
PTA3
PTA2
PTB4
PTB5
PTB6
PTB7
16
15
14
13
12
11
10
09
R2
MC68HC908KX8
Neutral
Figure 1. Microcontroller Circuit with Low Cost Power Supply
If the power supply is isolated from earth, as shown in Figure 2 . Debugger
with isolated power supply, it will rise to ac line potential in relation to earth.
This will raise the potential of the debugging tool to ac line voltage - potentially
lethal for the end user. Alternatively, the development tool’s power supply
output could be referenced to earth as shown in Figure 3 . Debugger with
power supply referenced to earth and connecting the tool to the application
would result in a blown fuse or damage to either the application or the
development tool.
For simple applications, engineers have developed non-isolated ac line
powered designs by programming windowed EPROMs or flash based MCUs
and debugging by trial and error. Basically the engineer had to remove the mcu
from the application, erase then reprogram the mcu and put it back into the
application. However, by using the powerful in-circuit debugging modes of
Motorola’s 68HC9(S)12 and 68HC908 microcontrollers in combination with an
optoisolated interface, designers can safely develop these applications more
efficiently without the risk of damaging their development tools.
This application note shows some circuits that can used to optically isolate
input, output and bi-directional digital pins. Debug interfaces for the
Background Debug Mode of the 68HC(S)12 and monitor mode on the 68HC08
are also shown.
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Input and Output Pins
Target
Dev tool floating - risk
of electrocution to
user!!!
Line
F2
FUSE
D5
IN
OUT
+
2
Dev
Tool
1
3
5
2
4
6
D1
C1
C2
D2
Debug Connection
3
Neutral
Vdd
JP1
GND
-
MCU
U2
MC7805ACK
1
T1
0V
R1
Vss
0V
Earth
0V line can reach
hundreds of volts
relative to earth
Figure 2. Debugger with isolated power supply
Target
Line
FUSE
MCU
U2
MC7805ACK
-
+
Neutral
IN
OUT
GND
1
T1
3
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2
Vdd
JP1
Dev
Tool
1
3
5
2
4
6
D1
C1
D2
Debug Connection
C2
R1
Vss
Earth
This will put
full mains
voltage across
MCU!!
Figure 3. Debugger with power supply referenced to earth
Input and Output Pins
The optoisolation circuit shown in Figure 4 . Opto Isolation of a
unidirectional pin shows a standard circuit that can be used to isolate a
unidirectional digital I/O pin.
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Input
Output
5V L
5V R
R3
ISO1
2
8
2K
7
6
1
U2A
U1A
J2
1
1
R2
2
3
5
J1
2
C1
74HCT04
INPUT
330R
74HCT04
1
OUTPUT
6N137
0.1uF
R1
10K
Figure 4. Opto Isolation of a unidirectional pin
The circuit works as follows: •
If the input is at logic ‘1’, the output of inverter U1 is low and the LED in
ISO1 is lit. This is detected by the photodiode and the optoisolated
transistor is switched ON pulling the input of inverter U2 low. The output
is then at logic ‘1’
•
If the input is at logic ‘0’, the output of inverter U1 is high and the LED in
ISO1 is not lit. The transistor is switched OFF, so the input to inverter U2
is pulled high. The output is then at logic ‘0’.
•
If the input is not driven, for example, if it is connected to a tristated I/O
pin, the input value is set to logic ‘0’ by Rx, thus the output is also logic
‘0’.
In some cases the 2 inverters can be removed provided that the system
connected to the input pin can sink at least 15mA current from the LED in ISO1,
and the system connected to the output has high input impedance.
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Open Drain and Bidirectional Pins
Open Drain and Bidirectional Pins
Figure 5 . Opto Isolation of a BiDirectional Pin shows a circuit that allows
opto-isolated bidirectional communications on a bi-directional digital pin. It uses
2 x 6N137 optoisolators, 2 PNP transistors and some passives.
Vdd_Host
Vdd_Target
R1
R2
50K
330
ISO1
C1
0.1uF
R3
2K
6N137
J1
Q1
BC307
1
HOST_IN_OUT
R4
R5
50K
330
0.1uF
C2
ISO2
R6
2K
6N137
Q2
BC307
J2
1
TARGET_IN_OUT
Figure 5. Opto Isolation of a BiDirectional Pin
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The circuit works as follows: •
When HOST_IN_OUT is at logic ‘0’, transistor Q1 is ON and the LED in
ISO1 is lit. This is received by the photo detector and switches on the
transistor in ISO1. This causes TARGET_IN_OUT to be pulled to ground
by resistor R6 and also ensures that the LED in ISO2 is OFF. This
means the transistor in ISO2 is also OFF.
•
When HOST_IN_OUT is at logic ‘1’, transistor Q1 is OFF, The output
transistor in ISO1 is OFF. TARGET_IN_OUT is pulled high by resistors
R1 and R6. The LED in ISO2 is OFF. Thus there is no feedback to
HOST_IN_OUT.
•
If HOST_IN_OUT is not driven, for example if it is connected to a
tristated I/O pin, it is pulled high by R2 and R3. From the description
above, it can be seen that the output will then be high also.
•
If both HOST_IN_OUT and TARGET_IN_OUT are not driven, the both
pins will be pulled high
The circuit is bi-directional. However, the user should not drive both terminals
at the same time. This will not cause any damage to the circuit, but it will
increase the current consumption
If the circuit is used to optoisolate an open drain I/O pin, no additional pull-up
resistors should be required.
Using the 2 circuits for unidirectional and bi-directional pins described above, it
is possible to optically isolate the Background Debug Mode on the 68HC(S)912
mcu family and monitor mode on the 68HC908 family.
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Design Considerations When Using Optoisolation
Design Considerations When Using Optoisolation
The designer should consider the following when adding optoisolators to a
design for debugging purposes
Power Consumption
A 6N137 optoisolator requires approximately 15mA current to drive its LED.
This extra power requirement needs to be considered when choosing voltage
regulators or other power supply components. For the bidirectional circuit
shown in Figure 5 . Opto Isolation of a BiDirectional Pin, under normal
operation condition, only 1 optoisolator will be active at any given time, so for
this circuit, the designer need only allocate extra current for 1 optocoupler.
Opto Coupler Speed
There are a wide variety of opto couplers available with differing maximum
frequencies. The 6N137 optocouplers used in this application note were rated
to 10Mbits/s and gave excellent performance when used to isolate the
Background Debug Module on the 68HC(S)12 and monitor mode on the
68HC08 (the bit rate of the background debug module is less than 2 Mbits/s
and less than 56kbits/s for monitor mode).
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Background Debug Connection For 68HC(S)12
Freescale HC12 and HCS12 MCUs provide on chip debugging via the
Background Debug Module (BDM). Full details of the Background Debug
Module are available in the BDM chapter of each HC(S)12 datasheet.
There are many development tools available that can interface to the BDM
module. Most take the form of a small debug cable that connects to a PC
through a serial or parallel port. There is usually a 3-wire connection between
the debug cable and the BDM module - BKGND, RESET and GND.
•
BKGND is a bidirectional pin that allows communications between the
HC12 and a debugger.
•
RESET is also a bidirectional pin. The debugger can pull reset low to
reset the chip. The MCU may reset itself due to an internal operation, for
example, a watchdog reset. This needs to be signalled back to the
debugger
•
GND is the ground connection.
Most debug cables use the Freescale-recommended 6 pin connection shown in
Figure 7 . Freescale Recommended Background Debug Connector.
Figure 8 . Optical Isolation Circuit for Background Debug Mode shows a
circuit that provides optoisolation for the debugging cable using 2 bidirectional
circuits as shown in Figure 5 . Opto Isolation of a BiDirectional Pin.
Figure 6. Serial Debug Cable
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Background Debug Connection For 68HC(S)12
BKGND 1
2 GND
NC 3
4 RESET
NC 5
6 VDD
Figure 7. Freescale Recommended Background Debug Connector
5V
Debug cable
Vdd
V dd _Ho st
Vdd
Vdd
Vd d _ T a r g e t
R1
R2
50K
3 30
I SO
1
C1
0 . 1 uF
R3
2K
6N1 3 7
J 1
Q 1
B C3 0 7
1
HO
S T _ I N_ O
UT
R4
R5
5 0K
33 0
0. 1uF
C2
I SO 2
R6
2K
6 N1 3 7
Q
2
BC3 0 7
J 2
1
T A R G E T_ I N _ O U T
BKGND
RESET
68HC12
Vss
5V
BKGND 1
2 GND
Vdd
V dd _Ho st
Vd d _ T a r g e t
R1
R2
50K
3 30
I SO
1
C1
0 . 1 uF
R3
2K
NC 3
NC 5
6N1 3 7
4 RESET
6 VDD
J 1
Q 1
B C3 0 7
1
HO
5V
S T _ I N_ O
UT
R4
R5
5 0K
33 0
0. 1uF
C2
I SO 2
R6
2K
6 N1 3 7
Q
2
BC3 0 7
J 2
1
T A R G E T_ I N _ O U T
Figure 8. Optical Isolation Circuit for Background Debug Mode
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MODA and MODB
Pin Control
The engineer can choose to select the operating mode of the 68HC(S)12 when
the mcu resets by setting or clearing the MODA and MODB pins on the mcu.
Mostly, these pins are hardwired in the application to select a particular mode
of operation. However, some debuggers can connect to these pins and provide
dynamic control over the operating modes. These pins can be easily
optisolated using the circuit shown in Figure 4 . Opto Isolation of a
unidirectional pin.
Monitor Mode Connections For 68HC08
Figure 9 . HC08 Monitor Mode Connection shows the connections required
to access monitor mode on the 68HC908AZ60A and a minimal debugging
circuit. For other HC08 mcus the connections may vary, please refer to the
monitor ROM chapter in the device datasheet for the exact connection.
However, all HC08s require the following minimum connections: •
PTA0 – a bi-directional data pin used to communicate between the mcu
and debugging hardware
•
RESET – a bi-directional pin used by the debugger to reset the mcu. It
can also be used by the debugger to detect mcu-generated resets (eg,
watchdog timeouts). In Figure 9 . HC08 Monitor Mode Connection
reset is controlled by a switch that the user can toggle to reset the device
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Monitor Mode Connections For 68HC08
VDD
10 kΩ
68HC08
RST
0.1 µF
VHI
1 KΩ
IRQ
9.1V
CGMXFC
1
10 µF
+
3
4
10 µF
MC145407
0.022 µF
20
+
2
OSC1
20 pF
17
+
+
10 µF
18
10 µF
*
X1
4.9152 MHz
10 MΩ
OSC2
VDD
VDDA
20 pF
19
0.1 µF
VDDA/VDDAREF
VSSA
VSS
DB-25
2
5
16
3
6
15
0.1 µF
VDD
7
VDD
VDD
1
3
6
5
7
VDD
14
2
4
NOTE: Position A — Bus clock = CGMXCLK ÷ 4 or CGMVCLK ÷ 4
Position B — Bus clock = CGMXCLK ÷ 2
MC74HC125
10 kΩ
PTA0
PTC3
VDD
VDD
10 kΩ
A
(SEE
NOTE.)
10 kΩ
B
Figure 9. HC08 Monitor Mode Connection
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PTC0
PTC1
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Other monitor mode pins (PTC0, PTC1, PTC3) can be ‘hardwired’ to allow
monitor mode access, or they could be optoisolated using the circuit shown in
Figure 4 . Opto Isolation of a unidirectional pin. Note, isolating all the
monitor mode set-up pins would involve adding significant additional current
requirements on the application’s power supply
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Figure 10 . Opto Isolation Circuit For Monitor Mode shows the monitor
mode circuit with optoisolation using circuits shown in Figure 4 . Opto
Isolation of a unidirectional pin and Figure 5 . Opto Isolation of a
BiDirectional Pin.
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Monitor Mode Connections For 68HC08
5V
VDD
68HC08
10 kΩ
R3
ISO1
2
2K
8
U2A
7
6
U1A
J2
1
1
R2
2
J1
1
3
2
0.1 µF
330R
74HCT04
RST
1
C1
5
74HCT04
INPUT
OUTPUT
6N137
0.1uF
R1
10K
VHI
1 KΩ
IRQ
9.1V
1
10 µF
10 µF
+
MC145407
20
+
3
18
4
17
CGMXFC
+
+
2
10 µF
10 µF
0.022 µF
5V
19
OSC1
DB-25
2
5
16
3
6
15
20 pF
*
X1
4.9152 MHz
10 MΩ
OSC2
VDDA
20 pF
0.1 µF
VDD
7
2
MC74HC125
VSSA
VSS
5V
1
VDDA/VDDAREF
14
0.1 µF
R1
R2
50K
330
ISO1
C1
0.1uF
3
R3
2K
VDD
6N137
VDD
Q1
BC307
6
4
5
R4
R5
50K
330
0.1uF
C2
ISO2
R6
2K
7
6N137
Q2
BC307
PTA0
PTC3
VDD
VDD
10 kΩ
A
(SEE
NOTE.)
Figure 10. Opto Isolation Circuit For Monitor Mode
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10 kΩ
B
PTC0
PTC1
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IRQ Pin Control
For correct entry to monitor mode on the 68HC908AZ60A and many other
68HC08 mcus, the IRQ pin must be supplied with a voltage level of Vdd +
4.5V. For debugging purposes when using an optically isolated interface, this
voltage can be hardwired on the application board side of the optical barrier. If
the user wishes to control switching of the IRQ voltage, it can be achieved using
the circuit shown in Figure 11 . IRQ Pin Optical Isolation Circuit.
Vdd Target+ 4.5V
Vdd Debugger
Vdd Target
R13
1K
R3
ISO1
2
1
INPUT
1
2
R2
3
5
74HCT04
330R
1
Q1
MOSFET N
7
6
U1A
J2
J1
2K
8
OUTPUT
C1
6N137
0.1uF
R1
10K
Figure 11. IRQ Pin Optical Isolation Circuit
Summary
This application note details 2 circuits for optically isolating unidirectional and
bi-directional digital pins. It explains how these circuits can be used to allow
development engineers to safely and efficiently develop non-isolated ac line
powered applications.
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References
References
Technical Data
2. MC9S12DP256
Technical Data
Freescale Semiconductor, Inc...
1. M68HC908AZ60A
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limitation consequential or incidental damages. “Typical” parameters which may be
provided in Freescale Semiconductor data sheets and/or specifications can and do
vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by
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claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Freescale
Semiconductor was negligent regarding the design or manufacture of the part.
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
implied copyright licenses granted hereunder to design or fabricate any integrated
circuits or integrated circuits based on the information in this document.
Freescale Semiconductor reserves the right to make changes without further notice to
any products herein. Freescale Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale Semiconductor assume any liability arising out of the application or use of
any product or circuit, and specifically disclaims any and all liability, including without
limitation consequential or incidental damages. “Typical” parameters which may be
provided in Freescale Semiconductor data sheets and/or specifications can and do
vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by
customer’s technical experts. Freescale Semiconductor does not convey any license
under its patent rights nor the rights of others. Freescale Semiconductor products are
not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life,
or for any other application in which the failure of the Freescale Semiconductor product
could create a situation where personal injury or death may occur. Should Buyer
purchase or use Freescale Semiconductor products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Freescale
Semiconductor was negligent regarding the design or manufacture of the part.
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