ATMEL AT16244G

AT16244
Features
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Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns
Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1 ns/100 pF
(G grade)
Very low ground bounce < 0.6V @ VCC =5.00 V, Ta=25°C
Excellent noise rejection
Typical output skew ≤0.25ns

Bus Hold circuitry to retain last active state during Tri-State
Available in SSOP and TSSOP packages
Description
Atmel’s Fast Logic 16-Bit Buffer/Line driver provides bus interface and signal buffering
at the fastest speeds available in the industry. The Tri-state outputs can be set for
either 4-bit, 8-bit, or 16-bit independent operation. The AT16244 also has bus-hold
circuitry which retains the last state of the input whenever a high impedance level is
detected, and eliminates the need for pull-up or pull-down resistors. Minimal ground
bounce and high input noise rejection make this device excellent for use in all high
speed interface applications.
AT16244
Fast Logic
16-Bit
Buffer/Line
Driver
Functional Block Diagram (1)
AT16244F
AT16244G
Note:
1. The function shown is repeated 3 additional times on each device.
Pin Configurations
SSOP/TSSOP
1OE
Pin Names
Descriptions
1Y2
1Y3
xOE
Output Enable Input
(Active Low)
VCC
2Y2
2Y3
xAχ
Data Inputs
3Y1
GND
xYχ
Tri-State Outputs
3Y4
4Y1
GND
4Y4
1Y1
GND
1Y4
2Y1
GND
2Y4
3Y2
3Y3
VCC
4Y2
4Y3
4OE
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
48
46
44
42
40
38
36
34
32
30
28
26
47
1A1
45
GND
43
1A4
41
2A1
39
GND
37
2A4
35
3A2
33
3A3
31
VCC
29
4A2
27
4A3
25
3OE
2OE
1A2
1A3
VCC
2A2
2A3
3A1
GND
3A4
4A1
GND
4A4
Top View
0755B
5-3
Function Table(1)
Inputs
Outputs
xOE
xAχ
L
H
X
L
L
H
Note:
xYχ
L
H
Z
1. X = Don’t Care, Z = High Impedance
Absolute Maximum Ratings*
Operating Temperature ........................ 0°C to +70°C
Storage Temperature ...................... -65°C to +150°C
Voltage on any Pin
with Respect to Ground...................-2.0V to +7.0V(1)
Maximum Operating Voltage.............................. 6.0V
5.0 Volt DC Characteristics
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other conditions
beyond those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
Notes: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum
output pin voltage is VCC +0.75V dc which may
overshoot to +7.0V for pulses of less than 20 ns.
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = +5.0V +/- 5% (unless otherwise noted)
Symbol
∆ICC
Test Conditions
Quiescent Power Supply
Current
VCC = Max, VIN = 3.4V
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current (I/O Pins)
IIL
Input Low Current (I/O Pins)
IOZ
Output Leakage Current
Min
Typ
Max
0.8
1.2
2.0
Units
mA
V
0.8
V
VIN = VCC
±15
µA
VIN = GND
±15
µA
±10
mA
VOH(1)
Output High Voltage
F Grade only
VCC = 4.75V
IOH = -10 mA
2.7
V
VOH(2)
Output High Voltage
G Grade only
VCC = 4.75V
IOH = -12 mA
2.7
V
V OL
Output Low Voltage (F Grade)
IOL = 10 mA
0.55
V
V OL
Output Low Voltage (G Grade)
IOL = 12 mA
0.55
V
Note:
5-4
Parameter
1. F grade: At VCC (max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max) = 3.25V
2. G grade: At VCC (max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max) = 3.35V
AT16244
AT16244
AC Characteristics
AT16244F
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions
tPHL
tPLH
Propagation Delay
tPZH
tPZL
Note:
Min
Typ
Max
Units
CL = 50 pF
2.5
ns
Output Enable Time
CL = 50 pF
5.5
ns
tPHZ
tPLZ
Output Disable Time
CL = 50 pF
6.0
ns
tSK(1)
Output Skew
CL = 50 pF
0.5
ns
∆tPHL(1)
∆tPLH
Propagation Delay vs Output Loading
1.5
ns/100 pF
1.3
1. This parameter is guaranteed but not 100% tested.
AT16244G
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions
tPHL
tPLH
Propagation Delay
tPZH
tPZL
Note:
Max
Units
CL = 50 pF
2.0
ns
Output Enable Time
CL = 50 pF
5.5
ns
tPHZ
tPLZ
Output Disable Time
CL = 50 pF
5.0
ns
tSK(1)
Output Skew
CL = 50 pF
0.5
ns
∆tPHL(1)
∆tPLH
Propagation Delay vs Output Loading
1.1
ns/100 pF
Typ
0.9
1. This parameter is guaranteed but not 100% tested.
Test Circuits(1,2)
Switch Position
VCC
VIN
VOUT
Pulse
Generator
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
7.0V
500Ω
D.U.T.
50 pF
500Ω
RT
CL
Note:
Min
Definitions:
CL= Load capacitance; Includes jig and probe capacitance.
RT=Termination resistance; Should be equal to ZOUT of the
Pulse Generator.
1. Pulse Generator: Rate ≤ 1.0 MHz, tF ≤ 2.5 ns, tR ≤ 2.5 ns.
2. AC tests are done with a single bit switching, and
timings need to be derated when multiple outputs are
switching in the same direction simultaneously. This derating
should not exceed 0.5 ns for 16 inputs switching
simultaneously.
5-5
IOL Pull Down Current
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
IOL, mA
120
80
40
0
-40
IOL
Output, V
Output, V
160
Time
Ground Bounce for
High to Low Transitions(1)
Supply Bounce for
Low to High Transitions(2)
4.5
3.5
gnd - measured on
output with input
held constant
3.0
2.5
3
output
Volts
2.0
Volts
3.5
1.5
2.5
output
2
1
VOLP
0.5
0.0
0
VOLV
-0.5
VOHV
1.5
1.0
0.5
vcc measured on
output with
input held
constant
VOHP
4
Time
Time
Typical Values
Note:
5-6
Parameter
Value
Units
VOLP
0.4
V
VOLV
-0.26
V
VOHV
VCC - 0.13
V
VOHP
VCC + 0.6
V
1. When multiple outputs are switched at the same time, rapidly changing current on the ground and VCC paths causes a
voltage to develop across the parasitic inductance of the wire bond and package pins. This occurrence is called
simultaneous switching noise. Atmel’s AT16244 products have minimized this phenomenon as shown on the graph.
Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. The ground data is measured on the one
remaining output, which is set to logic low and will reflect any device ground movement.
2. As on the graph for Ground Bounce, a similar condition occurs for low to high transitions. Output data is for 15 outputs
switching simultaneously at a frequency of 1 MHz. VCC droop is measured on the one remaining output pin, which is set
to a logic high. This output will reflect any movement on the device VCC.
AT16244
AT16244
Propagation Delay Waveforms
Input
Transition
1.5 V
1.5 V
tPLH
tPHL
VOH
1.5 V
Output
Transition
VOL
Enable and Disable Waveforms
Enable
Disable
3.0 V
Control
Input
1.5 V
0V
tPZL
Output
Switched
Low
tPLZ
3.5 V
Switch Closed
1.5 V
0.3 V
tPHZ
tPZH
Output
Switched
High
VOL
0.3 V
VOH
1.5 V
Switch Open
0V
5-7
Ordering Information
TPD
Ordering Code
Package
Operation Range
2.5 ns
AT16244F - 25YC
AT16244F - 25XC
48Y
48X
Commercial
2.0 ns
AT16244G - 20YC
AT16244G - 20XC
48Y
48X
Commercial
Package Type
48X
48 Pin, Plastic Thin Shrink Small Outline Package (TSSOP)
48Y
48 Pin, Plastic Shrink Small Outline Package (SSOP)
5-8
AT16244